All IPs > Memory Controller & PHY
The "Memory Controller & PHY" category within our semiconductor IP catalog encompasses a wide array of specialized IP cores designed to manage data flow to and from memory subsystems across different types of semiconductor technologies. Memory controllers and PHYs play a crucial role in interfacing with various memory types, ensuring efficient data transfer, and optimizing performance for diverse applications. Whether dealing with high-performance computing or consumer electronics, these IPs are fundamental to developing competent and reliable semiconductor solutions.
Memory controllers are integral components responsible for managing the communication between the system processor and memory. They ensure high-speed data access and are critical in determining a system's data throughput and latency. Within this category, you will encounter IP solutions for DDR (Double Data Rate) memory types, offering compatibility with the latest DDR3, DDR4, and upcoming DDR5 standards. Among other offerings, you'll also find HBM (High Bandwidth Memory) solutions for applications requiring ultra-high bandwidth and reduced power consumption, such as gaming consoles and GPUs.
PHYs, or physical layer interfaces, complement memory controllers by handling the electrical signaling and protocol adherence necessary for data transmission over physical mediums. Together with controllers, they form the backbone that bridges the communications between processors and different memory modules. Our catalog includes a variety of PHY solutions for diverse standards like eMMC, ONFI, and NVMe, facilitating efficient and secure data transactions.
The "Memory Controller & PHY" category caters to a broad range of products and applications. From mobile DDR and SDR controllers used in portable devices like smartphones to high-speed NAND flash controllers intended for storage solutions, the diversity of this category reflects the engineering rigor and adaptability required in modern semiconductor design. By browsing through our offerings, semiconductor developers can pinpoint the exact IP needed to enhance their memory management strategies and bring high-performance, low-latency solutions to market effectively.
The GL3590-S is a USB 3.2 Gen 2 Hub Controller designed to provide seamless connectivity via integrated USB Type-C® support. This controller is capable of managing multiple upstream ports, making it ideal for complex data management tasks in modern electronics. Its sophisticated architecture allows for high-speed data transfer, ensuring efficiency in demanding computational environments. Integrated with USB 3.2 Gen 2 hub capabilities, the GL3590-S supports rapid data exchange rates essential for applications needing swift resolution and connectivity. The device plays a crucial role in amplifying the USB connection bandwidth, thereby enhancing the performance and reliability of connected devices. Moreover, this hub controller is equipped with advanced compatibility features, supporting various data transfer protocols. It aims to streamline the integration process across computing platforms, providing a robust solution for today's data-driven ecosystems.
Overview: The DDR5 RCD Controller is a registering clock driver utilized in DDR5 RDIMMs and LRDIMMs. It buffers the Command/Address (CA) bus, chip selects, and clock signals between the host controller and DRAMs. Additionally, it establishes a BCOM bus to control data buffers in LRDIMMs. Key Features:  Compliance with JEDEC's JESD82-511  Maximum SCL Operating speed of 12.5MHz in I3C mode  DDR5 server speeds up to 4800MT/s  Dual-channel configuration with 32-bit data width per channel  Support for power-saving mechanisms  Rank 0 & rank 1 DIMM configurations  Loopback and pass-through modes  BCOM sideband bus for LRDIMM data buffer control  In-band Interrupt support  Packet Error Check (PEC)  CCC Packet Error Handling  Error log register  Parity Error Handling  Interrupt Arbitration  I2C Fast-mode Plus (FM+) and I3C Basic compatibility  Switch between I2C mode and I3C Basic  Clearing of Status Registers  Compliance with JESD82-511 specification  I3C Basic Common Command Codes (CCC) Applications:  RDIMM  LRDIMM  AI (Artificial Intelligence)  HPC (High-Performance Computing)  Data-intensive applications
The DDR5 Server DIMM chipset from Rambus delivers unparalleled performance for data center applications, designed to support next-generation DDR5-based servers. Featuring components like Registering Clock Drivers, Power Management ICs, and Serial Presence Detect Hubs, this chipset facilitates data processing speeds of up to 8000 MT/s for RDIMMs and 12800 MT/s for MRDIMMs. These solutions ensure high reliability and efficiency, tailored to meet the demands of modern server environments.
The Aries fgOTN processor family is engineered according to the ITU-T G.709.20 fgOTN standard. This line of processors handles a variety of signals, including E1/T1, FE/GE, and STM1/STM4, effectively monitoring and managing alarms and performance metrics. Aries processors excel at fine-grain traffic aggregation, efficiently channeling fgODUflex traffic across OTN lines to support Ethernet, SDH, PDH client services. Their capacity to map signals to fgODUflex containers, which are then multiplexed into higher order OTN signals, demonstrates their versatility and efficiency. By allowing cascaded configurations with other Aries devices or Apodis processors, Aries products optimize traffic routes through OTN infrastructures, positioning them as essential components in optical networking and next-generation access scenarios.
The SPD5 Hub Function IP has been developed to interface I3C/I2C Host Bus and it allows an isolation of local devices like Temperature Sensor(TS), from master host bus. This SPD5 has Two wire serial interface like SCL, SDA
The NVMe Host Controller from iWave Global offers an advanced solution for managing NVMe drive interfaces in computing systems. This controller is designed to facilitate the high-speed data exchange that NVMe drives demand, streamlining operations across data-centric applications. Engineered for scalability and performance, the NVMe Host Controller supports high data throughput, ensuring quick access and transfer of data between storage devices and host systems. Its design caters to the demands of modern computational environments where rapid data retrieval and storage are critical. The controller is integral in systems requiring high-performance storage solutions, and its support for multiple interfaces underscores its adaptability and broad applicability in data-intensive industries such as enterprise storage and high-performance computing.
At the forefront of memory interfaces, Dolphin Technology’s DDR PHY IPs offer exceptional performance and versatility for modern applications. This IP suite is designed to support DDR4, DDR3, and DDR2 standards, as well as LPDDR series memories. Notably, these DDR PHYs are engineered to reach speeds up to 4266 Mbps, ensuring compatibility with high-performance computing requirements. The DDR PHY IPs include features such as slew rate control, per-bit de-skew, gate training, and built-in self-test (BIST), all contributing to their robustness and adaptability in various system environments. They are compliant with the DFI 4.0 specification, providing seamless integration with DDR memory controllers to deliver comprehensive memory subsystem solutions. With proven reliability in silicon, these PHYs have been designed to efficiently integrate into SoCs, offering a high degree of speed and data integrity for advanced semiconductor applications. This makes them suitable for an array of high-performance tasks in industries ranging from consumer electronics to data center operations.
NRAM, also known as Nano-RAM, is a pioneering memory technology developed by Nantero, promising unprecedented speed and efficiency. Unlike the conventional DRAM and NAND Flash, NRAM offers high-speed read and write capabilities akin to DRAM but with the durability and non-volatility of NAND. This makes it ideal for various high-performance applications such as automotive, space systems, and enterprise infrastructure. One of the standout features of NRAM is its ability to drastically reduce energy usage in data centers. By cutting energy costs by a third, it significantly lowers carbon emissions, supporting eco-friendly initiatives. NRAM's simple structure allows for 3D multilayer configurations and offers excellent endurance, meaning it can handle frequent and heavy cycles much better than standard flash memory. Robustness is another critical characteristic of NRAM, which showcases rad-hard properties ideal for mission-critical applications like national security infrastructure. It also resists environmental stresses, maintaining functionality under extreme temperatures, magnetic fields, and radiation. With no need for data refreshing or precharging, NRAM delivers instantaneous data access, further proving its potential to reshape the future of memory technology.
The HBM3 PHY & Memory Controller is a highly efficient solution tailored for high-bandwidth memory applications, often used in AI, data centers, and high-performance computing environments. It adheres to the HBM3 JEDEC standard, ensuring seamless integration and interoperability. One standout feature is its ability to achieve high-speed data transfer rates, supporting up to 9600 MT/s for HBM3E. This memory controller provides a comprehensive PHY and controller package with robust support for complex memory configurations, offering up to 32Gb density per die and supporting major 2.5D/3D packaging technologies for diverse application needs. To ensure adaptability, this solution incorporates flexible intelligent interface training sequences, which accommodate various operational scenarios and vendor-specific customizations. Additionally, the high average random efficiency of over 85% demonstrates its optimization for efficient data handling and processing. The architecture also includes advanced interfacing capabilities, such as the DFI 5.1 compatible interface for memory controller connectivity, and features for interconnect and memory repairs that enhance reliability. SkyeChip's design caters to future-ready applications with add-on features for debugging, reliability, and error management, making it an ideal choice for complex high-performance systems. These features ensure that the solution not only meets current standards but also anticipates evolving industry requirements, positioning it as an essential component in technology infrastructures focused on maximizing throughput while minimizing energy consumption.
The Apodis family of Optical Transport Network processors adheres to ITU-T standards, offering a comprehensive suite for signal termination, processing, and multiplexing. Designed to handle both SONET/SDH and Ethernet client services, these processors map signals to Optical Transport Network (OTN), empowering versatile any-port, any-service configurations. Apodis processors are notable for their capacity to support up to 16 client ports and four 10G OTN line ports, delivering bandwidth scalability up to 40G, crucial for wireless backhaul and fronthaul deployments. With a robust, non-blocking OTN switching fabric, Apodis facilitates seamless client-to-line and line-to-line connections while optimally managing network bandwidth. This adaptability makes the Apodis processors an ideal choice for next-generation access networks and optical infrastructures.
The LPDDR4/4X/5 Secondary/Slave PHY offers targeted solutions for optimized memory interfacing in systems where primary and secondary controllers operate in tandem. This design is critical for addressing the needs of high-performance computing devices that require scalable memory management solutions. With its focus on efficient data handling and reduced latency, the Secondary/Slave PHY ensures seamless operation in complex memory systems. The design incorporates advanced control techniques to maximize memory throughput while adhering to rigorous power management standards. This positions it as a vital component for devices requiring high-speed memory access. Adaptability is a key feature of this PHY, with support for multiple LPDDR standards allowing it to interface with modern memory technologies. Its robust construction provides consistent performance across a range of operating conditions, catering to industries demanding high efficiency and reliability. The Secondary/Slave PHY thus enhances system capabilities, ensuring data integrity and reduced latency for innovative computational applications.
ReRAM Memory by CrossBar is designed to push the boundaries of storage technology, offering a high-performance, low-latency memory solution that is both scalable and energy-efficient. This memory technology boasts a radical structure that allows it to function distinctly from traditional memory. It is built to scale under 10nm and integrate seamlessly in 3D stackable architectures, which is ideal for future-proofing against the rising demands of data processing and storage. What sets ReRAM apart is its capability to deliver up to 1000 times the endurance of conventional memory solutions and greatly enhance read and write speeds. This is achieved by its simple yet robust structure, allowing it to be integrated with existing logic circuits without the need for specialized tools. ReRAM is particularly suitable for applications across various domains such as IoT, AI, data centers, and even newer consumer electronics, making it versatile and widely applicable. ReRAM provides a unique advantage in being directly integrated into modern fabrication processes, simplifying both production and deployment for manufacturers. This flexibility ensures that ReRAM can maintain high levels of performance while meeting the industry's stringent efficiency requirements. Moreover, it offers substantial opportunities to advance secure computing through innovative uses in secure keys and encryption functions.
The AXI4 DMA Controller from Digital Blocks revolutionizes data management in System-on-Chip architectures through high-performance Direct Memory Access capabilities. Supporting a span of 1 to 16 channels, it handles data transfers between memory and peripherals with agility, ideal for both small and large datasets. Designed for high throughput, it includes a multi-channel architecture that can expand from 32 to up to 256 channels, demonstrating exceptional scalability for future data demands. Each channel within the DMA Controller operates independently with dedicated Read and Write Controllers, ensuring minimal overhead during transfers. It facilitates complex data flow configurations including scatter-gather linked-list data controls and comprehensive support for different burst modes within the AXI3 and AXI4 protocols. Its design incorporates advanced features that users can selectively enable to optimize silicon resource usage and cost efficiency. Additionally, it accommodates complex AXI4-Stream to memory-mapped interface transfers, making it versatile for a variety of applications, from high-speed data environments to embedded systems requiring optimized memory access and control.
Specializing in complete subsystems, the YouDDR technology encompasses not only DDR controllers but also embodies the PHY and I/O components, together with uniquely tailored calibration and testing software. This integration facilitates the creation of a full-fledged system that enhances performance and reliability in data transfer operations.
SkyeChip's DDR5/4 PHY & Memory Controller represents a high-performance, energy-efficient memory interface solution conforming to the latest DDR5 and DDR4 JEDEC standards. Designed for a myriad of modern applications, this memory controller offers seamless support for data transfer rates of up to 6400 MT/s, with its flexible architecture allowing for upgrades to even higher speeds in future deployments. With a DFI 5.0 compliant interface, it ensures smooth communication between the memory controller and the PHY, essential for maintaining optimal operation across data-intensive tasks. The solution supports various SDRAM configurations, including x4, x8, and x16, while offering expansive addressing capabilities—up to 64Gb for DDR5 and 32Gb for DDR4. Its robust design caters to diverse module configurations, such as UDIMM, RDIMM, and LRDIMM, enhancing compatibility with existing and new hardware setups. Add-on features for reliability and debugging are available, providing tools for real-time performance monitoring and error correction. Noteworthy is its inclusion of receiver decision feedback equalization and transmitter feed forward equalization I/Os, which aid in maintaining signal integrity across high-speed connections. This ensures consistent performance even under varying conditions, making it ideal for high-speed data applications where precision and low power consumption are critical. Collectively, these attributes fit well with demands for high-efficiency systems in modern computing environments.
The Ultra-Low Latency 10G Ethernet MAC from Chevin Technology is designed to deliver exceptional speed and efficiency for cutting-edge FPGA applications. Its primary focus is on reducing latency to the bare minimum while maintaining a high data throughput. This Ethernet MAC is universally compatible with Intel and AMD FPGA platforms, offering seamless adaptation to various projects. This solution is especially advantageous for environments where near-instantaneous data transmission is a necessity. Ideal for applications in high-frequency trading, telecommunications, and advanced scientific instrumentation, the Ultra-Low Latency 10G Ethernet MAC ensures that data integrity is preserved even at high speeds. Chevin Technology's meticulous in-house testing and development processes guarantee that this IP core meets stringent quality and performance standards. It offers a scalable, all-hardware architecture that slashes the usual implementation time, allowing more resources to be dedicated to expanding functionality and securing additional data pathways.
The Aeonic Power family offers scalable on-die voltage regulation tailored to the power delivery needs of high-performance ICs and chiplets. Featuring a flexible architecture, Aeonic Power solutions enable energy optimization through per-core DVFS, static IR drop mitigation, and the creation of virtual power islands. These products provide observability and noise suppression capabilities, simplifying power distribution for die-to-die interfaces and facilitating enhanced PDN robustness. By integrating sophisticated telemetry, Aeonic Power empowers design teams with unparalleled insights into power behavior and optimizes the power distribution network for energy-efficient operations.
Dolphin Technology offers a comprehensive range of memory IP products, catering to diverse requirements in semiconductor design. These products include a variety of memory compilers, specialty memory, and robust memory test and repair solutions such as Memory BIST. Designed to meet the demands of contemporary low-power and high-density applications, these IPs are built to work across a broad spectrum of process technologies. Advanced power management features, like light and deep sleep modes and dual rails, enable these products to tackle even the toughest low-leakage challenges. What sets these products apart is their flexibility and adaptability, evident in the support for different memory types and process nodes. Dolphin Technology’s memory IPs benefit from seasoned design teams that have proven their mettle in silicon across several generations. Thus, these IPs are not only versatile but also reliable in serving a wide variety of industry needs for technology firms worldwide. Clients can expect memory solutions that are fine-tuned for both power efficiency and performance. Additional capabilities such as power gating cater to ultra-low power devices while achieving a high level of device integration and compatibility. The specialized focus on low noise and rapid cycle times makes these memory solutions highly effective for performance-driven applications. These features collectively make Dolphin Technology’s memory IP an invaluable asset for semiconductor designers striving for innovation and excellence.
The Zhenyue 510 SSD Controller is a flagship product in T-Head's lineup of storage solutions, designed to deliver exceptional performance for enterprise applications. It integrates seamlessly with solid-state drives (SSDs), enhancing read and write speeds while maintaining data integrity and reliability. This controller serves as a fundamental component for building robust, enterprise-grade storage systems. Engineered to support high-speed data transfers, the Zhenyue 510 employs cutting-edge technology to minimize latency and maximize throughput. This capability ensures swift access to data, optimizing performance for demanding applications such as cloud storage and big data processing. Its architecture is specifically tailored to leverage the advantages of PCIe 5.0 technology, allowing for robust data channeling and minimized bottleneck effects. Beyond speed and efficiency, the Zhenyue 510 integrates advanced error correction methods to maintain data accuracy over high-volume operations. This reliability is crucial for enterprises that require stable and consistent storage solutions. With such features, the Zhenyue 510 is poised to cater to the needs of modern data infrastructure, offering scalability and advanced functionality.
The LPDDR5/5X PHY & Memory Controller from SkyeChip is tailored for modern applications that demand high performance and low power consumption. Designed in compliance with the LPDDR5/5X JEDEC standard, this solution supports speeds up to 6400 MT/s, with potential upgrades to 10667 MT/s. It features a flexible architecture with intelligent interface training sequences that ensure adaptability to various operational scenarios. Central to its design are features that significantly enhance performance, including I/Os with decision feedback equalization for receiving and feed forward equalization for transmitting, which ensure signal precision across the board. The controller supports multiple SDRAMs configurations, with comprehensive addressing capabilities, supporting x8, x16, and x32, as well as up to 32Gb addressing. Additionally, it is packed with optional features such as modular performance field enhancements (MPFE), reliability through redundancy, and advanced debugging capabilities, keeping it agile for dynamic requirements. This makes the LPDDR5/5X solution particularly suitable for mobile computing platforms and devices focusing on energy efficiency without compromising on data throughput.
The MVPM100 series encapsulates the precision of traditional particulate measurement in a miniaturized form factor. It uses cutting-edge microsystem technology to bring gravimetric sensor precision to compact devices, directly measuring the weight of particles versus relying on optical methods. This innovative approach offers more accurate particle mass readings, ideal for diverse applications, from air quality monitoring to industrial processes. The sensors cover a measurement range of 0 to 1000 µg/m3 with an impressive accuracy of 10 µg/m3. They operate over a broad temperature spectrum from -10°C to 65°C, accommodating various environmental challenges. Power needs are efficiently managed with an idle current of 200 µA and active consumption reaching 40 mA for one measurement per second. With a versatile interface supporting both I2C and UART protocols, the MVPM100 sensors are highly suitable for electronic systems that demand high precision and low power. Their small size (25 x 25 x 15 mm) makes them highly integrable into existing systems without requiring substantial real estate on PCBs.
TwinBit Gen-1 is NSCore's pioneering solution in embedded non-volatile memory technology, optimized for seamless integration into CMOS logic processes across nodes ranging from 180nm to 55nm. Known for its robust endurance performance, it supports over 10,000 program/erase cycles, making it highly reliable for repeated usage. This IP is designed without necessitating any additional masks or process steps, which aligns with NSCore’s ethos of simplifying the integration process. TwinBit Gen-1's flexible memory configuration, spanning 64 bits up to 512K bits, ensures its applicability in a wide array of domains. From enabling secure key storage to supporting analog trimming and system switches on ASICs/ASSPs, it offers a broad spectrum of functional capabilities, making it ideally suited for modern IoT devices and embedded systems. With built-in test circuits that facilitate stress-free test environments and automotive-grade reliability, TwinBit Gen-1 presents a formidable option for applications that demand low-voltage and low-power operations. Its alignment with standard IPs and lack of additional process overhead also contribute to its attractive development turnaround time and cost-effectiveness.
The EZiD211, also known as Oxford-2, is a leading-edge demodulator and modulator developed by EASii IC to facilitate advanced satellite communications. It embodies a sophisticated DVB-S2X wideband tuner capable of supporting LEO, MEO, and GEO satellites, integrating proprietary features like Beam Hopping, VLSNR, and Super Frame applications. With EZiD211 at the helm, satellite communications undergo a transformation in efficiency and capacity, addressing both current and future demands for fixed data infrastructures, mobility, IoT, and M2M applications. Its technological forefront facilitates seamless operations in varied European space programs, validated by its full production readiness. EZiD211's design offers a unique capability to manage complex satellite links, enhance performance, and ensure robust and reliable data transmission. EASii IC provides comprehensive support through evaluation boards and samples, allowing smooth integration and testing to meet evolving satellite communication standards.
The Ncore Cache Coherent Interconnect from Arteris is engineered to overcome challenges associated with multicore SoC designs. It delivers high-bandwidth, low-latency interconnect fabric enhancing communication efficiency across various SoC components and multiple dies. Designed to ensure reliable performance and scalability, this coherent NoC addresses complex tasks by implementing heterogeneous coherency, and it is scalable from small embedded systems to extensive multi-die designs. Ncore promotes effective cache management, providing full coherency for processors and I/O coherency for accelerators. It supports various coherency protocols including CHI-E and ACE, and comes with ISO 26262 certification, meeting stringent safety standards in automotive environments. The inherent AMBA support allows seamless integration with existing and new SoC infrastructures, enhancing data handling efficiency. By offering automated generation of diagnostic analysis and fault modes, Ncore aids developers in creating secure systems ready for advanced automotive and AI applications, thereby accelerating their time-to-market. Its configurability and extensive protocol support position it as a trusted choice for industries requiring flexible and robust system integration solutions.
Tower Semiconductor's BCD technology is engineered to provide superior power management solutions by integrating Bipolar, CMOS, and DMOS processes on a single chip. This integration facilitates the development of power devices with high voltage withstand capabilities and efficient power handling properties. BCD technology is key in designing power ICs that support a range of applications from DC-DC converters to motor drivers. These integrated circuits benefit from the low on-resistance of DMOS, the digital control capabilities of CMOS, and the high gain of Bipolar components, making them versatile for various high-performance electronic devices. Furthermore, BCD technology's robustness and reliability are matched by its capacity to function at higher voltages and temperatures, which are critical in driving performance in automotive and industrial power applications. Its deployment in next-generation power management solutions underscores the commitment to efficiency and innovation in power electronics.
Chevin Technology's 10G Ethernet MAC and PCS solution is engineered to deliver premium data transfer speeds, ideal for high-performance FPGAs. Its compact all-logic architecture eliminates the need for external CPUs or software, minimizing complexity and enhancing efficiency. This IP achieves excellent link utilization and minimal latency, ensuring seamless integration into FPGA projects with ample room for additional design logic. The architecture supports sustained high throughput rates, making it particularly suited for demanding applications such as data storage and industrial imaging. With its proven performance and reliability, the 10G Ethernet MAC and PCS are trusted across numerous industries, including defense and scientific research. Its power-efficient design contributes to reduced energy consumption, a critical factor in modern FPGA designs. Moreover, this solution offers flexibility through its technology-agnostic approach, capable of functioning across a wide range of FPGA families from leading manufacturers like Intel and AMD. Clients appreciate the secure, high-speed connectivity this IP provides, coupled with Chevin Technology’s commitment to expert support and seamless customization capabilities.
The MVDP2000 series represents MEMS Vision's advanced offering in differential pressure sensing, employing a proprietary capacitive sensing technology. These sensors are digitally calibrated across both pressure and temperature ranges, making them ideal for applications demanding high sensitivity, speed, and efficiency, such as medical, HVAC, and filter monitoring systems. The sensors are characterized by a quick response time of down to 1.0 ms and a substantial measurement range of ±5 kPa to ±10 kPa. They ensure precise readings with a total error band of less than 1.0 %FS and permit integration in a wide array of environmental conditions, from -40°C to 85°C. The compact 7 x 7 mm DFN package ensures easy deployment in constrained spaces. With digital I2C as well as analog output modes, the MVDP2000 sensors are highly adaptable to various system requirements. Despite their advanced capabilities, these sensors maintain a low power profile with a current consumption of just 2.85 µA at one measurement per second, making them suitable for battery-powered applications.
Certus Semiconductor's Digital I/O solutions are engineered to meet various GPIO/ODIO standards. These versatile libraries offer support for standards such as I2C, I3C, SPI, JEDEC CMOS, and more. Designed to withstand extreme conditions, these I/Os incorporate features like ultra-low power consumption, multiple drive strengths, and high levels of ESD protection. These attributes make them suitable for applications requiring resilient performance under harsh conditions. Certus Semiconductor’s offerings also include a variety of advanced features like RGMII-compliant IO cells, offering flexibility for different project needs.
Excelling in NAND flash interface technology, YouONFI products cater to optimized data access and management on flash devices. With compatibility for a range of storage solutions, these interfaces promote rapid data transactions essential for modern computing.
Dyumnin's RISCV SoC is a versatile platform centered around a 64-bit quad-core server-class RISCV CPU, offering extensive subsystems, including AI/ML, automotive, multimedia, memory, cryptographic, and communication systems. This test chip can be reviewed in an FPGA format, ensuring adaptability and extensive testing possibilities. The AI/ML subsystem is particularly noteworthy due to its custom CPU configuration paired with a tensor flow unit, accelerating AI operations significantly. This adaptability lends itself to innovations in artificial intelligence, setting it apart in the competitive landscape of processors. Additionally, the automotive subsystem caters robustly to the needs of the automotive sector with CAN, CAN-FD, and SafeSPI IPs, all designed to enhance systems connectivity within vehicles. Moreover, the multimedia subsystem boasts a complete range of IPs to support HDMI, Display Port, MIPI, and more, facilitating rich audio and visual experiences across devices.
The Scorpion family of processors offers support for OSU containers as per the CCSA and IEEE standards, particularly the OSUflex standard. These processors accommodate various client-side signals, including E1/T1, FE/GE, and STM1/STM4, ensuring robust performance monitoring and optional Ethernet rate limitation. Scorpion processors can adeptly map these client signals to OSU or ODU containers, which are subsequently multiplexed to OTU-1 lines. Known for their flexibility and efficiency in handling diverse traffic types, Scorpion processors serve as foundational elements for advancements in access networks and optical service units, ensuring sustained performance in increasingly complex networking environments.
The AST 500 and AST GNSS-RF are multifaceted SOC and RF solutions designed for GNSS applications. They support a wide array of constellations such as GPS, GLONASS, NavIC, and others, in multiple frequency bands, enhancing navigation performance. These ICs integrate features like secure boots and data encryption, facilitating robust security measures crucial for sensitive data. The AST GNSS-RF is equipped with capabilities for L1, L2, L5, and S band reception, catering to high-fidelity signal requirements across various applications. The support for dual-band reception ensures that ionosphere errors are minimized, offering exceptional positioning accuracy.
The AHB-Lite Memory IP is a configurable soft IP solution that provides dependable on-chip memory access for AHB-Lite master devices. By offering parameterization, it allows designers to specify detail-oriented attributes to fit the memory requirements of their system, making it a practical solution for complex design architectures requiring dependable memory management and access.
RegSpec is a cutting-edge tool that streamlines the generation of control and status register code, catering to the needs of IP designers by overcoming the limitations of traditional CSR generators. It supports complex synchronization and hardware interactions, allowing designers to automate intricate processes like pulse generation and serialization. Furthermore, it enhances verification by producing UVM-compatible code. This tool's flexibility shines as it can import and export in industry-standard formats such as SystemRDL and IP-XACT, interacting seamlessly with other CSR tools. RegSpec not only generates verilog RTL and SystemC header files but also provides comprehensive documentation across multiple formats including HTML, PDF, and Word. By transforming complex designs into streamlined processes, RegSpec plays a vital role in elevating design efficiency and precision. For system design, it creates standard C/C++ headers that facilitate firmware access, accompanied by SystemC models for advanced system modeling. Such comprehensive functionality ensures that RegSpec is invaluable for organizations seeking to optimize register specification, documentation, and CSR generation in a streamlined manner.
UFS Solutions by PRSsemicon are crafted to optimize storage systems with robust device and host controllers compliant with UFS2.1 to UFS3.1 standards. These solutions integrate with UNIPRO link layers, offering features such as device and host configurations alongside updates like the UME feature add-on and UNIPRO2.0 upgrades. Targeting applications in high-performance mobile storage, these offerings enhance data throughput and reduce latency, catering to the demanding needs of modern smart devices and storage systems.
MEMTECH's L-Series Controller offers a low-power solution for DDR applications, tailored for devices requiring efficient power usage without compromising on memory bandwidth. This low-power double data rate (LPDDR) solution supports up to four AXI interfaces and provides quality of service management for prioritizing tasks effectively. The L-Series Controller is compliant with JEDEC standards for LPDDR4, LPDDR4X, and LPDDR5, making it versatile for integration into various mobile and portable devices.
CrossBar's ReRAM IP Cores for Embedded NVM are engineered to optimize the functionality of microcontrollers and System-on-Chip (SoC) designs. These cores are specially tailored for multi-time programmable (MTP) non-volatile memory applications across a range of devices, from IoT gadgets to industrial and automotive systems. By enhancing memory performance while reducing latency and energy consumption, these cores set a new standard for embedded system efficiency. The IP cores support process nodes starting at 28nm and can scale below 10nm, ensuring compatibility with contemporary semiconductor manufacturing processes. They provide customizable memory sizes from 2M bits to 256M bits, allowing for tailored solutions that meet specific application needs. The cores excel in low-energy code execution, making them ideal for devices that prioritize energy efficiency without compromising on performance. In addition to their utility in consumer electronics and smart devices, these ReRAM IP cores are equipped to enhance security functions, integrating secure keys into semiconductors to bolster data protection. Their scalability and versatility make them an excellent choice for developers seeking to integrate high-performance, non-volatile memory components into their silicon architectures.
The NVMe Streamer from MLE empowers next-generation storage solutions with its cutting-edge data streaming capabilities. NVMe technology, known for robust performance, is utilized here to achieve accelerated data processing and storage for critical applications. The NVMe Streamer provides high-speed connectivity, facilitating seamless data capture and record-keeping in high-bandwidth environments, such as cloud computing and data centers. With support for PCIe 3.0/4.0/5.0 standards, this IP core ensures compatibility with present and future hardware, fostering consistent and reliable performance across deployments. It acts as a pivotal component for computational storage and data movement, backing up extensive data processing with minimal latency and maximum throughput, essential for real-time operations and intensive data tasks. Design flexibility inherent in the NVMe Streamer allows it to be tailored to specific infrastructure needs, offering scalable solutions that can grow with technological advancements. This adaptability is key for organizations seeking to future-proof their storage capabilities in a fast-evolving digital landscape.
The RWM6050 is a power-efficient baseband modem designed for high-capacity mmWave communication, ideal for market segments that require cost-effective and high-performance solutions. Developed in partnership with Renesas, this modem pairs seamlessly with mmWave RF chipsets to provide a highly configurable radio interface suitable for access and backhaul applications. Equipped with flexible channelisation and modulation coding capabilities, the RWM6050 can scale bandwidth to support multi-gigabit data transfers, boasting dual modem features and a mixed-signal front-end. This flexible architecture supports versatile deployment scenarios, enabling robust and high-speed connectivity over moderate distances. The RWM6050’s beamforming capabilities, enhanced by a phased array antenna, and advanced digital front-end processing, make it ideal for sophisticated data links. The modem integrates network synchronization and provides programmable real-time scheduling, affirming its role as a pivotal element in delivering reliable mmWave communication.
Analog Bits offers high-accuracy sensor IPs engineered to detect and measure various parameters crucial for maintaining device performance and reliability. These sensors are tailored for precision temperature measurement, power supply monitoring, and process variable tracking. By incorporating advanced features, they provide real-time data for optimizing operational efficiencies in various semiconductor applications. These sensor solutions are instrumental in managing system power integrity by providing detailed insights into power consumption patterns and environmental conditions. The integration of these sensors enables smart systems to adjust dynamically, enhancing overall performance while reducing power consumption. This capability is particularly valuable in sectors such as automotive, industrial automation, and edge computing where continuous monitoring and swift responsiveness are essential. Furthermore, Analog Bits’ sensors are constructed to operate under varying environmental conditions, ensuring they deliver reliable data across a wide range of temperatures and voltages. The use of such sensors in smart appliances and automotive systems underscores their importance in advancing the development of intelligent devices that require precise monitoring and control.
The Aeonic Integrated Droop Response System addresses droop issues in complex integrated circuits by combining mitigation and detection mechanisms in a seamlessly integrated package. This system supports fine-grained DVFS capability and rapid adaptation, providing significant power savings for SoCs. It offers comprehensive observability tools crucial for modern silicon health management, including multi-threshold detection and rapid response features within just a few clock cycles. This integration promotes energy efficiency by reducing voltage margins and supports various process technologies through a process portable design.
This IP block is essential for efficient data/clock recovery and deserializing in XFI and SONET/SDH protocols, supporting data rates from 8.5 to 11.3Gb/s. With ultra-low power consumption and 65nm CMOS technology from IBM, DSER12G ensures robust operation with versatile design options, incorporating a financial N divider, equalizer, and loss of signal (LOS) and lock (LOL) indicators for enhanced deployability.
ISPido represents a fully configurable RTL Image Signal Processing Pipeline, adhering to the AMBA AXI4 standards and tailored through the AXI4-LITE protocol for seamless integration with systems such as RISC-V. This advanced pipeline supports a variety of image processing functions like defective pixel correction, color filter interpolation using the Malvar-Cutler algorithm, and auto-white balance, among others. Designed to handle resolutions up to 7680x7680, ISPido provides compatibility for both 4K and 8K video systems, with support for 8, 10, or 12-bit depth inputs. Each module within this pipeline can be fine-tuned to fit specific requirements, making it a versatile choice for adapting to various imaging needs. The architecture's compatibility with flexible standards ensures robust performance and adaptability in diverse applications, from consumer electronics to professional-grade imaging solutions. Through its compact design, ISPido optimizes area and energy efficiency, providing high-quality image processing while keeping hardware demands low. This makes it suitable for battery-operated devices where power efficiency is crucial, without sacrificing the processing power needed for high-resolution outputs.
The SERDES12G module integrates serialization and deserialization functionalities within fiber optic transceivers operating at data rates between 8.5 and 11.3Gb/s. Utilizing CML logic for enhanced noise immunity, it features line rate output data retiming, making it indispensable in high-speed networking applications where precise data modulation is crucial.
Ubi.cloud is a groundbreaking geolocation solution designed for IoT tracking that shifts power-hungry processes such as GPS and Wi-Fi into the cloud. This approach effectively reduces the power consumption, physical size, and cost of IoT devices, making it an ideal fit for device and chipset manufacturers. By offloading these demanding tasks, Ubi.cloud enhances the energy efficiency of IoT trackers, enabling longer device life and reducing the need for frequent battery replacements. The service is particularly noteworthy for its ability to minimize the footprint of geolocation hardware in tracking devices, which is crucial for the efficient deployment of compact, integrated IoT solutions across various industries. In addition to improving device longevity, Ubi.cloud provides developers with flexibility in designing cost-effective and scalable IoT systems that maintain robust tracking capabilities over wide areas, both indoors and outdoors. The shift from device-based to cloud-based processing is a major step forward in enhancing the practicality and adoption of IoT trackers in a wide range of applications.
The Orion MFH IP Cores are designed for optimal performance in 4G mobile fronthaul networks, compliant with the ITU-T specifications for CPRI signal multiplexing. They adeptly handle various CPRI options, ranging from 2.4576 Gbps to 12.16512 Gbps, ensuring high compatibility and performance. Featuring both muxponder and transponder configurations, Orion cores facilitate the efficient mapping and transport of CPRI signals via Optical Transport Network infrastructures, ideal for modern telecommunications frameworks. Their advanced capabilities enable telecommunications providers to enhance their network reliability and service delivery, adapting seamlessly to different fronthaul scenarios.
The Cyclone V FPGA with Integrated PQC Processor by ResQuant is a specialized product that comes pre-equipped with a comprehensive NIST PQC cryptography suite. This FPGA is tailored for applications requiring a robust proof-of-concept for quantum-safe implementations. It ensures seamless integration into existing systems, providing a practical platform for testing and deployment in quantum-secure environments. This product is available at a competitive price and represents an ideal starting point for entities looking to explore and adopt quantum-resilient technologies. Its configuration allows for straightforward implementation in diverse hardware infrastructures while offering a reliable option for organizations aiming to stay ahead in the evolving cyber security landscape. By incorporating the latest in cryptographic standards and ensuring vendor independence, the Cyclone V FPGA with Integrated PQC Processor by ResQuant effectively bridges current hardware technologies and future-proof security needs. It supports industry-wide applications, from IoT and ICT to automotive and military sectors, underscoring ResQuant's versatility in hardware security solutions.
EverOn represents sureCore's commitment to providing low power solutions with its Single Port Ultra Low Voltage (ULV) SRAM, silicon-proven on the 40ULP BULK CMOS process. This IP achieves up to 80% savings in dynamic power consumption and an impressive 75% reduction in static power, suitable for modern applications needing broad voltage operation. EverOn distinguishes itself with a wide operating range from 0.6V to 1.21V, offering adaptability for Internet of Things (IoT) applications and wearable technology demanding extreme power optimization. It offers a remarkable 20MHz cycle time at its minimal operating voltage of 0.6V, successfully scaling to over 300MHz at 1.21V, thus balancing power efficiency and performance. Supporting synchronous single port SRAM designs with extensive memory capacity ranging from 8Kbytes to 576Kbytes, EverOn incorporates sureCore’s "SMART-Assist" technology. It ensures robust operation right down to retention voltages, while its advanced architectural features, like bank subdivision with enhanced sleep modes, deliver flexibility that is critical for optimizing battery life in various operational contexts.
ArrayNav is a groundbreaking GNSS solution utilizing patented adaptive antenna technology, crafted to provide automotive Advanced Driver-Assistance Systems (ADAS) with unprecedented precision and capacity. By employing multiple antennas, ArrayNav substantially enhances sensitivity and coverage through increased antenna gain, mitigates multipath fading with antenna diversity, and offers superior interference and jamming rejection capabilities. This advancement leads to greater accuracy in open environments and markedly better functionality within urban settings, often challenging due to signal interference. It is designed to serve both standalone and cloud-dependent use cases, thereby granting broad application flexibility.
CodaCache is Arteris' solution for addressing memory latency issues in SoC designs through an optimized last-level cache configuration. This sophisticated shared cache greatly improves the data flow within the system, leading to enhanced overall SoC performance and power efficiency. By reducing reliance on main memory for frequently accessed data, it minimizes delays and energy consumption, making it ideal for modern computing workloads. Configurable to meet diverse performance and efficiency needs, CodaCache allows fine-tuning that unlocks its full potential in various scenarios. This includes seamless integration through AXI support, which facilitates efficient component communication, expediting developments and modularity in SoC architectures. With a focus on ensuring high performance through reduced latencies and lower power requirements, CodaCache is essential for applications seeking to strike a balance between speed and energy efficiency. The cache’s design emphasizes quicker access to stored data, which is pivotal for industries striving to develop faster processing capabilities without increasing power consumption and development time.
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