All IPs > Wireless Communication
The Wireless Communication category at Silicon Hub encompasses a diverse array of semiconductor IPs designed to facilitate seamless wireless connectivity in today's rapidly evolving technological landscape. As the demand for higher data rates and uninterrupted connectivity grows, these IPs play a vital role in enabling devices to communicate efficiently across various protocols and standards. This category includes highly specialized IPs that support the implementation and enhancement of wireless communication technologies in a variety of applications ranging from consumer electronics to industrial systems.
Within this category, semiconductor IPs cover a wide spectrum of wireless standards and protocols. This includes evolving mobile communication standards like 3GPP-5G and LTE, which are essential for cellular networks' operation and are pivotal in the deployment of the latest 5G networks. For localized wireless communication, standards such as 802.11 (commonly referred to as Wi-Fi), Bluetooth, NFC, and Wireless USB are covered, facilitating device interconnectivity and data exchange in numerous consumer electronics, IoT devices, and more. Industrial and professional applications may utilize IPs related to standards like WiMAX (802.16), CPRI, OBSAI, which are crucial for network infrastructure and robust communication systems.
In addition to these, the Wireless Communication category includes IPs for satellite navigation systems like GPS, ensuring accurate geolocation services essential for navigation devices in both personal and commercial use. Standards like UWB (Ultra-Wideband) offer high-speed data transmission over short ranges, beneficial for applications demanding rapid short-range communication. Furthermore, for high-definition broadcasting, IPs supporting Digital Video Broadcast standards offer necessary capabilities to meet market demands for clear and reliable video content transmission.
This extensive category of semiconductor IPs under Wireless Communication not only provides the architectural needs for state-of-the-art communication devices but also accommodates future technological advancements. By integrating these IPs, semiconductor product designers and engineers can efficiently develop solutions tailored for enhanced connectivity, ensuring their products remain at the forefront of technological innovation and meet the ever-growing expectations of modern consumers for instant and reliable wireless communication. Whether you are developing next-gen smartphones, IoT solutions, or advanced networking systems, these IPs are critical components in achieving superior performance and connectivity.
The Akida Neural Processor IP by BrainChip is a versatile AI solution that melds neural processing capabilities with scalable digital architecture, delivering high performance with minimal power consumption. At its core, this processor is engineered using principles from neuromorphic computing to address the demands of AI workloads with precision and speed. By enabling efficient computations with sparse data, the Akida Neural Processor optimizes sparse data, weights, and activations, making it especially suitable for AI applications that demand real-time processing with low latency. It provides a flexible solution for implementing neural networks with varying complexities and is adaptable to a wide array of use cases from audio processing to visual recognition. The IP core’s configurable framework supports the execution of complex neural models on edge devices, effectively running sophisticated neural algorithms like Convolutional Neural Networks (CNNs) without the need for complementary computing resources. This standalone operation capability reduces dependency on external CPUs, driving down power consumption and liberating devices from constant network connections.
The Akida 2nd Generation processor further advances BrainChip's AI capabilities with enhanced programmability and efficiency for complex neural network operations. Building on the principles of its predecessor, this generation is optimized for 8-, 4-, and 1-bit weights and activations, offering more robust activation functions and support for advanced temporal and spatial neural networks. A standout feature of the Akida 2nd Generation is its enhanced teaching capability, which includes learning directly on the chip. This enables the system to perform one-shot and few-shot learning, significantly boosting its ability to adapt to new tasks without extensive reprogramming. Its architecture supports more sophisticated machine learning models such as Convolutional Neural Networks (CNNs) and Spatio-Temporal Event-Based Neural Networks, optimizing them for energy-efficient application at the edge. The processor's design reduces the necessity for host CPU involvement, thus minimizing communication overhead and conserving energy. This makes it particularly suitable for real-time data processing applications where quick and efficient data handling is crucial. With event-based hardware that accelerates processing, the Akida 2nd Generation is designed for scalability, providing flexible solutions across a wide range of AI-driven tasks.
The Low Density Parity Check (LDPC) codes are powerful, capacity approaching channel codes and have exceptional error correction capabilities. The high degree of parallelism that they offer enables efficient, high throughput hardware architectures. The ntLDPC_WiFi6 IP Core is based on an implementation of QC-LDPC Quasi-Cyclic LDPC Codes and is fully compliant with IEEE 802.11 n/ac/ax standard. The Quasi-Cyclic LDPC codes are based on block-structured LDPC codes with circular block matrices. The entire parity check matrix can be partitioned into an array of block matrices; each block matrix is either a zero matrix or a right cyclic shift of an identity matrix. The parity check matrix designed in this way can be conveniently represented by a base matrix represented by cyclic shifts. The main advantage of this feature is that they offer high throughput at low implementation complexity. The ntLDPC_WiFi6 decoder IP Core may optionally implement one of two approximations of the log-domain LDPC iterative decoding algorithm (Belief propagation) known as either Layered Normalized Offset Min-Sum Algorithm or Layered Lambda-min Algorithm. Selecting between the two algorithms presents a decoding performance .vs. system resources utilization trade-off. The core is highly reconfigurable and fully compliant to the IEEE 802.11 n/ac/ax Wi-Fi4, Wi-Fi5 and Wi-Fi 6 standards. The ntLDPC_WiFi6 encoder IP implements a 81-bit parallel systematic LDPC encoder. An off-line profiling Matlab script processes the original matrices and produces a set of constants that are associated with the matrix and hardcoded in the RTL encoder.
**Ceva-XC21** is the most efficient vector DSP core available today for communications applications. The Ceva-XC21 DSP is designed for low-power, cost- and size-optimized cellular IoT modems, NTN VSAT terminals, eMBB and uRLLC applications. Ceva-XC21 offers scalable architecture and dual thread design with support for AI, addressing growing demand for smarter, yet more cost and power efficient cellular devices. Targeted for 5G and 5G-Advanced workloads, the Ceva-XC21 has multiple products configurations enabling system designers to optimize the size and cost to their specific application needs. The Ceva-XC21, based on the advanced Ceva-XC20 architecture, features a product line of 3 vector DSP cores. Each of the cores offers a unique performance & area configuration with a SW compatibility between them. The different cores span across single thread or dual thread configurations, and 32 or 64 16bits x 16bits MACs. The Ceva-XC212, the highest performing variant of the Ceva-XC21 delivers up to 1.8x times the performance of Ceva’s previous-generation Ceva-XC4500 architecture, while reducing the core area. Ceva-XC210, the smallest configuration of the Ceva-XC21, enables system designers to reduce the core die size in 48% compared with the previous generation. Ceva-XC211 offers the same performance envelope compared with the previous generation at 63% of the area. [**Learn more about Ceva-XC21>**](https://www.ceva-ip.com/product/ceva-xc21/?utm_source=silicon_hub&utm_medium=ip_listing&utm_campaign=ceva_xc21_page)
The **Ceva-Waves Bluetooth platform** includes field-proven hardware IP for baseband controller, modem, and 2.4 GHz RF transceiver functions, and allows use of many third-party radio IPs as well. The platform includes optimized baseband controller hardware and software, and above the Host Controller Interface (HCI) a host-agnostic software protocol stack supporting all major Bluetooth profiles. The built-in 802.15.4 add-on suite shares the same Bluetooth radio, and includes IEEE 802.15.4 MAC & modem hardware IP and software, and is compatible with Zigbee, Thread and Matter host protocol stacks. The Ceva-Waves Bluetooth platform is also available as part of the **Ceva-Waves Links family** of multi-protocol turnkey platforms, including with optimized Wi-Fi & Bluetooth co-existence interface and packet traffic arbiter. The Ceva-Waves Bluetooth platforms also comprises a state-of-the-art radio in TSMC 12nm FFC+ supporting all the latest Bluetooth 6.0 dual mode features, along with next gen Bluetooth High Data Throughput and IEEE 802.15.4. Its innovative architecture provides best in class performance in term of power consumption, die size, sensitivity and output power. [**Learn more about Ceva's Bluetooth solution>**](https://www.ceva-ip.com/product/ceva-waves-bluetooth/?utm_source=silicon_hub&utm_medium=ip_listing&utm_campaign=ceva_waves_bluetooth_page)
**Ceva-Waves UWB platform** cuts the development time and risk for implementing a wide range of UWB functionality in SoCs. It provides optimized MAC and PHY hardware IP and supporting software for secure and accurate ranging, and Doppler Radar presence detection applications. It can be implemented in an SoC independently or in conjunction with the Ceva-Waves Bluetooth platform, as well as part of the Ceva-Waves Links family of multiprotocol platforms. The Ceva-Waves UWB platform includes hardware IP for an optimized UWB MAC and PHY meeting 802.15.4 HRP, FiRa 3.0, and the Car Connectivity Consortium Digital Key 3.0 (CCC DK3.0) requirements. The platform includes advanced Wi-Fi interference suppression. A comprehensive suite of CPU-agnostic software stacks that support FiRa 3.0 MAC, CCC DK3.0 MAC, and radar for implementing applications such as automotive digital keys and in-cabin child-presence detection (CPD), general power-saving presence detection in laptops, TVs and smart buildings, asset tracking tags, real-time location services (RTLS), and tap-free payment. [**Learn more about our UWB soluion>**](https://www.ceva-ip.com/product/ceva-waves-uwb/?utm_source=silicon_hub&utm_medium=ip_listing&utm_campaign=ceva_waves_uwb_page)
The Jotunn 8 is heralded as the world's most efficient AI inference chip, designed to maximize AI model deployment with lightning-fast speeds and scalability. This powerhouse is crafted to efficiently operate within modern data centers, balancing critical factors such as high throughput, low latency, and optimization of power use, all while maintaining a sustainable infrastructure. With the Jotunn 8, AI investments reach their full potential through high-performance inference solutions that significantly reduce operational costs while committing to environmental sustainability. Its ultra-low latency feature is crucial for real-time applications such as chatbots and fraud detection systems. Not only does it deliver high throughput needed for demanding services like recommendation engines, but it also proves cost-efficient, aiming to lower the cost per inference crucial for businesses operating at a large scale. Additionally, the Jotunn 8 boasts performance per watt efficiency, a major factor considering that power is a significant operational expense and a driver of the carbon footprint. By implementing the Jotunn 8, businesses can ensure their AI models deliver maximum impact while staying competitive in the growing real-time AI services market. This chip lays down a new foundation for scalable AI, enabling organizations to optimize their infrastructures without compromising on performance.
KPIT Technologies offers comprehensive AUTOSAR solutions that are pivotal for the development of modern, adaptive automotive systems. Emphasizing middleware integration and E/E architecture transformation, their solutions simplify the complexities of implementing adaptive AUTOSAR platforms, enabling streamlined application development and expeditious vehicle deployment. With extensive experience in traditional and adaptive AUTOSAR ecosystems, KPIT assists OEMs in navigating the challenges associated with software-defined vehicles. Their expertise facilitates the separation of hardware and software components, which is crucial for the future of vehicle digital transformation. KPIT's middleware development capabilities enhance vehicle systems' robustness and scalability, allowing for seamless integration across various automotive applications and ensuring compliance with industry standards. By fostering strategic partnerships and investing in cutting-edge technology solutions, KPIT ensures that its clients can confidently transition to and maintain advanced AUTOSAR platforms. The company's commitment to innovation and excellence positions it as a trusted partner for automakers striving to stay ahead in the competitive automotive landscape by embracing the shift towards fully software-defined vehicles.
KPIT Technologies offers advanced ADAS and autonomous driving solutions designed to accelerate the widespread adoption of Level 3+ autonomy. The company addresses key challenges such as safety, feature development limitations, and validation fragmentation by integrating robust safety protocols and conducting thorough testing across various driving scenarios. Their solutions enhance the intelligence and reliability of autonomous systems by leveraging AI-driven decision-making, which goes beyond basic perception capabilities. KPIT's comprehensive validation frameworks and simulation environments ensure continuous and thorough validation of autonomous driving frameworks. By integrating AI-based perception and planning with system engineering and functional safety practices, KPIT empowers automakers to produce vehicles that are safe, reliable, and paving the way for autonomous mobility. Their strategic partnerships and domain expertise make KPIT a leader in automating vehicle development processes, ensuring readiness for the challenges of scaling autonomous vehicles. Through these innovations, KPIT continues to address the dynamic challenges of autonomous driving, providing automakers with the tools needed to develop increasingly advanced and autonomous vehicles well-positioned for future success.
KPIT Technologies' Integrated Diagnostics & Aftersales Transformation (iDART) platform addresses the evolving complexities of maintaining software-defined vehicles. Offering a comprehensive suite of tools and services, iDART facilitates efficient diagnostic development, validation, and aftersales service transformation. As vehicles become more software-centric, iDART assists in managing diagnostics across varied hardware and software configurations, ensuring seamless integration and service continuity. The platform excels in automated validation processes, ensuring data accuracy and compliance from legacy to modern systems. KPIT's guided diagnostics and remote troubleshooting solutions enhance first-time-right repair ratios by providing technicians with precise insights, reducing vehicle downtime and improving service throughput. This diagnostic content management streamlines operations and reduces warranty costs, vital for OEMs balancing innovation with sustainability. iDART's focus on service lifecycle management ensures that OEMs can offer enhanced customer engagement beyond the first vehicle owner, fostering lasting customer relationships. Through advanced diagnostic frameworks, KPIT sets a new standard for vehicle service operations, addressing the growing complexities within the automotive industry. By integrating thoroughly tested frameworks and leveraging machine learning-driven diagnostics, KPIT aligns its services with future vehicle ecosystem demands.
**Ceva-Waves Links** is a growing family of multi-standard wireless platforms. By optimizing connectivity support for various combinations of **Wi-Fi, Bluetooth, 802.15.4, and ultra-wideband (UWB)**, the Ceva-Waves Links family provides preconfigured, optimized solutions for SoCs requiring multiple connectivity standards. All Ceva-Waves Links configurations are based on field-proven Ceva-Waves hardware IP and software stacks. Unique Ceva coexistence algorithms ensure efficient and interference-free operation of multiple connections while sharing one radio. The **Ceva-Waves Links family** offers combinations of Ceva-Waves Wi-Fi, Ceva-Waves Bluetooth, 802.15.4 (supporting protocols such as Thread, Matter and Zigbee), and Ceva-Waves UWB hardware IP, integrated with Ceva or third-party radios and CPU- and OS-agnostic software stacks. New platforms will be introduced to address market trends or customers’ demands. [**Learn more about Ceva-Waves Links family solution>**](https://www.ceva-ip.com/product/ceva-waves-links/?utm_source=silicon_hub&utm_medium=ip_listing&utm_campaign=ceva_waves_links_page)
EW6181 is an IP solution crafted for applications demanding extensive integration levels, offering flexibility by being licensable in various forms such as RTL, gate-level netlist, or GDS. Its design methodology focuses on delivering the lowest possible power consumption within the smallest footprint. The EW6181 effectively extends battery life for tags and modules due to its efficient component count and optimized Bill of Materials (BoM). Additionally, it is backed by robust firmware ensuring highly accurate and reliable location tracking while offering support and upgrades. The IP is particularly suitable for challenging application environments where precision and power efficiency are paramount, making it adaptable across different technology nodes given the availability of its RF frontend.
The HOTLink II Product Suite is engineered to deliver advanced capabilities in high-speed data and video link technologies. It serves as an essential toolset for developing and implementing HOTLink II protocols effectively, catering to the specific needs of modern avionics systems requiring reliable and high-throughput data transfer. This suite includes various components that enable the seamless transmission and conversion of data, supporting both development and operational phases. Its design incorporates technologies that enhance data integrity and efficiency, making it integral to systems where performance and reliability are critical. Great River Technology ensures that each component of the HOTLink II suite is crafted with precision, providing comprehensive support and simplifying integration processes. The suite redounds to the extensive expertise of Great River Technology in the sector, reinforcing their standing as providers of pioneering solutions.
Polar ID is a groundbreaking biometric security solution designed for smartphones, providing a secure and convenient face unlock feature. Employing advanced meta-optic technology, Polar ID captures the polarization signature of a human face, offering an additional layer of security that easily identifies human tissue and foils sophisticated 3D mask attempts. This technology enables ultra-secure facial recognition in diverse environments, from daylight to complete darkness, without compromising on the user experience. Unlike traditional facial recognition systems, Polar ID operates using a simple, compact design that eliminates the need for multiple optical modules. Its unique capability to function in any lighting condition, including bright sunlight or total darkness, distinguishes it from conventional systems that struggle under such scenarios. Furthermore, the high resolution and precision of Polar ID ensure reliable performance even when users have their face partially obscured by sunglasses or masks. With its cost-effectiveness and small form factor, Polar ID is set to disrupt the mobile device market by making secure biometric authentication accessible to a broader range of smartphones, not just high-end models. By simplifying the integration of facial recognition technology, Polar ID empowers mobile devices to replace less secure, inconvenient fingerprint sensors, thus broadening the reach and applicability of facial biometrics in consumer electronics.
The ORC3990 is a groundbreaking LEO Satellite Endpoint SoC engineered for use in the Totum DMSS Network, offering exceptional sensor-to-satellite connectivity. This SoC operates within the ISM band and features advanced RF transceiver technology, power amplifiers, ARM CPUs, and embedded memory. It boasts a superior link budget that facilitates indoor signal coverage. Designed with advanced power management capabilities, the ORC3990 supports over a decade of battery life, significantly reducing maintenance requirements. Its industrial temperature range of -40 to +85 degrees Celsius ensures stable performance in various environmental conditions. The compact design of the ORC3990 fits seamlessly into any orientation, further enhancing its ease of use. The SoC's innovative architecture eliminates the need for additional GNSS chips, achieving precise location fixes within 20 meters. This capability, combined with its global LEO satellite coverage, makes the ORC3990 a highly attractive solution for asset tracking and other IoT applications where traditional terrestrial networks fall short.
Introducing the CANmodule-III, a highly advanced Controller Area Network (CAN) controller that offers enhanced communication capabilities for embedded systems. This document outlines the advanced features of CANmodule-III, which includes support for multiple mailboxes and compatibility with CAN 2.0B standards. Designed with flexible interface options, it optimizes embedded communication performance in various automation and control applications. The CANmodule-III features robust data handling capabilities, making it ideal for automotive and industrial control systems where reliable data transmission is critical. With support for sophisticated error checking and message filtering, this controller ensures data integrity across complex systems. Built for integration across a wide array of systems, the CANmodule-III offers unparalleled reliability and flexibility. It is a crucial component for any application requiring robust, high-speed data exchange on a CAN bus, further enhanced by its capability to operate under varying environmental conditions.
The ntLDPC_5GNR Base Graph Encoder IP Core is defined in 3GPP TS 38.212 standard document and it is based on an implementation of QC-LDPC Quasi-Cyclic LDPC Codes. The specification defines two sets of LDPC Base Graphs and their respective derived Parity Check Matrices. Each Base Graph can be combined with 8 sets of lifting sizes (Zc) in a total of 51 different lifting sizes. This way by using the 2 Base Graphs, the 5G NR specification defines up to 102 possible distinct LDPC modes of operation to select from, for optimum decoding performance, depending on target application code block size and code rate (using the additional rate matching module features). For Base Graph 1 we have LDPC(N=66xZc,K=22xZc) sized code blocks, while for Base Graph 2 we have LDPC(N=50xZc,K=[6,8,9,10]xZc) sized code blocks. The ntLDPCE_5GNR Encoder IP implements a multi-parallel systematic LDPC encoder. Parallelism depends on the selected lifting sizes subsets chosen for implementation. Shortened blocks are supported with granularity at lifting size Zc-bit boundaries. Customizable modes generation is also supported beyond the scope of the 5G-NR specification with features such as: “flat parity bits puncturing instead of Rate Matching Bit Selection”, “maintaining the first 2xZc payload bits instead of eliminating it before transmission”, etc. The ntLDPCD_5GNR decoder IP implements a maximum lifting size of Zc_MAX-bit parallel systematic LDPC layered decoder. Each layer corresponds to Zc_MAX expanded rows of the original LDPC matrix. Each layer element corresponds to the active ZcxZc shifted identity sub-matrices within the layer. Each layer element is shifted accordingly and processed by the parallel decoding datapath unit, in order to update the layers LLR estimates and extrinsic information iteratively until the required number of decoding iterations has been run. The decoder IP also features a powerful optional early termination (ET) criterion, to maintain practically equivalent error correction performance, while significantly increasing its throughput rate and/or reducing hardware cost. Additionally it reports how many decoding iterations have been performed when ET is activated, for system performance observation and calibration purposes. Finally a simple, yet robust, flow control handshaking mechanism is included in both IPs, which is used to communicate the IPs availability to adjacent system components. This logic is easily portable into any communication protocol, like AXI4 stream IF.
**Ceva-Waves Dragonfly platform** is a turnkey platform with optimized, low-power hardware IP and protocol software for implementing narrow-band IoT (NB-IoT) cellular modem SoCs. Extensions provide support for GNSS such as GPS and BeiDou and for sensor-fusion applications. The Ceva-Waves Dragonfly platform comprises hardware IP with an enhanced Ceva-BX1 processor, specific hardware accelerators, and SoC infrastructure IP. Software includes NB-IoT protocol stack for L1 through L3 functions including encryption and software PHY, a task-optimized RTOS, and optional GNSS receiver and control software, all executing on the Ceva-BX1. Pre-certified for 3GPP Release 15 CAT NB2, the solution is tuned for small footprint and extremely low power, yet has headroom for additional software-defined functions, such as sensor fusion. [**Learn more about Ceva-Waves Dragonfly>**](https://www.ceva-ip.com/product/ceva-waves-dragonfly/?utm_source=silicon_hub&utm_medium=ip_listing&utm_campaign=ceva_waves_dragonfly_page)
Convolutional FEC codes are very popular because of their powerful error correction capability and are especially suited for correcting random errors. The most effective decoding method for these codes is the soft decision Viterbi algorithm. ntVIT core is a high performance, fully configurable convolutional FEC core, comprised of a 1/N convolutional encoder, a variable code rate puncturer/depuncturer and a soft input Viterbi decoder. Depending on the application, the core can be configured for specific code parameters requirements. The highly configurable architecture makes it ideal for a wide range of applications. The convolutional encoder maps 1 input bit to N encoded bits, to generate a rate 1/N encoded bitstream. A puncturer can be optionally used to derive higher code rates from the 1/N mother code rate. On the encoder side, the puncturer deletes certain number of bits in the encoded data stream according to a user defined puncturing pattern which indicates the deleting bit positions. On the decoder side, the depuncturer inserts a-priori-known data at the positions and flags to the Viterbi decoder these bits positions as erasures. The Viterbi decoder uses a maximum-likelihood detection recursive process to cor-rect errors in the data stream. The Viterbi input data stream can be composed of hard or soft bits. Soft decision achieves a 2 to 3dB in-crease in coding gain over hard-decision decoding. Data can be received continuously or with gaps.
The TW330 is part of TAKUMI’s robust line of graphics solutions, showcasing a refined architecture specifically for optimizing embedded system graphics. This product extends TAKUMI's reputation for producing effective hardware solutions that balance performance with low power consumption and minimal CPU load. Especially suitable for digital display devices, the TW330 offers a pronounced efficiency in graphics rendering, setting the stage for enhanced visuals and user interactivity. It aligns with application needs that require impressive performance without compromise on power. By elevating graphics capabilities, the TW330 continues to serve the needs of sophisticated graphic systems. It remains a testament to TAKUMI's innovation in providing top-of-the-line graphics IP solutions to meet the high expectations of today's digital technology demands.
**Ceva-PentaG2** is a complete IP platform for implementing a wide range of user-equipment and IoT cellular modems. The platform includes a variety of DSPs, modem hardware modules, software libraries, and simulation tools. Capabilities of the Ceva-PentaG2 include New Radio (NR) physical layer design ranging across all 3GPP profiles from RedCap IoT and mMTC, through eMBB up to ultra-reliable low-latency communications (URLLC). The platform has two base configurations. Ceva-PentaG2 Max emphasizes performance and scalability for enhanced mobile broadband (eMBB) and future proofing design for next generation 5G-Advanced releases. Ceva-PentaG2 Lite emphasizes extreme energy and area efficiency for lower-throughput applications such as LTE Cat 1, RedCap, and optimized cellular IoT applications. The PentaG2 platform comprises a set of Ceva DSP cores, optimized fixed-function hardware accelerators, and proven, optimized software modules. By using this platform, designers can implement optimized, hardware-accelerated processing chains for all main modem functions. In the selection process, designers can tune their design for any point across a huge space of area, power consumption, latency, throughput, and channel counts. Solutions can fit applications ranging from powerful eMBB for mobile and Fixed Wireless Access (FWA) devices to connected vehicles, cellular IoT modules, and even smart watches. System-C models in Ceva’s Virtual Platform Simulator (VPS) aid architectural exploration and system tuning, while an FPGA-based emulation kit speeds SoC integration. [**Learn more about Ceva-PentaG2 solution>**](https://www.ceva-ip.com/product/ceva-pentag2/?utm_source=silicon_hub&utm_medium=ip_listing&utm_campaign=ceva_pentag2_page)
The High PHY Accelerators from AccelerComm are a collection of signal processing cores designed for ASIC, FPGA, and SoC applications, primarily focused on boosting 5G NR communications. These accelerators incorporate proprietary algorithms that allow users to attain the highest levels of throughput, efficiency, and power savings. These accelerator cores are engineered to facilitate seamless integration into existing systems, significantly improving spectral efficiency through advanced processing techniques. The use of patented algorithms allows for overcoming system noise and interference, delivering superior performance for complex wireless communication networks. Moreover, these accelerators excel at minimizing latency and resource consumption, providing an optimal balance between high performance and low power requirements. Recognized for their flexibility, these accelerators support scalable architectures, customizable for various deployment scenarios. This versatility ensures operators and developers can adapt solutions to fit small, cost-sensitive applications or larger enterprise demands, enhancing the ability to handle high data volumes with integrity and reliability.
The ADQ35 is a high-throughput digitizer designed for critical signal processing applications. Known for its 12-bit accuracy and high sampling rates, it stands out in delivering up to 10 GSPS, supporting single or dual-channel data streams. This ensures data integrity and speed for applications that demand precision and reliability, such as telecommunications and high-speed imaging. Equipped with enhanced processing capabilities, the ADQ35 ensures superior handling of complex datasets, making it suitable for scientific research and advanced electronics projects. Its robust design caters to the needs of modern digital systems, allowing for a seamless integration into existing infrastructure to facilitate expansive projects. This device also features streaming capabilities that provide a continuous flow of high-quality data, excelling in applications that require constant monitoring and data analysis. The ADQ35 digitizer is an excellent choice for industries that rely on swift and accurate data interpretation, enhancing overall system performance and technical output.
The 802.11ah HaLow Transceiver is engineered to fulfill the demands of modern IoT applications, where low power consumption and extended range are critical. It aligns with the IEEE 802.11ah standard, commonly termed as Wi-Fi HaLow™, and offers exceptional flexibility for new generations of IoT and mobile devices.\n\nBoasting features like low noise direct conversion and integrated calibration for I/Q pathways, this transceiver supports multiple modulation bandwidths, including 1 MHz, 2 MHz, and up to 4 MHz. With its capabilities spanning significant frequency ranges, the design ensures stable connectivity with minimum latency and enhanced receiver sensitivity.\n\nOne of its strengths lies in extensibility, providing superb integration potential either as a part of a broader system-on-chip (SoC) or as a standalone communication module. Designed with minimal power draw, it also allows using external power amplifiers to enhance transmission power, aligning with diverse application needs such as asset tracking, building security, and broader sensor networks.
Systems4Silicon's Digital PreDistortion (DPD) Solution is designed to significantly enhance the power efficiency of RF power amplifiers. This subsystem is complete and adaptive, providing a scalable solution that transcends the limitations typical of vendor-specific dependencies. On account of its universal compatibility, this IP core can be compiled for any ASIC or FPGA/SoC platform, serving as an all-encompassing solution suited for a diverse array of wireless communication systems such as 5G and multi-carrier setups. One of the standout features of the DPD technology is its capability to improve transmission bandwidth efficiently, offering scalability for bandwidths of up to 1 GHz or more. This positions the DPD solution as a forward-thinking technology, catering to modern demands for higher data rates and broader communication ranges. The adaptive nature of the solution ensures that it can modulate performance parameters in real-time, responding dynamically to varying operational conditions and system requirements, thereby maximizing amplifier efficiency across different setups. In operational terms, the DPD Solution is field-proven, reflecting its reliability and performance in real-world applications. It represents a versatile technology that integrates seamlessly with existing systems, delivering a robust enhancement to power amplifier efficiency while maintaining high compatibility with emerging communication standards. The flexibility of this technology makes it a vital asset in the infrastructure of contemporary wireless networks, ensuring smooth and efficient signal transmission.
Polar coding, a relatively recent addition to the 5G NR suite of technologies, is embraced by AccelerComm through their unique design that facilitates higher degrees of parallel processing. This advancement ensures operational efficiency and minimizes resource usage, thereby improving system robustness and throughput in 5G NR control channels. By employing a patented architecture, Polar coding exhibits flexibility and scalability, key to supporting high-performance 5G requirements. The reduced burden on hardware resources enables it to deliver superior BLER performance, crucial for meeting the stringent demands of modern telecommunications standards. Delivering across a spectrum of platforms, whether hardware-based like ASIC and FPGA or software-driven, Polar coding maintains a high degree of integration ease. This allows rapid deployment and alignment with existing infrastructure, ensuring seamless communication and data integrity in a wide array of network scenarios.
GNSS Sensor Ltd offers the GNSS VHDL Library, a powerful suite designed to support the integration of GNSS capabilities into FPGA and ASIC products. The library encompasses a range of components, including configurable GNSS engines, Viterbi decoders, RF front-end control modules, and a self-test module, providing a comprehensive toolkit for developers. This library is engineered to be highly flexible and adaptable, supporting a wide range of satellite systems such as GPS, GLONASS, and Galileo, across various configurations. Its architecture aims to ensure independence from specific CPU platforms, allowing for easy adoption across different systems. The GNSS VHDL Library is instrumental in developing cost-effective and simplified system-on-chip solutions, with capabilities to support extensive configurations and frequency bandwidths. It facilitates rapid prototyping and efficient verification processes, crucial for deploying reliable GNSS-enabled devices.
The Digital Radio (GDR) from GIRD Systems is an advanced software-defined radio (SDR) platform that offers extensive flexibility and adaptability. It is characterized by its multi-channel capabilities and high-speed signal processing resources, allowing it to meet a diverse range of system requirements. Built on a core single board module, this radio can be configured for both embedded and standalone operations, supporting a wide frequency range. The GDR can operate with either one or two independent transceivers, with options for full or half duplex configurations. It supports single channel setups as well as multiple-input multiple-output (MIMO) configurations, providing significant adaptability in communication scenarios. This flexibility makes it an ideal choice for systems that require rapid reconfiguration or scalability. Known for its robust construction, the GDR is designed to address challenging signal processing needs in congested environments, making it suitable for a variety of applications. Whether used in defense, communications, or electronic warfare, the GDR's ability to seamlessly switch configurations ensures it meets the evolving demands of modern communications technology.
The FCM1401 is a 14GHz CMOS Power Amplifier tailored for Ku-band applications, operating over a frequency range of 12.4 to 16 GHz. This amplifier exhibits a gain of 22 dB and a saturated output power (Psat) of 19.24 dBm, ensuring optimal performance with a power-added efficiency (PAE) of 47%. The architecture enables reduction in battery consumption and heat output, making it ideal for satellite and telecom applications. Its small silicon footprint facilitates integration in space-constrained environments.
AccelerComm offers an innovative LDPC solution specifically for 5G NR systems, pushing the boundaries of performance with its advanced block-parallel and row-parallel architectures. This sophisticated solution enhances data channel performance by utilizing a combination of scalability, high throughput, and low latency to maintain optimal communication systems. The LDPC solution effectively addresses standard 5G data channels, achieving substantive gains in resource utilization efficiency. By improving the already stringent latency specifications to support numerology 4, the solution ensures comprehensive code and transport block processing capabilities. It also upholds IEEE standards, providing a compliant pathway for high reliability and operational efficiency. Designed for integration across multiple platforms, including ASIC, FPGA, and software form factors, LDPC’s flexibility allows for deployment in a range of network conditions. Its open standard software interfaces make it easily adaptable, presenting a robust and versatile framework for companies to enhance their 5G network communication protocols with minimal effort.
The CANmodule-IIIx extends the functionality of the standard CANmodule-III, offering more flexibility with additional mailboxes for both transmitting and receiving messages. This allows for an even higher level of message management, making it an ideal choice for complex systems requiring extensive CAN bus communication. Specifically designed for integration into larger systems, the CANmodule-IIIx supports 32 receive and 32 transmit mailboxes, each capable of handling intricate communication tasks with ease. The architecture supports quick and efficient data handling, ensuring minimal latency in communication exchanges, which is vital for time-critical applications. Moreover, this module supports sophisticated error management and customized message filtering, enhancing the reliability of data transmission in industrial and automotive environments. The CANmodule-IIIx continues to support compliance with CAN 2.0B protocols, ensuring it fits seamlessly into existing CAN networks without requiring extensive modifications.
D2D® Technology, developed by ParkerVision, is a revolutionary approach to RF conversion that transforms how wireless communication operates. This technology eliminates traditional intermediary stages, directly converting RF signals to digital data. The result is a more streamlined and efficient communication process that reduces complexity and power consumption. By bypassing conventional analog-to-digital conversion steps, D2D® achieves higher data accuracy and reliability. Its direct conversion approach not only enhances data processing speeds but also minimizes energy usage, making it an ideal solution for modern wireless devices that demand both performance and efficiency. ParkerVision's D2D® technology continues to influence a broad spectrum of wireless applications. From improving the connectivity in smartphones and wearable devices to optimizing signal processing in telecommunication networks, D2D® is a cornerstone of ParkerVision's technological offerings, illustrating their commitment to advancing communication technology through innovative RF solutions.
**Ceva-Waves Wi-Fi platforms portfolio** provide a comprehensive selection of hardware IP and CPU-agnostic host software for energy-efficient SoC implementation of any of a wide range of Wi-Fi subsystems, from Wi-Fi 4 to Wi-Fi 7, for both client devices and access points. The portfolio includes a suite of pre-optimized solutions for various generations and configurations for specific Wi-Fi uses, power consumption levels, and price points, ranging from low-bandwidth IoT connectivity to high-bandwidth hubs. Embedded into one of the Ceva-Waves Links multi-protocol wireless platforms, the Ceva-Waves Wi-Fi IPs can efficiently co-exist with the Ceva-Waves Bluetooth IPs and/or Ceva-Waves UWB IP. The Ceva-Waves Wi-Fi platforms comprise hardware modem PHY IP that supports DSSS, CCK, OFDM and OFDMA modulations; optimized MAC IP that offloads MAC functions from the CPU; and a comprehensive selection of MAC protocol software stacks. The IP and software elements are further organized into three main solution profiles. * Wi-Fi IoT is for energy-efficient low-bandwidth connectivity for IoT devices, supporting 2.4GHz single band or dual/triple bands on 2.4/5/6 GHz for IEEE 802.11n, ax, or be (Wi-Fi 4, 6 or 7). * Wi-Fi High-Performance supports up to 160 MHz bands at 2.4, 5, or 6 GHz in either single-antenna or 2×2 MIMO mode for IEEE 802.11ax or be (Wi-Fi 6 or 7), and is intended for consumer media-streaming applications. * Wi-Fi Access Point supports 160 MHz bands and 2×2 MIMO for IEEE 802.11ax or be (Wi-Fi 6/6E/7), for applications such as media access points, gateways, and small-cell offload that must support up to hundreds of clients. The Ceva-Waves Wi-Fi platforms include a coexistence interface that permits highly efficient operation with the Ceva-Waves Bluetooth platforms. [**Learn more about Ceva-Waves Wi-Fi solution>**](https://www.ceva-ip.com/product/ceva-waves-wi-fi/?utm_source=silicon_hub&utm_medium=ip_listing&utm_campaign=ceva_waves_wifi_page)
The Hyperspectral Imaging System by Imec enables detailed spectral imaging by capturing data across multiple wavelengths. This technology is pivotal for applications requiring precise material composition analysis and object identification, such as in agriculture and environmental monitoring. The system uses a compact and integrated design making it adaptable and efficient for various uses. Imec's hyperspectral imaging technology paves the way for advancements in remote sensing, where it can provide critical insights into land usage and resource management. Its high spectral resolution coupled with Imec's cutting-edge integration methods allows users to discern more nuanced differences in material compositions, fostering innovation across sectors. Engineered for flexibility, this imaging system boasts features that support rapid data analysis and integration into larger systems. Its robust design ensures it can withstand challenging operational conditions, making it a reliable choice for continuous and demanding applications.
ntLDPC_SDAOCT IP implements a 5G-NR Base Graph 1 systematic Encoder/Decoder based on Quasi-Cyclic LDPC Codes (QC-LDPC), with lifting size Zc=384 and Information Block Size 8448 bits. The implementation is based on block-structured LDPC codes with circular block matrices. The entire parity check matrix can be partitioned into an array of block matrices; each block matrix is either a zero matrix or a right cyclic shift of an identity matrix. The parity check matrix designed in this way can be conveniently represented by a base matrix represented by cyclic shifts. The main advantage of this feature is that it offers high throughput at low implementation complexity. The ntLDPCE_SDAOCT Encoder IP implements a systematic LDPC Zc=384 encoder. Input and Output may be selected to be 32-bit or 128-bits per clock cycle prior to synthesis, while internal operations are 384-bits parallel per clock cycle. Depending on code rate, the respective amount of parity bits are generated and the first 2xZc=768 payload bits are discarded. There are 5 code rate modes of operation available (8448,8448)-bypass, (9984,8448)-0.8462, (11136,8448)-0.7586, (12672,8448)-0.6667 and (16896,8448)-0.5. The ntLDPCD_SDAOCT Base Graph Decoder IP may optionally implement one of two approximations of the log-domain LDPC iterative decoding algorithm (Belief propagation) known as either Layered Min-Sum Algorithm (MS) or Layered Lambda-min Algorithm (LMIN). Variations of Layered MS available are Offset Min-Sum (OMS), Normalized Min-Sum (NMS), and Normalized Offset Min-Sum (NOMS). Selecting between these algorithms presents a decoding performance vs. system resources utilization trade-off. The ntLDPCD_SDAOCT decoder IP implements a Zc=384 parallel systematic LDPC layered decoder. Each layer corresponds to Zc=384 expanded rows of the original LDPC matrix. Each layer element corresponds to the active ZcxZc shifted identity submatrices within the layer. Each layer element is shifted accordingly and processed by the parallel decoding datapath unit, in order to update the layers LLR estimates and extrinsic information iteratively until the required number of decoding iterations has been run. The decoder IP also features a powerful optional early termination (ET) criterion, to maintain practically equivalent error correction performance, while significantly increasing its throughput rate and/or reducing hardware cost. Additionally it reports how many decoding iterations have been performed when ET is activated, for system performance observation and calibration purposes. Finally a simple, yet robust, flow control handshaking mechanism is included in both IPs, which is used to communicate the IPs availability to adjacent system components. This logic is easily portable into any communication protocol, like AXI4 stream IF.
The Ncore Cache Coherent Interconnect from Arteris provides a quintessential solution for handling multi-core SoC design complications, facilitating heterogeneous coherency and efficient caching. It is distinguished by its high throughput, ensuring reliable and high-performance system-on-chips (SoCs). Ncore's configurable fabric offers designers the ability to establish a multi-die, multi-protocol coherent interconnect where emerge cutting-edge technologies like RISC-V can seamlessly integrate. This IP’s adaptability and scalable design unlock broader performance trajectories, whether for small embedded systems or extensive multi-billion transistor architectures. Ncore's strength lies in its ability to offer ISO 26262 ASIL D readiness, enabling designers to adhere to stringent automotive safety standards. Furthermore, its coupling with Magillem™ automation enhances the potential for rapid IP integration, simplifying multi-die designs and compressing development timelines. In addressing modern computational demands, Ncore is reinforced by robust quality of service parameters, secure power management, and seamless integration capabilities, making it an imperative asset in constructing scalable system architectures. By streamlining memory operations and optimizing data flow, it provides bandwidth that supports both high-end automotive and complex consumer electronics, fostering innovation and market excellence.
Packetcraft's Bluetooth LE Audio Solutions offer a full suite of host, controller, and LC3 components optimized for seamless transition to Bluetooth LE Audio. The platform supports Auracast broadcast audio and True Wireless Stereo (TWS), making it adaptable to prevalent chipsets and providing flexibility to product companies. The modular design facilitates simplified integration, ensuring companies can leverage advanced audio capabilities in a variety of applications. As Bluetooth audio technology evolves, Packetcraft remains at the leading edge, offering industry-leading solutions that cater to modern audio requirements.
CLOP Technologies' 60GHz Wireless Solution offers businesses an impressive alternative to traditional networking systems. Leveraging the IEEE 802.11ad WiFi standard and Wireless Gigabit Alliance MAC/PHY specifications, this solution achieves a peak data rate of up to 4.6Gbps. This makes it particularly suited for applications that require significant bandwidth, such as real-time, uncompressed HD video streaming and high-speed data transfers — operations that are notably quicker compared to current WiFi systems. The solution is engineered to support 802.11ad IP networking, providing a platform for IP-based applications like peer-to-peer data transfer and serving as a router or access point. Its architecture includes a USB 3.0 host interface and mechanisms for RF impairment compensation, ensuring both ease of access for host compatibility and robust performance even under high data rate operations. Operating on a frequency band ranging from 57GHz to 66GHz, the wireless solution utilizes modulation modes such as BPSK, QPSK, and 16QAM. It incorporates forward error correction (FEC) with LDPC codes, providing various coding rates for enhanced data integrity. Furthermore, the system boasts AES-128 hardware security, with quality of service maintained through IEEE 802.11e standards.
The mmWave PLL is meticulously designed to cater to applications that operate in the millimeter-wave frequency bands, delivering high frequency stability and low phase noise. This innovative product serves as a critical component in RF systems, particularly where high-frequency signals are required. Fantastically well-suited for cutting-edge wireless communication applications and advanced radar systems, the mmWave PLL's architecture supports frequencies up to 110 GHz. This provides a robust solution that enhances signal integrity and performance in complex communication systems. Versatile and adaptable, the mmWave PLL advances the capabilities of mmWave technology, making it indispensable for industries seeking to push the boundaries of data transmission and signal processing.
aiData functions as a crucial backbone for automated driving systems, providing a fully automated data pipeline tailored for ADAS and autonomous driving (AD) applications. This pipeline streamlines the Machine Learning Operations (MLOps) workflow, from data collection to curation and annotation, enhancing the development process by minimizing manual intervention. By leveraging AI-driven processes, aiData significantly reduces the resources required for data preparation and validation, making high-quality data more accessible for training sophisticated AI models. One of the key features of aiData is its comprehensive versioning system, which ensures complete transparency and traceability throughout the data lifecycle. This feature is pivotal for maintaining high standards in data quality, allowing developers to track changes and updates efficiently. Furthermore, aiData includes advanced tools for annotating data, supported by AI algorithms, which enable rapid and accurate labeling of both moving and static objects. This capability is particularly beneficial for creating dynamic and contextually-rich datasets needed for training robust AD systems. Beyond data preparation, aiData facilitates seamless integration with existing data infrastructure, supporting both on-premises and cloud-based deployment to cater to varying security and collaboration needs. As automotive companies face growing data requirements, aiData's scalable and modular architecture ensures that it can adapt to evolving project demands, offering invaluable support in the rapid deployment and validation of ADAS technologies.
Dyumnin's RISCV SoC is a versatile platform centered around a 64-bit quad-core server-class RISCV CPU, offering extensive subsystems, including AI/ML, automotive, multimedia, memory, cryptographic, and communication systems. This test chip can be reviewed in an FPGA format, ensuring adaptability and extensive testing possibilities. The AI/ML subsystem is particularly noteworthy due to its custom CPU configuration paired with a tensor flow unit, accelerating AI operations significantly. This adaptability lends itself to innovations in artificial intelligence, setting it apart in the competitive landscape of processors. Additionally, the automotive subsystem caters robustly to the needs of the automotive sector with CAN, CAN-FD, and SafeSPI IPs, all designed to enhance systems connectivity within vehicles. Moreover, the multimedia subsystem boasts a complete range of IPs to support HDMI, Display Port, MIPI, and more, facilitating rich audio and visual experiences across devices.
The RWM6050 Baseband Modem is engineered to facilitate high-data rate applications across wireless communication networks. Designed to serve as a versatile component within various telecommunication systems, it processes signals with precision to enhance data throughput across diverse transmission environments. At its core, the RWM6050 is optimized for operation in complex wireless networks where bandwidth efficiency and robust signal integrity are paramount. It seamlessly integrates into wireless communication frameworks, providing the needed flexibility and scalability to support next-generation network deployments. Through its advanced capabilities, this baseband modem establishes itself as a pivotal element in ensuring reliable, high-speed data transmission. Whether supporting conventional networks or cutting-edge mmWave technology applications, the RWM6050 maintains stellar performance, thereby enhancing the efficiency of communication infrastructures in both commercial and defence sectors.
eSi-Comms offers highly parametric communication solutions tailored for complex projects. It encompasses a range of communication protocols and standards, ensuring seamless integration and high performance. This solutions package is ideal for optimizations across telecommunications systems, supporting a variety of communication needs.
The pPLL08 Family represents Perceptia's suite of all-digital RF frequency synthesizer PLLs designed for high-frequency applications, such as 5G and WiFi. With frequencies reaching up to 8GHz and jitter below 300fs RMS, this PLL family is ideal for both RF LO clocks and the clocking of ADCs/DACs in rigorous RF environments. Featuring a compact architecture, these PLLs are built with a LC tank DCO to meet stringent performance specifications. Flexibility is a hallmark of this IP; it allows for seamless integration across various SoC designs, supported by robust performance across multiple foundry process nodes from 5nm to 40nm.
The transceiver is designed to be used together with an RF tuner, and ADC/DAC converters. The system has internal state machine to control the operation, and can be externally configured via the SPI interface. This design is a Mobile WiMAX baseband transceiver core for both Base station and Mobile station, supplied as a portable and synthesizable Verilog-2001 IP. The system was designed to be used in conjunction with a standard RF tuner. The operation of the transceiver is automated by a master finite state machine.
LightningBlu is designed specifically to transform the connectivity landscape of high-speed rail by providing uninterrupted, on-the-move multi-gigabit connectivity. By bridging the gap between trackside infrastructure and the train, it offers onboard services such as internet access, entertainment, and passenger information. Operating within the mmWave range, LightningBlu ensures a seamless communication experience even at high speeds, significantly enhancing the onboard experience for passengers. Integrating robust mmWave technology, the solution supports high data throughput, ensuring passengers can enjoy swift internet access and other online services while traveling. This wireless solution eliminates the need for traditional wired networks, reducing complexities and enhancing operational flexibility. With a profound ability to support high-speed data-intensive applications, LightningBlu sets a new benchmark in transportation connectivity. This platform's design facilitates smooth operation at velocities exceeding 300 km/h; coupled with its ability to maintain service over several kilometers, it is a critical component in advancing modern rail systems. LightningBlu not only meets today’s connectivity demands but also future-proofs the necessities of tomorrow's rail network implementations.
aiSim 5 represents a leap forward in automotive simulation technology, underpinning the complex validation processes needed for modern autonomous driving systems. Certified to ISO26262 ASIL-D, this simulator is designed to handle the demanding requirements of advanced driver-assistance systems (ADAS) and autonomous driving technologies. By utilizing AI-driven digital twin creation and sophisticated sensor modeling, aiSim ensures high fidelity in simulations, enabling developers to conduct virtual tests across diverse scenarios that replicate real-world conditions. Featuring a physics-based rendering engine, aiSim allows for the precise simulation of varied environmental conditions like rain, fog, and sunshine, as well as complex sensor configurations. Its open architecture and modular design facilitate easy integration into existing development pipelines, ensuring compatibility with a wide range of testing and development frameworks. The simulator's deterministic simulation capabilities provide reliability and repeatability, which are crucial for validating safety-critical automotive functions. The robust architecture of aiSim extends its utility beyond basic simulations, offering tools such as aiFab for scenario randomization, which helps in exposing edge cases that may not be encountered in typical testing environments. Moreover, its ability to produce synthetic data for training improves the robustness of ADAS systems. With aiSim, the development cycle shortens significantly, allowing automotive manufacturers to bring innovative products to market more efficiently.
The Cyclone V FPGA with Integrated PQC Processor by ResQuant is a specialized product that comes pre-equipped with a comprehensive NIST PQC cryptography suite. This FPGA is tailored for applications requiring a robust proof-of-concept for quantum-safe implementations. It ensures seamless integration into existing systems, providing a practical platform for testing and deployment in quantum-secure environments. This product is available at a competitive price and represents an ideal starting point for entities looking to explore and adopt quantum-resilient technologies. Its configuration allows for straightforward implementation in diverse hardware infrastructures while offering a reliable option for organizations aiming to stay ahead in the evolving cyber security landscape. By incorporating the latest in cryptographic standards and ensuring vendor independence, the Cyclone V FPGA with Integrated PQC Processor by ResQuant effectively bridges current hardware technologies and future-proof security needs. It supports industry-wide applications, from IoT and ICT to automotive and military sectors, underscoring ResQuant's versatility in hardware security solutions.
Moonstone Laser Sources by Lightelligence provide cutting-edge photonic solutions aimed at facilitating advanced optical computing applications. These laser sources are tailored for high precision and efficiency, essential for tasks demanding robust photonic performance. The unique attributes of Moonstone make it suitable for integration into diverse technological frameworks where precision and reliability are paramount. As the backbone of optical computing, laser sources like Moonstone ensure that photonic applications achieve desired speed and accuracy, fostering greater innovation in photonics-driven technologies. With their focus on precision and application flexibility, Moonstone Laser Sources empower industries to explore new frontiers in photonics, supporting the evolution of next-generation computing technologies.
The 802.11 LDPC is a high-throughput solution designed for efficient wireless communication. This product supports frame-to-frame, on-the-fly configurations, offering flexibility in decoding iterations to balance throughput and error correction. It is engineered to conform to necessary performance specifications, ensuring optimal bit-error-rate and packet-error-rate performance in wireless networks. Functionality-wise, the design excels in meeting demanding throughput requirements while maintaining superior error correction capabilities. By allowing flexible configuration of LDPC decoding iterations, the product empowers users to tailor performance based on specific needs. This flexibility is essential for networks requiring dynamic adaptation to changing conditions or varying environmental factors. Technically, the 802.11 LDPC is crafted to integrate seamlessly into existing communication infrastructures, providing robust support for maintaining high data rates even under challenging conditions. Its unique ability to balance performance and energy efficiency makes it a preferred choice for modern wireless applications, strengthening connectivity reliability across multiple devices and environments.
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