All IPs > Processor > Building Blocks
Processor building blocks are fundamental components within the realm of semiconductor IPs that play a crucial role in the development and optimization of processors. These building blocks are indispensable for crafting sophisticated, high-performance processors required in a wide range of electronic devices, from handheld gadgets to large-scale computing systems.
Processor semiconductor IP building blocks include key elements such as arithmetic logic units (ALUs), registers, and control units, which integrate to form the central processing unit (CPU). Each of these components contributes to the overall functionality of the processor. ALUs enable the processor to perform arithmetic operations and logical decisions, while registers provide the necessary storage for quick data access. Control units are responsible for interpreting instructions and coordinating other components to execute tasks efficiently. Together, these building blocks ensure that processors perform at optimal levels, handling complex computational tasks with ease.
One of the primary uses of processor building blocks is in creating devices that require advanced computational power, such as smartphones, tablets, personal computers, and servers. These semiconductor IPs help in the design of custom processors that meet specific performance, power consumption, and cost requirements. By leveraging these building blocks, designers can develop processors that are tailored to particular applications, thereby enhancing the overall performance and efficiency of devices. This customizability also facilitates innovations in emerging technologies such as artificial intelligence, the Internet of Things (IoT), and autonomous vehicles, where processors need to handle rapidly growing workloads.
The processor building blocks category in our Silicon Hub encompasses a diverse range of semiconductor IPs that cater to different processing needs. From general-purpose processors with balanced performance to specialized processors with optimized functionalities, this category provides essential components for developing next-generation electronic solutions. By utilizing these building blocks, designers and engineers can push the boundaries of processing technology, creating more capable and efficient devices that meet the evolving demands of modern consumers and industries.
Designed for high-performance applications, the Metis AIPU PCIe AI Accelerator Card by Axelera AI offers powerful AI processing capabilities in a PCIe card format. This card is equipped with the Metis AI Processing Unit, capable of delivering up to 214 TOPS, making it ideal for intensive AI tasks and vision applications that require substantial computational power. With support for the Voyager SDK, this card ensures seamless integration and rapid deployment of AI models, helping developers leverage existing infrastructures efficiently. It's tailored for applications that demand robust AI processing like high-resolution video analysis and real-time object detection, handling complex networks with ease. Highlighted for its performance in ResNet-50 processing, which it can execute at a rate of up to 3,200 frames per second, the PCIe AI Accelerator Card perfectly meets the needs of cutting-edge AI applications. The software stack enhances the developer experience, simplifying the scaling of AI workloads while maintaining cost-effectiveness and energy efficiency for enterprise-grade solutions.
The Chimera GPNPU from Quadric is engineered to meet the diverse needs of modern AI applications, bridging the gap between traditional processing and advanced AI model requirements. It's a fully licensable processor, designed to deliver high AI inference performance while eliminating the complexity of traditional multi-core systems. The GPNPU boasts an exceptional ability to execute various AI models, including classical backbones, state-of-the-art transformers, and large language models, all within a single execution pipeline.\n\nOne of the core strengths of the Chimera GPNPU is its unified architecture that integrates matrix, vector, and scalar processing capabilities. This singular design approach allows developers to manage complex tasks such as AI inference and data-parallel processing without resorting to multiple tools or artificial partitioning between processors. Users can expect heightened productivity thanks to its modeless operation, which is fully programmable and efficiently executes C++ code alongside AI graph code.\n\nIn terms of versatility and application potential, the Chimera GPNPU is adaptable across different market segments. It's available in various configurations to suit specific performance needs, from single-core designs to multi-core clusters capable of delivering up to 864 TOPS. This scalability, combined with future-proof programmability, ensures that the Chimera GPNPU not only addresses current AI challenges but also accommodates the ever-evolving landscape of cognitive computing requirements.
xcore.ai is a versatile and powerful processing platform designed for AIoT applications, delivering a balance of high performance and low power consumption. Crafted to bring AI processing capabilities to the edge, it integrates embedded AI, DSP, and advanced I/O functionalities, enabling quick and effective solutions for a variety of use cases. What sets xcore.ai apart is its cycle-accurate programmability and low-latency control, which improve the responsiveness and precision of the applications in which it is deployed. Tailored for smart environments, xcore.ai ensures robust and flexible computing power, suitable for consumer, industrial, and automotive markets. xcore.ai supports a wide range of functionalities, including voice and audio processing, making it ideal for developing smart interfaces such as voice-controlled devices. It also provides a framework for implementing complex algorithms and third-party applications, positioning it as a scalable solution for the growing demands of the connected world.
The Metis AIPU M.2 Accelerator Module from Axelera AI is a cutting-edge solution designed for enhancing AI performance directly within edge devices. Engineered to fit the M.2 form factor, this module packs powerful AI processing capabilities into a compact and efficient design, suitable for space-constrained applications. It leverages the Metis AI Processing Unit to deliver high-speed inference directly at the edge, minimizing latency and maximizing data throughput. The module is optimized for a range of computer vision tasks, making it ideal for applications like multi-channel video analytics, quality inspection, and real-time people monitoring. With its advanced architecture, the AIPU module supports a wide array of neural networks and can handle up to 24 concurrent video streams, making it incredibly versatile for industries looking to implement AI-driven solutions across various sectors. Providing seamless compatibility with AI frameworks such as TensorFlow, PyTorch, and ONNX, the Metis AIPU integrates seamlessly with existing systems to streamline AI model deployment and optimization. This not only boosts productivity but also significantly reduces time-to-market for edge AI solutions. Axelera's comprehensive software support ensures that users can achieve maximum performance from their AI models while maintaining operational efficiency.
Leveraging a high-performance RISC architecture, the eSi-3250 32-bit core efficiently integrates instruction and data caches. This makes it compatible with designs utilizing slower on-chip memories such as eFlash. The core not only supports MMU for address translation but also allows for user-defined custom instructions, greatly enhancing its flexibility for specialized and high-performance applications.
The aiWare hardware neural processing unit (NPU) stands out as a state-of-the-art solution for automotive AI applications, bringing unmatched efficiency and performance. Designed specifically for inference tasks associated with automated driving systems, aiWare supports a wide array of AI workloads including CNNs, LSTMs, and RNNs, ensuring optimal operation across numerous applications.\n\naiWare is engineered to achieve industry-leading efficiency rates, boasting up to 98% efficiency on automotive neural networks. It operates across various performance requirements, from cost-sensitive L2 regulatory applications to advanced multi-sensor L3+ systems. The hardware platform is production-proven, already implemented in several products like Nextchip's APACHE series and enjoys strong industry partnerships.\n\nA key feature of aiWare is its scalability, capable of delivering up to 1024 TOPS with its multi-core architecture, and maintaining high efficiency in diverse AI tasks. The design allows for straightforward integration, facilitating early-stage performance evaluations and certifications with its deterministic operations and minimal host CPU intervention.\n\nA dedicated SDK, aiWare Studio, furthers the potential of the NPU by providing a suite of tools focused on neural network optimization, supporting developers in tuning their AI models with fine precision. Optimized for automotive-grade applications, aiWare's technology ensures seamless integration into systems requiring AEC-Q100 Grade 2 compliance, significantly enhancing the capabilities of automated driving applications from L2 through L4.
The eSi-3200, a 32-bit cacheless core, is tailored for embedded control with its expansive and configurable instruction set. Its capabilities, such as 64-bit multiply-accumulate operations and fixed-point complex multiplications, cater effectively to signal processing tasks like FFTs and FIRs. Additionally, it supports SIMD and single-precision floating point operations, coupled with efficient power management features, enhancing its utility for diverse embedded applications.
The eSi-1600 is a 16-bit CPU core designed for cost-sensitive and power-efficient applications. It accords performance levels similar to that of 32-bit CPUs while maintaining a system cost comparable to 8-bit processors. This IP is particularly well-suited for control applications needing limited memory resources, demonstrating excellent compatibility with mature mixed-signal technologies.
RAIV represents Siliconarts' General Purpose-GPU (GPGPU) offering, engineered to accelerate data processing across diverse industries. This versatile GPU IP is essential in sectors engaged in high-performance computing tasks, such as autonomous driving, IoT, and sophisticated data centers. With RAIV, Siliconarts taps into the potential of the fourth industrial revolution, enabling rapid computation and seamless data management. The RAIV architecture is poised to deliver unmatched efficiency in high-demand scenarios, supporting massive parallel processing and intricate calculations. It provides an adaptable framework that caters to the needs of modern computing, ensuring balanced workloads and optimized performance. Whether used for VR/AR applications or supporting the back-end infrastructure of data-intensive operations, RAIV is designed to meet and exceed industry expectations. RAIV’s flexible design can be tailored to enhance a broad spectrum of applications, promising accelerated innovation in sectors dependent on AI and machine learning. This GPGPU IP not only underscores Siliconarts' commitment to technological advancement but also highlights its capability to craft solutions that drive forward computational boundaries.
The RISC-V CPU IP N Class is part of a comprehensive lineup offered by Nuclei, optimized for microcontroller applications. This 32-bit architecture is ideal for AIoT solutions, allowing seamless integration into innovative low-power and high-efficiency projects. As a highly configurable IP, it supports extensions in security and physical safety measures, catering to applications that demand reliability and adaptability. With a focus on configurability, the N Class can be tailored for specific system requirements by selecting only the necessary features, ensuring optimized performance and resource utilization. Designed with robust and readable Verilog coding, it facilitates effective debugging and performance, power, and area (PPA) optimization. The IP also supports Trust Execution Environment (TEE) for enhanced security, catering to a variety of IoT and embedded applications. This class offers efficient scalability, supporting several RISC-V extensions like B, K, P, and V, while also allowing for user-defined instruction expansion. Committed to delivering a highly adaptable processor solution, the RISC-V CPU IP N Class is essential for developers aiming to implement secure and flexible embedded systems.
The eSi-1650 is a compact, low-power 16-bit CPU core integrating an instruction cache, making it an ideal choice for mature process nodes reliant on OTP or Flash program memory. By omitting large on-chip RAMs, the IP core optimizes power and area efficiency and permits the CPU to capitalize on its maximum operational frequency beyond OTP/Flash constraints.
The SCR3 is an efficient microcontroller core offered by Syntacore, designed to meet the needs of both industrial and consumer applications. It introduces a 5-stage in-order pipeline and includes privilege modes along with an MPU, as well as L1 and L2 cache support for improved performance. This core balances processing efficiency with power consumption, making it suitable for use cases that require reliable performance within space and energy constraints. The SCR3's versatility extends across various sectors, including IoT, automotive, and networking.
The SCR6 stands out with a high-performance 12-stage dual-issue out-of-order pipeline coupled with an advanced FPU. As a microcontroller core, it boasts excellent computational capabilities while maintaining efficient power consumption. This attribute makes it highly suitable for deeply embedded applications that demand a fine balance between performance and energy efficiency. Its architecture is particularly favored in sectors such as sensor fusion, control systems, and network devices. The SCR6 is emblematic of Syntacore's engineering prowess, integrating high-level functionalities into compact design footprints.
The SCR1 is an open-source microcontroller core optimized for deeply embedded applications. It features a 4-stage in-order pipeline, ensuring efficient processing of instructions. Designed for compactness and resource optimization, the SCR1 is an excellent choice for applications requiring simplicity and functionality within constrained environments. Its open-source nature and configurability make it adaptable to a wide range of use cases, from consumer electronics to industrial devices. This core is part of Syntacore's commitment to providing highly efficient, silicon-proven solutions.
The eSi-3264 stands out with its support for both 32/64-bit operations, including 64-bit fixed and floating-point SIMD (Single Instruction Multiple Data) DSP extensions. Engineered for applications mandating DSP functionality, it does so with minimal silicon footprint. Its comprehensive instruction set includes specialized commands for various tasks, bolstering its practicality across multiple sectors.
The iCan PicoPop® is a miniaturized system on module (SOM) based on the Xilinx Zynq UltraScale+ Multi-Processor System-on-Chip (MPSoC). This advanced module is designed to handle sophisticated signal processing tasks, making it particularly suited for aeronautic embedded systems that require high-performance video processing capabilities. The module leverages the powerful architecture of the Zynq MPSoC, providing a robust platform for developing cutting-edge avionics and defense solutions. With its compact form factor, the iCan PicoPop® SOM offers unparalleled flexibility and performance, allowing it to seamlessly integrate into various system architectures. The high level of integration offered by the Zynq UltraScale+ MPSoC aids in simplifying the design process while reducing system latency and power consumption, providing a highly efficient solution for demanding applications. Additionally, the iCan PicoPop® supports advanced functionalities through its integration of programmable logic, multi-core processing, and high-speed connectivity options, making it ideal for developing next-generation applications in video processing and other complex avionics functions. Its modular design also allows for easy customization, enabling developers to tailor the system to meet specific performance and functionality needs, ensuring optimal adaptability for intricate aerospace environments. Overall, the iCan PicoPop® demonstrates a remarkable blend of high-performance computing capabilities and adaptable configurations, making it a valuable asset in the development of high-tech avionics solutions designed to withstand rigorous operational demands in aviation and defense.
ISPido represents a fully configurable RTL Image Signal Processing Pipeline, adhering to the AMBA AXI4 standards and tailored through the AXI4-LITE protocol for seamless integration with systems such as RISC-V. This advanced pipeline supports a variety of image processing functions like defective pixel correction, color filter interpolation using the Malvar-Cutler algorithm, and auto-white balance, among others. Designed to handle resolutions up to 7680x7680, ISPido provides compatibility for both 4K and 8K video systems, with support for 8, 10, or 12-bit depth inputs. Each module within this pipeline can be fine-tuned to fit specific requirements, making it a versatile choice for adapting to various imaging needs. The architecture's compatibility with flexible standards ensures robust performance and adaptability in diverse applications, from consumer electronics to professional-grade imaging solutions. Through its compact design, ISPido optimizes area and energy efficiency, providing high-quality image processing while keeping hardware demands low. This makes it suitable for battery-operated devices where power efficiency is crucial, without sacrificing the processing power needed for high-resolution outputs.
ISPido on VIP Board is a customized runtime solution tailored for Lattice Semiconductors’ Video Interface Platform (VIP) board. This setup enables real-time image processing and provides flexibility for both automated configuration and manual control through a menu interface. Users can adjust settings via histogram readings, select gamma tables, and apply convolutional filters to achieve optimal image quality. Equipped with key components like the CrossLink VIP input bridge board and ECP5 VIP Processor with ECP5-85 FPGA, this solution supports dual image sensors to produce a 1920x1080p HDMI output. The platform enables dynamic runtime calibration, providing users with interface options for active parameter adjustments, ensuring that image settings are fine-tuned for various applications. This system is particularly advantageous for developers and engineers looking to integrate sophisticated image processing capabilities into their devices. Its runtime flexibility and comprehensive set of features make it a valuable tool for prototyping and deploying scalable imaging solutions.
The Cyclone V FPGA with Integrated PQC Processor by ResQuant is a specialized product that comes pre-equipped with a comprehensive NIST PQC cryptography suite. This FPGA is tailored for applications requiring a robust proof-of-concept for quantum-safe implementations. It ensures seamless integration into existing systems, providing a practical platform for testing and deployment in quantum-secure environments. This product is available at a competitive price and represents an ideal starting point for entities looking to explore and adopt quantum-resilient technologies. Its configuration allows for straightforward implementation in diverse hardware infrastructures while offering a reliable option for organizations aiming to stay ahead in the evolving cyber security landscape. By incorporating the latest in cryptographic standards and ensuring vendor independence, the Cyclone V FPGA with Integrated PQC Processor by ResQuant effectively bridges current hardware technologies and future-proof security needs. It supports industry-wide applications, from IoT and ICT to automotive and military sectors, underscoring ResQuant's versatility in hardware security solutions.
The Universal DSP Library is a versatile and comprehensive solution designed to simplify digital signal processing tasks in FPGA applications. It provides a robust framework for handling complex signal processing requirements, enabling developers to integrate advanced DSP functionalities efficiently into their systems. This library is crafted to offer flexibility and adaptability, supporting a wide range of applications in various industries. This DSP library stands out for its ability to handle diverse signal processing operations with ease. By offering pre-built functions and modules, it reduces the complexity traditionally associated with DSP implementation in FPGA designs. Developers can leverage this library to accelerate their development cycles, ensuring quicker time-to-market for their products. Incorporating the Universal DSP Library into an FPGA design allows for enhanced performance and efficiency, as it optimizes the processing power of FPGAs to manage demanding signal processing tasks. Its design enables seamless integration with existing systems, providing scalable solutions that can adapt to future needs. Overall, this library is an invaluable asset for any project involving digital signal processing on FPGA platforms.
DolphinWare IPs is a versatile portfolio of intellectual property solutions that enable efficient SoC design. This collection includes various control logic components such as FIFO, arbiter, and arithmetic components like math operators and converters. In addition, the logic components span counters, registers, and multiplexers, providing essential functionalities for diverse industrial applications. The IPs in this lineup are meticulously designed to ensure data integrity, supported by robust verification IPs for AXI4, APB, SD4.0, and more. This comprehensive suite meets the stringent demands of modern electronic designs, facilitating seamless integration into existing design paradigms. Beyond their broad functionality, DolphinWare’s offerings are fundamental to applications requiring specific control logic and data integrity solutions, making them indispensable for enterprises looking to modernize or expand their product offerings while ensuring compliance with industry standards.
The SCR4 combines efficiency with advanced features, offering a 5-stage in-order pipeline, an FPU (Floating Point Unit), and an MPU (Memory Protection Unit), alongside comprehensive cache support. This microcontroller core is tailored for applications necessitating precision and enhanced computational performance. Its architecture enables effective power management, making it ideal for embedded systems with strict energy budgets. By supporting a range of markets like industrial automation and sensor networks, the SCR4 core exemplifies Syntacore's adaptability and forward-thinking approach.
Syntacore’s SCR5 is a Linux-capable application core featuring a 9-stage in-order pipeline. It includes an MMU (Memory Management Unit), as well as L1 and L2 caches, which enhance its processing speed and efficiency. Designed to support multi-core configurations (SMP up to 4 cores), the SCR5 core is perfect for high-performance computing environments that require robust data processing capabilities. This core supports various application markets, including AI, ML, and mobile devices, due to its efficient integration of advanced processing at reduced energy costs.
Tailored for storage solutions, augmented reality (AR), virtual reality (VR), and artificial intelligence (AI) applications, the RISC-V CPU IP NX Class offers a 64-bit architecture engineered for high demand environments. This class is geared towards applications that require significant data throughput and processing capability. The NX Class IP thrives in systems where intensive computational processes and large data sets are handled. It employs a sophisticated architecture that allows for optimal resource management and efficiency, ensuring fast and reliable performance across diverse industries. With support for advanced RISC-V extensions, the IP delivers flexibility allowing modifications to fit user-specific requirements. Its robust design supports functional safety and enhanced security measures, making it ideal for critical systems in sectors demanding high reliability and performance. Whether for consumer devices or industrial use, the NX Class IP represents a cutting-edge solution for developers focused on creating competitive and future-ready products.
The Universal High-Speed SERDES from 1G to 12.5G is a flexible interface solution for high-speed data transfer applications. This SERDES is engineered to handle a broad range of data rates, providing versatility across numerous high-performance digital systems. Its design accommodates multiple data protocol standards such as RapidIO, FC, and XAUI, allowing seamless integration across diverse technological ecosystems. One of the standout features of this SERDES is its parameterizable data width options, offering bit widths like 16-bit, 20-bit, 32-bit, and 40-bit. This adaptability ensures it can cater to specific data handling requirements, enhancing the efficiency of electronic systems. Its programmable front-end equalizers and adaptive receiver equalizers further its robustness in dealing with varying signal integrity challenges. The SERDES maintains functionality independent of crystal oscillators, eliminating the need for additional external components, which simplifies system design and reduces costs. It supports various packaging modes and channel configurations, underpinning its flexibility in diverse application scenarios.
The Prodigy Universal Processor by Tachyum Inc. is a revolutionary advancement in computing technology, seamlessly integrating the functionalities of CPUs, GPUs, and TPUs into a singular, cohesive architecture. This innovative processor is engineered to deliver unparalleled performance, energy efficiency, and space optimization to meet the increasingly demanding needs of AI, high-performance computing, and hyperscale data centers. The Prodigy processor architecture supports up to 18.5x higher performance and 7.5x better performance per watt compared to its competitors, addressing prevalent challenges like excessive power consumption and server inefficiencies in existing data center frameworks. By offering various SKUs, the Prodigy processor can be tailored to a wide array of market needs, facilitating diverse applications and workloads, from high-end HPC to big AI analytics. A standout feature of the Prodigy is its versatile emulation capabilities, allowing seamless integration and evaluation in existing systems with minimal adjustments. The Prodigy provides essential tools for developers, enabling straightforward adaptation of existing applications, which can run on the Prodigy instruction set architecture without modification. This comprehensive approach not only enhances operational efficiency but also accelerates the transition to advanced computing infrastructures.
Designed for the most demanding computing environments, the RISC-V CPU IP UX Class features a 64-bit architecture and advanced memory management capabilities. Its primary applications span Linux, data centers, and network infrastructure, where heavy data traffic and complex computational tasks are prevalent. The UX Class IP is engineered to provide superior performance within these high-load scenarios, supporting simultaneous multi-threading and expanded memory functions. Offering versatility, it efficiently supports system-on-chip (SoC) implementations, offering scalability through a wide range of configuration options that address specific system demands from developers. With a focus on expansion and customization, the UX Class also supports RISC-V's B, K, P, V extensions, and facilitates proprietary instruction sets. These features offer system architects a robust platform for tailoring solutions for high performance computing needs and integration challenges inherent in cutting-edge technological projects.
Designed for integration within various industry systems, ARM M-Class based ASICs from ASIC North provide flexibility and versatility. These chips, built around the ARM Cortex-M architecture, are optimized for embedded applications, offering a balance of performance and power efficiency. They are particularly suited to IoT applications due to their robust performance metrics and modular design adaptability. ASIC North ensures that each ARM M-Class ASIC is thoroughly verified, delivering optimal reliability for deployment in complex environments.
The Origin E1 is a neural engine meticulously optimized for always-on applications found in devices like home appliances and smartphones. It excels in scenarios requiring approximately 1 TOPS performance, ideal for cost and area-sensitive applications like security cameras and always-sensing applications. This processor manages to combine power efficiency with high-level performance, ensuring continuous operation on minimal energy.
Aimed at delivering high performance for edge computing and Linux-based systems, the RISC-V CPU IP U Class provides a remarkable 32-bit architecture augmented with a Memory Management Unit (MMU). This configuration makes it particularly suitable for applications that require sophisticated data processing and multi-tasking capabilities. Optimized for integration into complex systems, the U Class IP extends its application to data centers and networking scenarios. This provides developers with powerful tools to meet the demands of modern computational tasks, ensuring efficient data handling and robust operations. The IP is tailored to deliver excellent performance in processing, with scalability and extension support, making it adaptable for a wide range of industrial applications. With configurability and robustness built into its core design, the U Class supports advanced security features and functional safety standards. This commitment to high standards ensures that the IP can adapt to specific system challenges, offering a broad set of tools for system architects to build efficient and dependable products.
The TimbreAI T3 is an ultra-low-power AI engine tailored for audio noise reduction in devices like wireless headsets. Its streamlined architecture is crafted specifically for minimizing power while maintaining high fidelity audio processing. The engine operates at less than 300μW, making it the ideal choice for battery-sensitive applications.
iCEVision facilitates rapid prototyping and evaluation of connectivity features using the Lattice iCE40 UltraPlus FPGA. Designers can take advantage of exposed I/Os for quick implementation and validation of solutions, while enjoying compatibility with common camera interfaces such as ArduCam CSI and PMOD. This flexibility is complemented by software tools such as the Lattice Diamond Programmer and iCEcube2, which allow designers to reprogram the onboard SPI Flash and develop custom solutions. The platform comes preloaded with a bootloader and an RGB demo application, making it quick and easy for users to begin experimenting with their projects. Its design includes features like a 50mmx50mm form factor, LED applications, and multiple connectivity options, ensuring broad usability across various rapid prototyping scenarios. With its user-friendly setup and comprehensive toolkit, iCEVision is perfect for developers who need a streamlined path from initial design to functional prototype, especially in environments where connectivity and sensor integration are key.
xcore-200 leverages multicore microcontroller technology to deliver exceptional processing power for embedded systems. Built to handle intensive DSP and I/O tasks, it excels in environments requiring seamless integration of voice, audio, and data processing. This processor is ideally suited for applications in consumer electronics and industrial control, offering a balance of high processing capability and energy efficiency. With its deterministic performance and support for various communication interfaces, xcore-200 ensures reliable operation across diverse environments. By facilitating sophisticated signal processing and real-time control, xcore-200 enables developers to implement innovative solutions that meet demanding technical specifications. Its adaptability makes it a go-to choice for applications requiring robust computational frameworks and high-speed processing capabilities.
Designed for environments requiring extensive processing power, the Origin E8 is suitable for high-demand applications such as data centers and autonomous vehicles. This NPU supports major AI models effectively while minimizing latency and maximizing throughput. Capable of handling up to 128 TOPS, it ensures robust performance with efficient resource management.
The YVR processor incorporates the AVR Instruction Set Architecture with a focus on delivering proficiency in a two-clock machine cycle format, thus optimizing processing efficiency while conforming to recognized architectural standards known throughout the industry. Engineered for compatibility and efficiency, the YVR is well-suited for embedded applications where interfacing with AVR-based systems is necessary. It upholds Systemyde’s standards for quality, marrying compatibility with practical improvements in control and processing tasks. Incorporating the YVR within systems ensures stability and performance in developing or maintaining embedded applications, underlining the design’s adaptability and adherence to proven technological standards.
Origin E2 is devised for applications demanding power and area efficiency, essential for smartphones and other devices. With a focus on maintaining a balance between performance and resource use, it supports a wide range of neural networks and achieves sustainable power efficiencies up to 18 TOPS/W. This makes it a versatile choice for both consumer and industrial use cases.
As an upgrade to its predecessor, the JH7110 platform integrates enhanced AI capabilities and processing power. Built to support a wider array of applications including cloud computing and industrial control, this platform is perfect for use in environments that require robust performance and security. It features a quad-core architecture and an enhanced GPU for superior graphics rendering. With improved memory bandwidth and a faster processor, the JH7110 delivers better performance metrics and a broader range of high-speed interfaces. This platform is designed for current and emerging markets, such as personal computing and NAS applications. StarFive ensures that the platform remains adaptable, giving developers a reliable foundation equipped for modern AI and multimedia processing.
ADICSYS, a subsidiary of EASii IC, provides advanced Field Programmable Gate Array (FPGA) solutions that blend the benefits of custom FPGA and embedded FPGA technologies. With over a decade's worth of expertise in FPGA development, ADICSYS offers soft eFPGA IP which is not only highly customizable and scalable but also seamlessly integrates into standard RTL design flows. This IP is designed to be technology-independent and supports a synthesis from RTL to FPGA bitstream conversion, catering to diverse application requirements. The soft eFPGA technology from ADICSYS is celebrated for its flexibility, allowing modifications to circuits even post-production and during service. This adaptability significantly reduces design times and risks associated with errors. By enabling Programmable IPs with immediate accessibility for customization, ADICSYS supports a range of architectural parameters, from LUT count to routing density, ensuring precise adaptation to area, performance, and power constraints. The Synthesizable Programmable Core (SPC) created by ADICSYS is particularly advantageous for reducing risks associated with design errors and specification changes, making it a pivotal component in many industrial applications. ADICSYS stands out for its application of industry-standard CAD tools, guaranteeing ease in integration and adaptability for varied semiconductor projects.
The Origin E6 targets next-generation edge devices requiring sophisticated AI capabilities. It delivers outstanding performance by accommodating a variety of modern AI models, including video, audio, and text-based networks. By optimizing workloads and achieving up to 90% processor utilization, it reduces power consumption and enhances user experience in mobile, automotive, and consumer electronics.
Panmnesia's PanAccelerator is a high-performance solution crafted to boost the processing power of AI systems. It is tailored for leading-edge machine learning workloads that require high-bandwidth memory expansion and rapid GPU interconnection. This accelerator supports efficient power usage and offers expansive scalability, making it ideal for large-scale AI training environments.
The Cortex-A725 processor is designed to deliver premium performance with energy efficiency, extending the capabilities of modern consumer devices. As part of the Armv9.2 architecture, this processor is optimized for sustained high performance within a constrained power envelope, making it perfect for devices such as smartphones, tablets, and laptops that require consistent performance without excessive power consumption. Built with DynamIQ technology, the Cortex-A725 provides a robust platform for demanding applications, including AAA mobile gaming and web browsing. The processor ensures that users experience smooth, responsive computing even under resource-intensive conditions. The integration with Arm's advanced graphics technologies also enhances its capability to deliver enriched graphical experiences. Arm's focus on configurability makes the Cortex-A725 adaptable to various market needs, offering an area-optimized design to support cost-sensitive applications. It continues the legacy of high-performance computing that Arm processors are known for, providing developers with the tools necessary to innovate and meet consumer demands effectively.
The Metis AIPU Quad-Core High-Performance PCIe Card from Axelera is an exceptional hardware solution designed to cater to the most demanding AI applications. This high-performance card integrates four Metis AI Processing Units to provide an astonishing peak performance of 856 TOPS, offering unmatched computational capabilities for rapid and complex AI tasks. This PCIe card enables enterprises to scale AI workloads efficiently, supporting intricate neural networks with ease. Suitable for extensive vision processing tasks, including those requiring high frame rates, this card maximizes throughput with minimal power consumption. The card is enhanced by Axelera’s Voyager SDK, streamlining application deployment and ensuring compatibility with popular AI frameworks for effortless integration. Handling up to 12,800 frames per second for ResNet-50 and reaching 38,884 frames per second for MobileNet V2-1.0, this card stands out for its superior speed and accuracy in processing. It is ideal for businesses aiming to implement cutting-edge AI capabilities across diverse applications, ensuring both innovation and competitive advantage in the marketplace.
This networking solution from CetraC endows high-performance capabilities into FPGA and ASIC products, tailored for distributed architectural systems. It is crafted specifically for industries that demand high-speed data transmissions and excellent reliability across their networking infrastructures. The product supports numerous protocols such as TSN, CAN FD, and ARINC429, making it versatile for integration into various high-tech systems needing comprehensive data management and communication structures. The solution also features robust security measures including AES256 encryption to protect data integrity while facilitating seamless protocol conversions to enhance interoperability between various network segments.
**DRV64IMZicsr – 64-bit RISC-V Performance. Designed for Demanding Innovation.** The DRV64IMZicsr is a powerful and versatile 64-bit RISC-V CPU core, built to meet the performance and safety needs of next-generation embedded systems. Featuring the M (Multiply/Divide), Zicsr (Control and Status Registers), and External Debug extensions, this core is engineered to scale—from edge computing to mission-critical applications. As part of the DRVX Core Family, the DRV64IMZicsr embodies DCD’s philosophy of combining open-standard freedom with customizable IP excellence—making it a smart and future-proof alternative to legacy architectures. ✅ Why Choose RISC-V? * No license fees – open-source instruction set means reduced TCO * Unmatched flexibility – tailor the architecture to your specific needs * A global, thriving ecosystem – support from toolchains, OSes, and hardware vendors * Security & longevity – open and verifiable architecture ensures trust and sustainability 🚀 DRV64IMZicsr – Core Advantages: * 64-bit RISC-V ISA with M, Zicsr, and Debug support * Five-stage pipeline, Harvard architecture, and efficient branch prediction * Configurable memory size and allocation for program and data spaces Performance optimized: * **Up to 2.38 CoreMark/MHz** * **Up to 1.17 DMIPS/MHz** * Compact footprint starting from just 17.6k gates * Interface options: AXI, AHB, or native * Compatible with Classical CAN, CAN FD, and CAN XL through additional IPs 🛡️ Safety, Compatibility & Flexibility Built In: * Developed as an ISO 26262 Safety Element out of Context (SEooC) * Technology-agnostic – works seamlessly across all FPGA and ASIC vendors * Expandable with DCD’s IP portfolio: DMA, SPI, UART, I²C, CAN, PWM, and more 🔍 Robust Feature Set for Real Applications: * Full 64-bit processing – ideal for performance-intensive, memory-heavy tasks * M extension enables high-speed multiplication/division via dedicated hardware unit * Zicsr extension gives full access to Control and Status Registers, enabling: * Interrupts and exception handling (per RISC-V Privileged Spec) * Performance counters and timers * JTAG-compatible debug interface – compliant with RISC-V Debug Spec (0.13.2 & 1.0.0) 🧪 Ready for Development & Integration: * Comes with a fully automated testbench * Includes a comprehensive suite of validation tests for smooth SoC integration * Supported by industry-standard tools, ensuring a hassle-free dev experience Whether you’re designing for automotive safety, industrial control, IoT gateways, or AI-enabled edge devices, the DRV64IMZicsr gives you the performance, flexibility, and future-readiness of RISC-V—without compromise. 💡 Build smarter, safer systems—on your terms. 📩 Contact us today at info@dcd.pl to start your next RISC-V-powered project.
The DF6802 is an 8-bit synthesizable MPU IP Core, software-compatible with Motorola MC6802. It features an enhanced internal architecture for approximately 4 times faster execution than the original 6802 chip at the same clock frequency. Designed with two power-saving modes (WAIT and HALT), the DF6802 is ideal for automotive and battery-driven applications. It is fully customizable, allowing for a configuration that meets specific user needs, without extra costs for unused features. The IP Core comes equipped with a fully automated testbench and a comprehensive set of test cases for smooth package validation. Moreover, the DF6802 supports DCD’s Hardware Debug System, DoCD™, which offers real-time, non-intrusive debugging across the entire SoC, including the ability to halt, run, step into, or skip instructions, and read/write data to any part of the microprocessor. With support for a wide range of interfaces such as USB, Ethernet, I2C, SPI, UART, CAN, LIN, HDLC, and Smart Card, the DF6802 shows versatile connectivity while ensuring efficient power and performance optimization. The DF6802 is technology agnostic, ensuring compatibility with all FPGA and ASIC vendors. It comes with extensive deliverables including synthesizable RTL, testbench environment, simulation macros, synthesis scripts, and complete technical documentation along with 12 months of technical support.
DRV32IMZicsr – Scalable RISC-V Power. Tailored for Your Project. Ready for the Future. The DRV32IMZicsr is a high-performance, 32-bit RISC-V processor core, equipped with M (Multiply/Divide), Zicsr (Control and Status Registers), and External Debug support. Built as part of DCD’s latest DRVX Core Family, it delivers the full flexibility, openness, and innovation that RISC-V promises—without locking you into proprietary architectures. ✅ Why RISC-V? RISC-V is a rapidly growing open standard for modern computing—backed by a global ecosystem of developers and vendors. It brings: * Freedom from licensing fees and vendor lock-in * Scalability from embedded to high-performance systems * Customizability with standard and custom instruction sets * Strong toolchain & ecosystem support 🚀 DRV32IMZicsr Highlights: * Five-stage pipeline and Harvard architecture for optimized performance * Configurable memory architecture: size and address allocation tailored to your needs Performance metrics: * **Up to 1.15 DMIPS/MHz** * **Up to 2.36 CoreMark/MHz** * Minimal footprint starting from just 14k gates * Flexible interfaces: Choose from AXI, AHB, or native bus options 🛡️ Designed for Safety & Integration: * Developed as an ISO 26262 Safety Element out of Context (SEooC) * Fully technology-agnostic, compatible with all FPGA and ASIC platforms * Seamless integration with DCD’s rich portfolio of IPs: DMA, SPI, UART, PWM, CAN, and more 🔍 Advanced Feature Set: * 32 general-purpose registers * Support for arithmetic, logic, load/store, conditional and unconditional control flow * M extension enables efficient integer multiplication/division * Zicsr extension provides robust interrupt and exception handling, performance counters, and timers * External Debug via JTAG: compliant with RISC-V Debug Specification 0.13.2 and 1.0.0, compatible with all mainstream tools 🧪 Developer-Ready: * Delivered with a fully automated testbench * Includes a comprehensive validation test suite for smooth integration into your SoC flow Whether you're building for automotive, IoT, consumer electronics, or embedded systems, the DRV32IMZicsr offers a future-ready RISC-V solution—highly configurable, performance-optimized, and backed by DCD’s 25 years of experience. Interested? Let’s build the next generation together. 📩 Contact us at info@dcd.pl
DP8051CPU is an ultra high performance 8-bit soft core microcontroller designed by DCD-SEMI to be highly efficient in terms of speed and power consumption. With a pipelined RISC architecture, it can perform operations remarkably faster than the traditional 80C51, with its performance metrics standing up to 15.55 times its predecessor when benchmarked using Dhrystone 2.1. The architecture supports both Harvard and von Neumann configurations, increasing the flexibility for memory access and inclusion. The microcontroller is equipped with an advanced Power Management Unit, allowing it to maintain its high performance capabilities while optimizing power consumption. Targeted for carrying out operations with both fast on-chip memory and slower off-chip alternatives, it can process up to 300 million instructions per second while managing substantial code and data spaces efficiently. Furthermore, it is 100% compatible with the industry-standard 8051 microcontrollers in terms of binary operation, making it highly suitable for integration in existing systems. It boasts of supporting a wide variety of interfaces like USB, Ethernet, I2C, SPI, UART, and many others, which adds to the scope of applications, especially in portable and power-conscious devices. The microcontroller supports a comprehensive hardware debugging system (DoCD™), uniquely proposed to allow non-intrusive debugging of an operational application, offering a robust development and testing phase. With real-time capability and providing insights at various operational stages, it ensures that users can have a contained yet exhaustive overview of their designs. DCD ensures a technology-agnostic design, meaning that this IP core ensures compatibility across all prominent FPGA and ASIC vendors, providing flexibility and convenience for a wide array of users. The DP8051CPU is delivered with a complete test bench and a series of validation sets, ensuring a smooth integration within any workflow.
Digital Core Design presents the D68000-CPU32+, a soft core microprocessor compatible with the 68000's CPU32+ architecture. With a 32-bit data bus and address bus, this core is optimized for high performance program execution and includes a built-in DoCD-BDM debugger interface, making it ideal for debugging complete SoC systems. Its support for 8-, 16-, and 32-bit unaligned/aligned data-bus transfers and a vast array of addressing modes offers flexibility in complex application development. Designed for universal compatibility across FPGA and ASIC vendors, the D68000-CPU32+ is delivered with a comprehensive suite of testbenches, automatic validation tests, and sculpted documentation. The architecture boasts advanced arithmetic and logic capabilities, making it suitable for a wide array of applications, from embedded systems to complex SoCs. With licensing methods streamlined for ease of access, utilizing the D68000-CPU32+ in various contexts is both simple and efficient.
The Lotus 1 is a versatile RISC-V microcontroller that seamlessly blends ultra-low power consumption with comprehensive functionality. Designed for the consumer electronics market, this microcontroller excels in delivering high performance without compromising on energy efficiency, making it ideal for a wide range of applications from home automation to wearable technology. The architecture of the Lotus 1 is crafted to incorporate various peripherals, allowing it to handle numerous tasks with ease. It stands out for providing an economical solution without forfeiting power, offering manufacturers a competitive option for mass market consumer devices. Its compact design does not take away from its capability to support complex computations and data processing tasks. The Lotus 1 ensures reliability and robustness through its advanced design, characterized by a balance between cost, energy consumption, and operational efficiency. It supports scalability, enabling it to adapt to future technological needs and innovations in consumer electronics, thereby offering manufacturers peace of mind regarding future-proofing their devices.
The R8051XC2 is a highly configurable and high-performance 8-bit microcontroller IP core. It is noted for its enhanced capabilities within the 8051 architecture family. This IP core provides developers with a flexible and robust platform, ideal for varied applications ranging from legacy systems to modern embedded solutions. Notably, the R8051XC2 microcontroller includes a high-frequency clock and multiple peripheral interfaces, thus ensuring seamless integration into complex systems. Its design guarantees high execution efficiency, suitable for products requiring swift response times and reliable functionality. The core adds multiple advanced debugging features that simplify development and testing phases, streamlining production cycles. Designed for adaptability, the R8051XC2 supports a multitude of configurations, enabling it to meet specific requirements tailored to different industry demands. This characteristic ensures that this microcontroller can support the evolving needs of industrial, automotive, and consumer electronics markets.
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