All IPs > Processor > Building Blocks
Processor building blocks are fundamental components within the realm of semiconductor IPs that play a crucial role in the development and optimization of processors. These building blocks are indispensable for crafting sophisticated, high-performance processors required in a wide range of electronic devices, from handheld gadgets to large-scale computing systems.
Processor semiconductor IP building blocks include key elements such as arithmetic logic units (ALUs), registers, and control units, which integrate to form the central processing unit (CPU). Each of these components contributes to the overall functionality of the processor. ALUs enable the processor to perform arithmetic operations and logical decisions, while registers provide the necessary storage for quick data access. Control units are responsible for interpreting instructions and coordinating other components to execute tasks efficiently. Together, these building blocks ensure that processors perform at optimal levels, handling complex computational tasks with ease.
One of the primary uses of processor building blocks is in creating devices that require advanced computational power, such as smartphones, tablets, personal computers, and servers. These semiconductor IPs help in the design of custom processors that meet specific performance, power consumption, and cost requirements. By leveraging these building blocks, designers can develop processors that are tailored to particular applications, thereby enhancing the overall performance and efficiency of devices. This customizability also facilitates innovations in emerging technologies such as artificial intelligence, the Internet of Things (IoT), and autonomous vehicles, where processors need to handle rapidly growing workloads.
The processor building blocks category in our Silicon Hub encompasses a diverse range of semiconductor IPs that cater to different processing needs. From general-purpose processors with balanced performance to specialized processors with optimized functionalities, this category provides essential components for developing next-generation electronic solutions. By utilizing these building blocks, designers and engineers can push the boundaries of processing technology, creating more capable and efficient devices that meet the evolving demands of modern consumers and industries.
The Metis AIPU PCIe AI Accelerator Card by Axelera AI is designed for developers seeking top-tier performance in vision applications. Powered by a single Metis AIPU, this PCIe card delivers up to 214 TOPS, handling demanding AI tasks with ease. It is well-suited for high-performance AI inference, featuring two configurations: 4GB and 16GB memory options. The card benefits from the Voyager SDK, which enhances the developer experience by simplifying the deployment of applications and extending the card's capabilities. This accelerator PCIe card is engineered to run multiple AI models and support numerous parallel neural networks, enabling significant processing power for advanced AI applications. The Metis PCIe card performs at an industry-leading level, achieving up to 3,200 frames per second for ResNet-50 tasks and offering exceptional scalability. This makes it an excellent choice for applications demanding high throughput and low latency, particularly in computer vision fields.
xcore.ai stands as a cutting-edge processor that brings sophisticated intelligence, connectivity, and computation capabilities to a broad range of smart products. Designed to deliver optimal performance for applications in consumer electronics, industrial control, and automotive markets, it efficiently handles complex processing tasks with low power consumption and rapid execution speeds. This processor facilitates seamless integration of AI capabilities, enhancing voice processing, audio interfacing, and real-time analytics functions. It supports various interfacing options to accommodate different peripheral and sensor connections, thus providing flexibility in design and deployment across multiple platforms. Moreover, the xcore.ai ensures robust performance in environments requiring precise control and high data throughput. Its compatibility with a wide array of software tools and libraries enables developers to swiftly create and iterate applications, reducing the time-to-market and optimizing the design workflows.
Chimera GPNPU provides a groundbreaking architecture, melding the efficiency of neural processing units with the flexibility and programmability of processors. It supports a full range of AI and machine learning workloads autonomously, eliminating the need for supplementary CPUs or GPUs. The processor is future-ready, equipped to handle new and emerging AI models with ease, thanks to its C++ programmability. What makes Chimera stand out is its ability to manage a diverse array of workloads within a singular processor framework that combines matrix, vector, and scalar operations. This harmonization ensures maximum performance for applications across various market sectors, such as automotive, mobile devices, and network edge systems. These capabilities are designed to streamline the AI development process and facilitate high-performance inference tasks, crucial for modern gadget ecosystems. The architecture is fully synthesizable, allowing it to be implemented in any process technology, from current to advanced nodes, adjusting to desired performance targets. The adoption of a hybrid Von Neuman and 2D SIMD matrix design supports a broad suite of DSP operations, providing a comprehensive toolkit for complex graph and AI-related processing.
KPIT Technologies offers advanced ADAS and autonomous driving solutions designed to accelerate the widespread adoption of Level 3+ autonomy. The company addresses key challenges such as safety, feature development limitations, and validation fragmentation by integrating robust safety protocols and conducting thorough testing across various driving scenarios. Their solutions enhance the intelligence and reliability of autonomous systems by leveraging AI-driven decision-making, which goes beyond basic perception capabilities. KPIT's comprehensive validation frameworks and simulation environments ensure continuous and thorough validation of autonomous driving frameworks. By integrating AI-based perception and planning with system engineering and functional safety practices, KPIT empowers automakers to produce vehicles that are safe, reliable, and paving the way for autonomous mobility. Their strategic partnerships and domain expertise make KPIT a leader in automating vehicle development processes, ensuring readiness for the challenges of scaling autonomous vehicles. Through these innovations, KPIT continues to address the dynamic challenges of autonomous driving, providing automakers with the tools needed to develop increasingly advanced and autonomous vehicles well-positioned for future success.
Leveraging a high-performance RISC architecture, the eSi-3250 32-bit core efficiently integrates instruction and data caches. This makes it compatible with designs utilizing slower on-chip memories such as eFlash. The core not only supports MMU for address translation but also allows for user-defined custom instructions, greatly enhancing its flexibility for specialized and high-performance applications.
aiWare is engineered as a high-performance neural processing unit tailored for automotive AI applications, delivering exceptional power efficiency and computational capability across a broad spectrum of neural network tasks. Its design centers around achieving the utmost efficiency in AI inference, providing flexibility and scalability for various levels of autonomous driving, from basic L2 assistance systems to complex L4 self-driving operations. The aiWare architecture exemplifies leading-edge NPU efficiencies, reaching up to 98% across diverse neural network workloads like CNNs and RNNs, making it a premier choice for AI tasks in the automotive sector. It boasts an industry-leading 1024 TOPS capability, making it suitable for multi-sensor and multi-camera setups required by advanced autonomous vehicle systems. The NPU's hardware determinism aids in achieving high ISO 26262 ASIL B certification standards, ensuring it meets the rigorous safety specifications essential in automotive applications. Incorporating an easy-to-integrate RTL design and a comprehensive SDK, aiWare simplifies system integration and accelerates development timelines for automotive manufacturers. Its highly optimized dataflow and minimal external memory traffic significantly enhance system power economy, providing crucial benefits in reducing operational costs for deployed automotive AI solutions. Vibrant with efficiency, aiWare assures OEMs the capabilities needed to handle modern automotive workloads while maintaining minimal system constraints.
The eSi-1600 is a 16-bit CPU core designed for cost-sensitive and power-efficient applications. It accords performance levels similar to that of 32-bit CPUs while maintaining a system cost comparable to 8-bit processors. This IP is particularly well-suited for control applications needing limited memory resources, demonstrating excellent compatibility with mature mixed-signal technologies.
The eSi-3200, a 32-bit cacheless core, is tailored for embedded control with its expansive and configurable instruction set. Its capabilities, such as 64-bit multiply-accumulate operations and fixed-point complex multiplications, cater effectively to signal processing tasks like FFTs and FIRs. Additionally, it supports SIMD and single-precision floating point operations, coupled with efficient power management features, enhancing its utility for diverse embedded applications.
The SCR1 microcontroller core is a compact, open-source offering designed for deeply embedded applications. It operates with a 4-stage in-order pipeline, ensuring efficient processing in space-constrained environments. Notably, it supports configurations that cater to various industrial needs, making it an ideal solution for projects requiring small form factors without compromising on power efficiency. This core is particularly effective for Internet of Things (IoT) devices and sensor hubs, where low power consumption and high reliability are critical. Its silicon-proven design further attests to its robustness, guaranteeing seamless integration into diverse operational settings. Delivering exceptional performance within constrained resources, the SCR1 stands as a versatile option for industries looking to leverage RISC-V's capabilities in microcontroller applications. Key features of the SCR1 include its ability to function within deeply embedded networks, addressing the needs of sectors like industrial automation and home automation. The in-order pipeline architecture of the SCR1 microcontroller provides predictable performance and straightforward debugging, ideal for critical applications requiring stability and efficiency. Its capability to pair with a variety of software tools enhances usability, offering designers a flexible platform for intricate embedded systems. Moreover, the SCR1 microcontroller benefits from community-driven development, ensuring continuous improvements and updates. This collaborative advancement fosters innovation, facilitating the deployment of advanced features while maintaining low energy requirements. As technology evolution demands more efficient solutions, the SCR1 continues to adapt, contributing significantly to the expanding RISC-V ecosystem. Increasingly indispensable, it offers a sustainable, cost-effective solution for manufacturers aiming to implement cutting-edge technology in their products.
The RAIV General Purpose GPU (GPGPU) epitomizes versatility and cutting-edge technology in the realm of data processing and graphics acceleration. It serves as a crucial technology enabler for various prominent sectors that are central to the fourth industrial revolution, such as autonomous driving, IoT, virtual reality/augmented reality (VR/AR), and sophisticated data centers. By leveraging the RAIV GPGPU, industries are able to process vast amounts of data more efficiently, which is paramount for their growth and competitive edge. Characterized by its advanced architectural design, the RAIV GPU excels in managing substantial computational loads, which is essential for AI-driven processes and complex data analytics. Its adaptability makes it suitable for a wide array of applications, from enhancing automotive AI systems to empowering VR environments with seamless real-time interaction. Through optimized data handling and acceleration, the RAIV GPGPU assists in realizing smoother and more responsive application workflows. The strategic design of the RAIV GPGPU focuses on enabling integrative solutions that enhance performance without compromising on power efficiency. Its functionality is built to meet the high demands of today’s tech ecosystems, fostering advancements in computational efficiency and intelligent processing capabilities. As such, the RAIV stands out not only as a tool for improved graphical experiences but also as a significant component in driving innovation within tech-centric industries worldwide. Its pioneering architecture thus supports a multitude of applications, ensuring it remains a versatile and indispensable asset in diverse technological landscapes.
Nuclei's RISC-V CPU IP N Class is engineered with a 32-bit architecture specifically targeting microcontroller and AIoT applications. Tailored for high performance, it offers exceptional configurability, allowing integration into diverse system environments by selecting only the necessary features. The N Class series is part of Nuclei's robust coding framework, built with Verilog for enhanced readability and optimized for debugging and performance-power-area (PPA) considerations. This IP ensures scalability through support for RISC-V extensions including B, K, P, and V, as well as the flexibility of user-defined instruction extensions. Nuclei addresses comprehensive security through information security solutions like TEE and physical security packages. Meanwhile, its safety functionalities align with standards such as ASIL-B and ASIL-D, vital for applications demanding high safety protocols. The N Class is further supported by a wide range of ecosystem resources, facilitating seamless integration into various industrial applications. In summary, the N Class IP not only provides powerful performance capabilities but is also structured to accommodate a broad range of applications while adhering to necessary safety and security frameworks. Its user-friendly customization makes it particularly suitable for applications in rapidly evolving fields such as AIoT.
The eSi-3264 stands out with its support for both 32/64-bit operations, including 64-bit fixed and floating-point SIMD (Single Instruction Multiple Data) DSP extensions. Engineered for applications mandating DSP functionality, it does so with minimal silicon footprint. Its comprehensive instruction set includes specialized commands for various tasks, bolstering its practicality across multiple sectors.
The SCR3 microcontroller core serves as an efficient platform for a range of embedded applications, characterized by its ability to handle both 32/64-bit constructs. Capable of supporting up to four symmetric multiprocessing (SMP) cores, this core is perfect for applications demanding enhanced computational power and multitasking abilities. It operates with a 5-stage in-order pipeline, which, coupled with privilege mode support, ensures that it can manage multiple tasks smoothly while maintaining operational integrity. Such capabilities make the SCR3 microcontroller core particularly well-suited for domains like industrial control systems and automotive applications, where precision and reliability are paramount. The inclusion of a memory protection unit (MPU) and layered L1 and L2 caches significantly boosts data processing rates, optimizing system performance. Bringing these features together, the core maintains high functionality while ensuring energy efficiency—an essential factor for high-demand embedded systems. A prominent feature of the SCR3 core is its flexibility. It can be extensively configured to match specific project requirements, from simple embedded devices to complex sensor networks. The provision of comprehensive documentation and development toolkits simplifies the integration process, supporting designers in developing robust and scalable solutions. Continued innovation and customization potential solidify the SCR3's position as a pivotal component in harnessing the power of RISC-V architectures.
The eSi-1650 is a compact, low-power 16-bit CPU core integrating an instruction cache, making it an ideal choice for mature process nodes reliant on OTP or Flash program memory. By omitting large on-chip RAMs, the IP core optimizes power and area efficiency and permits the CPU to capitalize on its maximum operational frequency beyond OTP/Flash constraints.
ISPido represents a fully configurable RTL Image Signal Processing Pipeline, adhering to the AMBA AXI4 standards and tailored through the AXI4-LITE protocol for seamless integration with systems such as RISC-V. This advanced pipeline supports a variety of image processing functions like defective pixel correction, color filter interpolation using the Malvar-Cutler algorithm, and auto-white balance, among others. Designed to handle resolutions up to 7680x7680, ISPido provides compatibility for both 4K and 8K video systems, with support for 8, 10, or 12-bit depth inputs. Each module within this pipeline can be fine-tuned to fit specific requirements, making it a versatile choice for adapting to various imaging needs. The architecture's compatibility with flexible standards ensures robust performance and adaptability in diverse applications, from consumer electronics to professional-grade imaging solutions. Through its compact design, ISPido optimizes area and energy efficiency, providing high-quality image processing while keeping hardware demands low. This makes it suitable for battery-operated devices where power efficiency is crucial, without sacrificing the processing power needed for high-resolution outputs.
A high-performance solution for microcontroller applications, the SCR6 core is created to operate efficiently within deeply embedded environments. It boasts a 12-stage dual-issue out-of-order pipeline, facilitating advanced computation by optimizing instruction scheduling and execution. This core also incorporates a highly capable floating-point unit (FPU), further enhancing its ability to handle complex numerical operations with precision. The SCR6 microcontroller core fits seamlessly into various industrial and consumer electronics applications, where high performance mixed with power efficiency is crucial. Its unique architectural composition allows it to execute tasks at minimal energy expenditure, vital for battery-operated devices or systems requiring prolonged uptime. This capability is further augmented by its high-frequency operation and data management efficiency. For developers, the SCR6 merges flexibility with simplicity, offering a customizable platform supported by Syntacore’s extensive toolkit and documentation. It addresses the growing demand for intelligent, connected devices in sectors such as IoT and automation, making it an essential component in the development of cutting-edge technology solutions that require reliable computational power within limited resource constraints.
The Cyclone V FPGA with Integrated PQC Processor by ResQuant is a specialized product that comes pre-equipped with a comprehensive NIST PQC cryptography suite. This FPGA is tailored for applications requiring a robust proof-of-concept for quantum-safe implementations. It ensures seamless integration into existing systems, providing a practical platform for testing and deployment in quantum-secure environments. This product is available at a competitive price and represents an ideal starting point for entities looking to explore and adopt quantum-resilient technologies. Its configuration allows for straightforward implementation in diverse hardware infrastructures while offering a reliable option for organizations aiming to stay ahead in the evolving cyber security landscape. By incorporating the latest in cryptographic standards and ensuring vendor independence, the Cyclone V FPGA with Integrated PQC Processor by ResQuant effectively bridges current hardware technologies and future-proof security needs. It supports industry-wide applications, from IoT and ICT to automotive and military sectors, underscoring ResQuant's versatility in hardware security solutions.
The iCan PicoPop® System on Module offers a compact solution for high-performance computing in constrained environments, particularly in the realm of aerospace technology. This system on module is designed to deliver robust computing power while maintaining minimal space usage, offering an excellent ratio of performance to size. The PicoPop® excels in integrating a variety of functions onto a single module, including processing, memory, and interface capabilities, which collectively handle the demanding requirements of aerospace applications. Its efficient power consumption and powerful processing capability make it ideally suited to a range of in-flight applications and systems. This solution is tailored to support the development of sophisticated aviation systems, ensuring scalability and flexibility in deployment. With its advanced features and compact form, the iCan PicoPop® System on Module stands out as a potent component for modern aerospace challenges.
DolphinWare IPs is a versatile portfolio of intellectual property solutions that enable efficient SoC design. This collection includes various control logic components such as FIFO, arbiter, and arithmetic components like math operators and converters. In addition, the logic components span counters, registers, and multiplexers, providing essential functionalities for diverse industrial applications. The IPs in this lineup are meticulously designed to ensure data integrity, supported by robust verification IPs for AXI4, APB, SD4.0, and more. This comprehensive suite meets the stringent demands of modern electronic designs, facilitating seamless integration into existing design paradigms. Beyond their broad functionality, DolphinWare’s offerings are fundamental to applications requiring specific control logic and data integrity solutions, making them indispensable for enterprises looking to modernize or expand their product offerings while ensuring compliance with industry standards.
ISPido on VIP Board is a customized runtime solution tailored for Lattice Semiconductors’ Video Interface Platform (VIP) board. This setup enables real-time image processing and provides flexibility for both automated configuration and manual control through a menu interface. Users can adjust settings via histogram readings, select gamma tables, and apply convolutional filters to achieve optimal image quality. Equipped with key components like the CrossLink VIP input bridge board and ECP5 VIP Processor with ECP5-85 FPGA, this solution supports dual image sensors to produce a 1920x1080p HDMI output. The platform enables dynamic runtime calibration, providing users with interface options for active parameter adjustments, ensuring that image settings are fine-tuned for various applications. This system is particularly advantageous for developers and engineers looking to integrate sophisticated image processing capabilities into their devices. Its runtime flexibility and comprehensive set of features make it a valuable tool for prototyping and deploying scalable imaging solutions.
Designed for efficiency in microcontroller applications, the SCR4 microcontroller core offers a balance between capabilities and resource management. Its 5-stage in-order pipeline ensures robust task management, featuring privilege modes for comprehensive application control, while boasting both 32 and 64-bit support. This core stands out due to its floating-point unit (FPU) integration, enhancing its capacity for handling complex computational tasks effectively. The SCR4 is highly applicable in industrial settings, specifically in environments requiring real-time data handling and swift computational responses. Its architectural design includes memory protection and cache layers, ensuring that data processes are not only fast but also secure, mitigating risks of data loss or corruption. Whether deployed in advanced control systems or real-time monitoring devices, the SCR4 adapts flexibly to meet stringent performance benchmarks. Accompanied by complete development support through comprehensive toolkits and resources, this core reduces the time needed for deployment and testing, allowing for quicker iteration cycles in product development. The SCR4's adaptability and efficiency contribute to its practicality in a variety of applications, from automotive to IoT devices, consistently delivering high-performance outcomes tailored to the modern technological landscape.
The Low Power RISC-V CPU IP from SkyeChip is designed for energy-efficient processing applications, leveraging the RISC-V RV32 instruction set. It fully supports the 'I' and 'C' extensions, with partial support for the 'M' extension, operating exclusively in machine mode to minimize complexity and enhance security. Equipped with 32 vectorized interrupts and standard debugging capabilities defined per RISC-V specifications, this CPU IP excels in environments demanding quick interrupt handling and real-time processing. This CPU is especially suitable for battery-powered and embedded systems where power efficiency is critical. Tailored for modular integration in diverse software stacks, this IP offers a flexible architecture, ensuring longevity and adaptability in rapidly evolving technological ecosystems. It stands as a formidable component in the development of next-generation smart devices and IoT applications.
Nuclei's RISC-V CPU IP UX Class is a cutting-edge solution designed for 64-bit computing, particularly in data center operations, network systems, and Linux environments. Engineered with Verilog, the UX Class boasts outstanding readability and is tailored for effective debugging and PPA optimization, thus streamlining its deployment in performance-centric applications. Its comprehensive configurability allows for precise system incorporation by selecting features pertinent to specific operational needs. This processor IP is fortified with extensive RISC-V extension support, enhancing its applicability in various domains. Noteworthy are its security features, including TEE support and a robust physical security package, critical for maintaining information security integrity. Additionally, its alignment with safety protocols like ASIL-B and ASIL-D underscores its reliability in environments that demand stringent safety measures. The UX Class represents Nuclei's flagship offering for enterprises requiring powerful, flexible, and secure processing capabilities. By providing essential integration into Linux and network-driven systems, the UX Class solidifies its place as a cornerstone for modern, high-performance computing infrastructure.
Crafted to support Linux-based applications, the SCR5 application core is a high-efficiency core designed with a nine-stage in-order processing pipeline. Featuring an integrated MMU (Memory Management Unit), L1 and L2 caches, and maintaining cache coherency, the core exhibits robust data handling capabilities essential for powerful application processing. This application core is engineered for sectors like artificial intelligence, high-performance computing, and mobile technology, where processing power is a requisite. Its design enables effective data management and multitasking, accommodating various applications which require seamless transitions and high compute capacities. The SCR5 also supports symmetric multiprocessing (SMP) with up to four cores, offering scalable performance for increased data demands. In addition to its architectural strengths, the core is supported by Syntacore’s extensive suite of development tools, ensuring a comprehensive environment for developers to build, test, and optimize applications. Its adaptable nature and robust processing capabilities extend its use across multiple domains, establishing the SCR5 as an indispensable asset for developers seeking to drive sophisticated Linux-based systems.
The Universal DSP Library by Enclustra is designed to streamline digital signal processing across various applications. This library provides an extensive collection of DSP functions optimized for FPGA performance, enabling users to implement complex signal processing algorithms with ease and efficiency. It's tailored for image processing, audio applications, and other demanding DSP tasks, ensuring high performance and resource-efficient implementations. The library supports fixed-point and floating-point operations, offering flexibility in design according to specific needs. This makes it an invaluable resource for both prototyping and deployment in production environments, minimizing development time and maximizing performance. Furthermore, the Universal DSP Library includes a comprehensive set of features that are readily integrable with existing FPGA designs. Complementing its robust algorithmic offerings, Enclustra ensures that their DSP library is highly customizable, catering to unique processing requirements. This adaptability helps maintain high signal integrity and algorithm precision, making it an ideal choice for engineers looking to optimize their FPGA-based signal processing systems.
The Universal High-Speed SERDES ranging from 1G to 12.5G is a significant component for enabling rapid serial communication across digital systems. Its architecture is optimized for converting parallel data into serial streams, effectively reducing wiring complexity and simplifying chip design. This IP is essential for systems demanding high bandwidth and fast data rates, such as in data centers, networking equipment, and high-performance computing platforms. The product supports a wide range of data rates, starting from 1Gbps and scaling up to 12.5Gbps, ensuring adaptability across numerous applications. This capability is particularly advantageous in managing the dynamic bandwidth requirements seen in today's electronics landscape. As a result, it serves as a foundational IP for engineers seeking reliable and fast data transmission solutions. Additionally, this SERDES technology is critical for applications where data integrity and speed cannot be compromised. Its sophisticated design ensures efficient power usage, making it suitable for both power-sensitive and high-speed demanding environments. With its broad application scope, the Universal High-Speed SERDES is a go-to solution for implementers aiming to enhance connectivity and performance in advanced digital systems.
Designed for integration within various industry systems, ARM M-Class based ASICs from ASIC North provide flexibility and versatility. These chips, built around the ARM Cortex-M architecture, are optimized for embedded applications, offering a balance of performance and power efficiency. They are particularly suited to IoT applications due to their robust performance metrics and modular design adaptability. ASIC North ensures that each ARM M-Class ASIC is thoroughly verified, delivering optimal reliability for deployment in complex environments.
The EMSA5-FS processor is a robust RISC-V based solution designed for applications where functional safety is paramount, making it ideal for environments requiring high reliability and assurance. This processor is built to meet the rigorous demands of automotive and industrial markets with a single-issue, in-order 5-stage pipeline design. It supports a variety of RISC-V ISA extensions, providing a flexible architecture that can adapt to specific needs, including embedded safety functionalities like Dual Modular Redundancy (DMR) and Triple Modular Redundancy (TMR), ensuring safe operation under adverse conditions. Furthermore, it provides ISO 26262 ASIL-D readiness, which is critical for adhering to automotive safety standards. Configuration options for this processor include an optional L0 instruction cache, allowing design engineers to tailor system performance and size according to specific application requirements. The EMSA5-FS is designed to exceed 1GHz operating frequencies on advanced nodes, making it a powerful choice for applications that demand both performance and safety.
The Prodigy Universal Processor by Tachyum represents a landmark in processor technology, designed to facilitate a range of functions from general computing applications to AI-specific tasks. It integrates the benefits of CPUs, GPGPUs, and TPUs into a singular, cohesive architecture, showcasing a significant leap in performance efficiency and energy sustainability. The Prodigy chip radically lowers data center power use, thereby cutting carbon emissions and amplifying server efficiency. Additionally, this processor supports a reliable infrastructure that maximizes resource utilization across hyperscale data centers, AI enterprises, and HPC configurations.
Designed for 64-bit architecture, the RISC-V CPU IP NX Class is tailored for demanding applications such as storage, augmented reality, and artificial intelligence. This processor IP stands out for its robust configurability, allowing users to integrate it effortlessly into complex systems by selecting only the necessary features. Developed with Verilog, the NX Class is primed for excellent readability and optimization in debugging, ensuring efficiency in performance and power management. In line with Nuclei's commitment to extensibility, the NX Class supports a wide array of RISC-V extensions and user-defined instruction abilities, fostering adaptability across diverse technological landscapes. It is fortified with robust information security features like TEE and a physical security suite, catering to stringent requirements for information integrity. Moreover, its compliance with safety standards such as ASIL-B and ASIL-D highlights its applicability in safety-critical environments. The NX Class amplifies Nuclei's offering by delivering powerful computation capabilities required for sophisticated applications. It exemplifies Nuclei's strategic approach towards providing adaptable, secure, and high-performing processor solutions for advancing technology sectors.
iCEVision facilitates rapid prototyping and evaluation of connectivity features using the Lattice iCE40 UltraPlus FPGA. Designers can take advantage of exposed I/Os for quick implementation and validation of solutions, while enjoying compatibility with common camera interfaces such as ArduCam CSI and PMOD. This flexibility is complemented by software tools such as the Lattice Diamond Programmer and iCEcube2, which allow designers to reprogram the onboard SPI Flash and develop custom solutions. The platform comes preloaded with a bootloader and an RGB demo application, making it quick and easy for users to begin experimenting with their projects. Its design includes features like a 50mmx50mm form factor, LED applications, and multiple connectivity options, ensuring broad usability across various rapid prototyping scenarios. With its user-friendly setup and comprehensive toolkit, iCEVision is perfect for developers who need a streamlined path from initial design to functional prototype, especially in environments where connectivity and sensor integration are key.
The RISC-V CPU IP U Class by Nuclei is crafted for environments demanding both 32-bit architecture and memory management with Linux support, making it suited for edge computing applications. It stands out with its robust coding structure, designed with Verilog to ensure clear readability, thus facilitating optimization in debugging and PPA aspects. The U Class is part of Nuclei's flexible solutions that offer a rich configurability, enabling tailored system integration by incorporating only the essential features required by the user. This IP supports a wide spectrum of RISC-V extensions, including the support for user-defined instructions, offering significant adaptability across various platforms. Its comprehensive information security solutions include TEE and a physical security package, bolstering system protection. Complementing its security features, the U Class provides functional safety packages, certified for standards such as ASIL-B and ASIL-D, ensuring its reliability in secure applications. Nuclei's U Class showcases an exemplary blend of configurability and security, allowing it to cater to emerging technological needs while ensuring high standards of safety. Its capability to operate within Linux environments makes it particularly advantageous for cutting-edge edge computing projects.
The TimbreAI T3 is tailored for audio-focused devices, providing ultra-low power AI capabilities for applications like noise reduction in headsets. Offering performance up to 3.2 billion operations per second while maintaining minimal power draw of under 300μW, it is a prime choice for consumer audio solutions with strict area and power consumption needs. Its architecture ensures seamless integration and rapid deployment without external memory requirements, thereby achieving high performance while saving system power and chip area.
SiFive Automotive solutions provide cutting-edge automotive processors designed for high reliability and performance in modern vehicles. With a focus on industry-leading efficiency, safety, and a minimal physical footprint, the SiFive Automotive family supports requirements from infotainment systems to central computing. Each processor in this family is tailored for automotive usage, implementing critical safety standards like ISO 26262 ASIL D, to ensure compliance with the world's most stringent safety regulations. Capable of managing advanced driver assistance systems (ADAS) and developing autonomous vehicle technologies, these solutions are fortified for upcoming challenges in automotive electronics. Besides impressive safety and performance metrics, SiFive Automotive processors are designed with an eye towards cybersecurity and functional safety, ensuring comprehensive protection and optimal operation in demanding automotive conditions. This makes SiFive's offerings an essential part of modern automotive solutions, blending innovative technology with top-tier safety features for the autos of the future.
The BA51 is a deeply embedded ultra-low-power processor core from CAST’s RISC-V family, engineered for efficiency in power-sensitive applications. It capitalizes on a compact two-stage pipeline architecture, minimizing gate count to just 16K. Designed for performance in cost-sensitive environments, the BA51 achieves operational frequencies exceeding 500 MHz at 16nm process nodes, marking it as a standout in energy-conscious embedded designs. The core delivers an impressive 400 CoreMarks/MHz, ensuring robust application processing capabilities with optimized energy usage. Optional L0 instruction and data caches further enhance its ability to seamlessly transition between demanding tasks. The BA51's design reflects a focus on minimizing energy consumption while maintaining computational performance, making it ideal for applications such as IoT and wearables where both longevity and performance are critical. Its scalability and support from open-source development tools make it a go-to choice for engineers aiming to balance power efficiency with processing needs.
The YVR is built on the AVR Instruction Set Architecture working with a 2-clock machine cycle, focusing on optimized energy and time efficiency within compact and scaled-down systems. It highlights Systemyde’s dedication to enduring yet efficient processor solutions fitting detailed environments. Aimed at achieving maximum adaptability while minimizing overall design constraints, the YVR leverages timeless AVR architecture to ensure unfaltering compatibility with established industry functions. This processor conveys effective functionality integrating seamless system-wide implementations. Designed to provide latitude for technological growth, the YVR matches evolving needs with proficient execution efficacy. It retains its position as a fundamental choice in design scenarios prioritizing streamlined, energy-efficient processor operations, supporting a sustained and durable application presence.
Dillon Engineering's Floating Point Library core provides a comprehensive suite of IEEE 754 compatible floating-point computation modules. Utilizing the ParaCore Architect, this library offers extensive configurability in precision and logic usage, enabling customized solutions for various application needs. Designed to handle specialized floating-point operations with variable pipeline stages, the library supports single- and double-precision computations, ensuring optimal performance. The adjustable parameters allow this core to meet specific precision requirements without an unnecessary logic footprint, thereby enhancing efficiency and speed. This adaptability makes the Floating Point Library ideal for a wide range of digital computation tasks in both FPGA and ASIC environments. With robust support for critical computations across diverse applications, Dillon's floating-point library is equipped to tackle intricate mathematical challenges with precision and reliability.
The xcore-200 is a versatile microcontroller renowned for its advanced multi-core processing capabilities and robustness in managing real-time applications. It is engineered to deliver high-performance outputs, making it an ideal choice for tasks that require precision and fast execution. With an emphasis on low-latency processing, the xcore-200 excels in applications such as voice and audio processing, enabling efficient interfacing and data management across various systems. Its architecture supports complex computational tasks while maintaining energy efficiency, a critical factor for applications across industrial and consumer sectors. Integrating flexible I/O capabilities, it is highly adaptable to a diverse range of hardware environments. This flexibility ensures it can meet the custom needs of projects, continuous with rapidly evolving technology landscapes, emphasizing smart and connected solutions.
Panmnesia's PanAccelerator is a high-performance solution crafted to boost the processing power of AI systems. It is tailored for leading-edge machine learning workloads that require high-bandwidth memory expansion and rapid GPU interconnection. This accelerator supports efficient power usage and offers expansive scalability, making it ideal for large-scale AI training environments.
CAST's BA53 processor core is tailored for low-power applications where embedded solutions demand both reliability and efficiency. It features a single-issue, in-order 5-stage pipeline capable of running frequencies above 1GHz, even at 22nm process nodes. With around 30K gates, the BA53 strikes a balance between energy efficiency and performance, delivering 2.53 CoreMarks/MHz, proving its capability in high-demand environments such as consumer electronics and smart devices. The optional L0 instruction and data caches ensure that it can manage data efficiently with minimal delays, enhancing streamlined execution of computational tasks. Ideal for low-power embedded application scenarios, its scalable and configurable nature makes it suited for a range of devices that require robust performance without a large power draw. Engineers can leverage its comprehensive RISC-V support in various configurations to meet the exact power and performance balance for their specific project demands.
DRV32IMZicsr – Scalable RISC-V Power. Tailored for Your Project. Ready for the Future. The DRV32IMZicsr is a high-performance, 32-bit RISC-V processor core, equipped with M (Multiply/Divide), Zicsr (Control and Status Registers), and External Debug support. Built as part of DCD’s latest DRVX Core Family, it delivers the full flexibility, openness, and innovation that RISC-V promises—without locking you into proprietary architectures. ✅ Why RISC-V? RISC-V is a rapidly growing open standard for modern computing—backed by a global ecosystem of developers and vendors. It brings: * Freedom from licensing fees and vendor lock-in * Scalability from embedded to high-performance systems * Customizability with standard and custom instruction sets * Strong toolchain & ecosystem support 🚀 DRV32IMZicsr Highlights: * Five-stage pipeline and Harvard architecture for optimized performance * Configurable memory architecture: size and address allocation tailored to your needs Performance metrics: * **Up to 1.15 DMIPS/MHz** * **Up to 2.36 CoreMark/MHz** * Minimal footprint starting from just 14k gates * Flexible interfaces: Choose from AXI, AHB, or native bus options 🛡️ Designed for Safety & Integration: * Developed as an ISO 26262 Safety Element out of Context (SEooC) * Fully technology-agnostic, compatible with all FPGA and ASIC platforms * Seamless integration with DCD’s rich portfolio of IPs: DMA, SPI, UART, PWM, CAN, and more 🔍 Advanced Feature Set: * 32 general-purpose registers * Support for arithmetic, logic, load/store, conditional and unconditional control flow * M extension enables efficient integer multiplication/division * Zicsr extension provides robust interrupt and exception handling, performance counters, and timers * External Debug via JTAG: compliant with RISC-V Debug Specification 0.13.2 and 1.0.0, compatible with all mainstream tools 🧪 Developer-Ready: * Delivered with a fully automated testbench * Includes a comprehensive validation test suite for smooth integration into your SoC flow Whether you're building for automotive, IoT, consumer electronics, or embedded systems, the DRV32IMZicsr offers a future-ready RISC-V solution—highly configurable, performance-optimized, and backed by DCD’s 25 years of experience. Interested? Let’s build the next generation together. 📩 Contact us at info@dcd.pl
**DRV64IMZicsr – 64-bit RISC-V Performance. Designed for Demanding Innovation.** The DRV64IMZicsr is a powerful and versatile 64-bit RISC-V CPU core, built to meet the performance and safety needs of next-generation embedded systems. Featuring the M (Multiply/Divide), Zicsr (Control and Status Registers), and External Debug extensions, this core is engineered to scale—from edge computing to mission-critical applications. As part of the DRVX Core Family, the DRV64IMZicsr embodies DCD’s philosophy of combining open-standard freedom with customizable IP excellence—making it a smart and future-proof alternative to legacy architectures. ✅ Why Choose RISC-V? * No license fees – open-source instruction set means reduced TCO * Unmatched flexibility – tailor the architecture to your specific needs * A global, thriving ecosystem – support from toolchains, OSes, and hardware vendors * Security & longevity – open and verifiable architecture ensures trust and sustainability 🚀 DRV64IMZicsr – Core Advantages: * 64-bit RISC-V ISA with M, Zicsr, and Debug support * Five-stage pipeline, Harvard architecture, and efficient branch prediction * Configurable memory size and allocation for program and data spaces Performance optimized: * **Up to 2.38 CoreMark/MHz** * **Up to 1.17 DMIPS/MHz** * Compact footprint starting from just 17.6k gates * Interface options: AXI, AHB, or native * Compatible with Classical CAN, CAN FD, and CAN XL through additional IPs 🛡️ Safety, Compatibility & Flexibility Built In: * Developed as an ISO 26262 Safety Element out of Context (SEooC) * Technology-agnostic – works seamlessly across all FPGA and ASIC vendors * Expandable with DCD’s IP portfolio: DMA, SPI, UART, I²C, CAN, PWM, and more 🔍 Robust Feature Set for Real Applications: * Full 64-bit processing – ideal for performance-intensive, memory-heavy tasks * M extension enables high-speed multiplication/division via dedicated hardware unit * Zicsr extension gives full access to Control and Status Registers, enabling: * Interrupts and exception handling (per RISC-V Privileged Spec) * Performance counters and timers * JTAG-compatible debug interface – compliant with RISC-V Debug Spec (0.13.2 & 1.0.0) 🧪 Ready for Development & Integration: * Comes with a fully automated testbench * Includes a comprehensive suite of validation tests for smooth SoC integration * Supported by industry-standard tools, ensuring a hassle-free dev experience Whether you’re designing for automotive safety, industrial control, IoT gateways, or AI-enabled edge devices, the DRV64IMZicsr gives you the performance, flexibility, and future-readiness of RISC-V—without compromise. 💡 Build smarter, safer systems—on your terms. 📩 Contact us today at info@dcd.pl to start your next RISC-V-powered project.
The Akeana 1000 Series represents a mid-range selection of high-performance processors tailored for data-driven applications involving extensive computation. Featuring a 64-bit RISC-V architecture, these processors are designed for flexibility and customization, supporting multi-threading and both in-order and out-of-order execution to deliver optimal performance across a variety of uses. These processors are highly suitable for applications such as edge AI, industrial automation, and automotive sensing. With configurable instruction width (from one to four ways) and robust memory management features, including a TLB of up to 512 entries, they efficiently handle a wide span of computational demands. Furthermore, the series is equipped with Rich OS systems support, embracing features like hypervisor and vector extensions to enhance their computation capabilities. Among the standout features of the Akeana 1000 Series are its multi-threaded architectures and scalable functionalities, which allow seamless integration into smart homes, wearables, and automotive environments. This series is designed to handle sophisticated software and hardware interactions with ease, ensuring quick adaptability in rapidly advancing technological domains.
This networking solution from CetraC endows high-performance capabilities into FPGA and ASIC products, tailored for distributed architectural systems. It is crafted specifically for industries that demand high-speed data transmissions and excellent reliability across their networking infrastructures. The product supports numerous protocols such as TSN, CAN FD, and ARINC429, making it versatile for integration into various high-tech systems needing comprehensive data management and communication structures. The solution also features robust security measures including AES256 encryption to protect data integrity while facilitating seamless protocol conversions to enhance interoperability between various network segments.
The DF6802 is an 8-bit synthesizable MPU IP Core, software-compatible with Motorola MC6802. It features an enhanced internal architecture for approximately 4 times faster execution than the original 6802 chip at the same clock frequency. Designed with two power-saving modes (WAIT and HALT), the DF6802 is ideal for automotive and battery-driven applications. It is fully customizable, allowing for a configuration that meets specific user needs, without extra costs for unused features. The IP Core comes equipped with a fully automated testbench and a comprehensive set of test cases for smooth package validation. Moreover, the DF6802 supports DCD’s Hardware Debug System, DoCD™, which offers real-time, non-intrusive debugging across the entire SoC, including the ability to halt, run, step into, or skip instructions, and read/write data to any part of the microprocessor. With support for a wide range of interfaces such as USB, Ethernet, I2C, SPI, UART, CAN, LIN, HDLC, and Smart Card, the DF6802 shows versatile connectivity while ensuring efficient power and performance optimization. The DF6802 is technology agnostic, ensuring compatibility with all FPGA and ASIC vendors. It comes with extensive deliverables including synthesizable RTL, testbench environment, simulation macros, synthesis scripts, and complete technical documentation along with 12 months of technical support.
The Akeana 100 Series signifies a family of compact, energy-efficient processors based on the 32-bit RISC-V architecture, designed to optimize real-time processing tasks across various applications. These processors are engineered with a focus on ultra-low power consumption and small physical footprint, making them perfect for deeply embedded systems. They support in-order execution and are equipped with up to 512KB of instructed coupled-memory, enhancing computation efficiency significantly. Ideal for applications that prioritize low power and cost, the Akeana 100 Series suite is tailored for smart devices like speakers, home appliances, drones, and wearables. With features such as up to 64KB data and instruction caches, the processors in this series can adapt to a wide range of real-time computation needs. They incorporate several configurations, including a physical memory protection unit and various pipeline stages, providing substantial flexibility and reliability to developers. Alongside being compact and efficient, these processors support up-to-date security and performance features, making them indispensable in modern embedded applications. They provide an entry point into Akeana's IP portfolio that enables broad processor IP capabilities, offering customers numerous possibilities for innovation and product differentiation.
The BA25 is a top-tier application processor from CAST, providing a sophisticated solution for high-performance embedded systems that require Android or Linux environments. This processor boasts an intricate seven-stage pipeline that allows for superior throughput in a variety of industrial and consumer applications. The BA25 supports off-chip memory, enabling expansive data capacity management crucial for operating complex systems. As a 32-bit powerhouse, it delivers significant processing power tailored for both embedded and application-level processing. This capacity makes it suitable for sophisticated tasks, including high-end consumer electronics and automotive control systems. The inclusion of development tools such as the BeyondStudio IDE promotes quick programming and integration, making it a strategic asset in shortening time-to-market for developers aiming to leverage advanced functionalities in their products.
The Akeana 5000 Series stands as the high-performance tier within Akeana’s processor offerings, designed for demanding application scenarios in cloud computing, mobile computation, and data center operations. These processors boast a 64-bit RISC-V architecture with out-of-order execution and a robust multi-threading framework capable of executing instructions in wides ranging from six to ten. This series brings industry-leading computation features and supports diverse operating systems like Android and Linux, making it ideal for virtualization and high-frequency operations. The processors are highly scalable, supporting numerous coherent processors, making them apt for intricate computational tasks in cloud and data center settings, where performance is paramount. Akeana 5000 Series processors offer expandable configuration options, including vector and vector cryptographic extensions, shared last-level cache up to 16 MB, and physical memory protection for robust security. Designed to cater to sophisticated computation requirements, these processors ensure that users can achieve significant advancement in AI training, data infrastructure, and virtual networking technologies.
Digital Core Design presents the D68000-CPU32+, a soft core microprocessor compatible with the 68000's CPU32+ architecture. With a 32-bit data bus and address bus, this core is optimized for high performance program execution and includes a built-in DoCD-BDM debugger interface, making it ideal for debugging complete SoC systems. Its support for 8-, 16-, and 32-bit unaligned/aligned data-bus transfers and a vast array of addressing modes offers flexibility in complex application development. Designed for universal compatibility across FPGA and ASIC vendors, the D68000-CPU32+ is delivered with a comprehensive suite of testbenches, automatic validation tests, and sculpted documentation. The architecture boasts advanced arithmetic and logic capabilities, making it suitable for a wide array of applications, from embedded systems to complex SoCs. With licensing methods streamlined for ease of access, utilizing the D68000-CPU32+ in various contexts is both simple and efficient.
DP8051CPU is an ultra high performance 8-bit soft core microcontroller designed by DCD-SEMI to be highly efficient in terms of speed and power consumption. With a pipelined RISC architecture, it can perform operations remarkably faster than the traditional 80C51, with its performance metrics standing up to 15.55 times its predecessor when benchmarked using Dhrystone 2.1. The architecture supports both Harvard and von Neumann configurations, increasing the flexibility for memory access and inclusion. The microcontroller is equipped with an advanced Power Management Unit, allowing it to maintain its high performance capabilities while optimizing power consumption. Targeted for carrying out operations with both fast on-chip memory and slower off-chip alternatives, it can process up to 300 million instructions per second while managing substantial code and data spaces efficiently. Furthermore, it is 100% compatible with the industry-standard 8051 microcontrollers in terms of binary operation, making it highly suitable for integration in existing systems. It boasts of supporting a wide variety of interfaces like USB, Ethernet, I2C, SPI, UART, and many others, which adds to the scope of applications, especially in portable and power-conscious devices. The microcontroller supports a comprehensive hardware debugging system (DoCD™), uniquely proposed to allow non-intrusive debugging of an operational application, offering a robust development and testing phase. With real-time capability and providing insights at various operational stages, it ensures that users can have a contained yet exhaustive overview of their designs. DCD ensures a technology-agnostic design, meaning that this IP core ensures compatibility across all prominent FPGA and ASIC vendors, providing flexibility and convenience for a wide array of users. The DP8051CPU is delivered with a complete test bench and a series of validation sets, ensuring a smooth integration within any workflow.
Join the world's most advanced semiconductor IP marketplace!
It's free, and you'll get all the tools you need to discover IP, meet vendors and manage your IP workflow!
Join the world's most advanced AI-powered semiconductor IP marketplace!
It's free, and you'll get all the tools you need to advertise and discover semiconductor IP, keep up-to-date with the latest semiconductor news and more!
Plus we'll send you our free weekly report on the semiconductor industry and the latest IP launches!