All IPs > Processor > Building Blocks
Processor building blocks are fundamental components within the realm of semiconductor IPs that play a crucial role in the development and optimization of processors. These building blocks are indispensable for crafting sophisticated, high-performance processors required in a wide range of electronic devices, from handheld gadgets to large-scale computing systems.
Processor semiconductor IP building blocks include key elements such as arithmetic logic units (ALUs), registers, and control units, which integrate to form the central processing unit (CPU). Each of these components contributes to the overall functionality of the processor. ALUs enable the processor to perform arithmetic operations and logical decisions, while registers provide the necessary storage for quick data access. Control units are responsible for interpreting instructions and coordinating other components to execute tasks efficiently. Together, these building blocks ensure that processors perform at optimal levels, handling complex computational tasks with ease.
One of the primary uses of processor building blocks is in creating devices that require advanced computational power, such as smartphones, tablets, personal computers, and servers. These semiconductor IPs help in the design of custom processors that meet specific performance, power consumption, and cost requirements. By leveraging these building blocks, designers can develop processors that are tailored to particular applications, thereby enhancing the overall performance and efficiency of devices. This customizability also facilitates innovations in emerging technologies such as artificial intelligence, the Internet of Things (IoT), and autonomous vehicles, where processors need to handle rapidly growing workloads.
The processor building blocks category in our Silicon Hub encompasses a diverse range of semiconductor IPs that cater to different processing needs. From general-purpose processors with balanced performance to specialized processors with optimized functionalities, this category provides essential components for developing next-generation electronic solutions. By utilizing these building blocks, designers and engineers can push the boundaries of processing technology, creating more capable and efficient devices that meet the evolving demands of modern consumers and industries.
Axelera AI's Metis AIPU PCIe AI Accelerator Card is engineered to deliver top-tier inference performance in AI tasks aimed at heavy computational loads. This PCIe card is designed with the industry’s highest standards, offering exceptional processing power packaged onto a versatile PCIe form factor, ideal for integration into various computing systems including workstations and servers.<br><br>Equipped with a quad-core Metis AI Processing Unit (AIPU), the card delivers unmatched capabilities for handling complex AI models and extensive data streams. It efficiently processes multiple camera inputs and supports independent parallel neural network operations, making it indispensable for dynamic fields such as industrial automation, surveillance, and high-performance computing.<br><br>The card's performance is significantly enhanced by the Voyager SDK, which facilitates a seamless AI model deployment experience, allowing developers to focus on model logic and innovation. It offers extensive compatibility with mainstream AI frameworks, ensuring flexibility and ease of integration across diverse use cases. With a power-efficient design, this PCIe AI Accelerator Card bridges the gap between traditional GPU solutions and today's advanced AI demands.
Quadric's Chimera GPNPU is an adaptable processor core designed to respond efficiently to the demand for AI-driven computations across multiple application domains. Offering up to 864 TOPS, this licensable core seamlessly integrates into system-on-chip designs needing robust inference performance. By maintaining compatibility with all forms of AI models, including cutting-edge large language models and vision transformers, it ensures long-term viability and adaptability to emerging AI methodologies. Unlike conventional architectures, the Chimera GPNPU excels by permitting complete workload management within a singular execution environment, which is vital in avoiding the cumbersome and resource-intensive partitioning of tasks seen in heterogeneous processor setups. By facilitating a unified execution of matrix, vector, and control code, the Chimera platform elevates software development ease, and substantially improves code maintainability and debugging processes. In addition to high adaptability, the Chimera GPNPU capitalizes on Quadric's proprietary Compiler infrastructure, which allows developers to transition rapidly from model conception to execution. It transforms AI workflows by optimizing memory utilization and minimizing power expenditure through smart data storage strategies. As AI models grow increasingly complex, the Chimera GPNPU stands out for its foresight and capability to unify AI and DSP tasks under one adaptable and programmable platform.
Leveraging a high-performance RISC architecture, the eSi-3250 32-bit core efficiently integrates instruction and data caches. This makes it compatible with designs utilizing slower on-chip memories such as eFlash. The core not only supports MMU for address translation but also allows for user-defined custom instructions, greatly enhancing its flexibility for specialized and high-performance applications.
xcore.ai by XMOS is a groundbreaking solution designed to bring intelligent functionality to the forefront of semiconductor applications. It enables powerful real-time execution of AI, DSP, and control functionalities, all on a single, programmable chip. The flexibility of its architecture allows developers to integrate various computational tasks efficiently, making it a fitting choice for projects ranging from smart audio devices to automated industrial systems. With xcore.ai, XMOS provides the technology foundation necessary for swift deployment and scalable application across different sectors, delivering high performance in demanding environments.
The Metis AIPU M.2 Accelerator Module from Axelera AI provides an exceptional balance of performance and size, perfectly suited for edge AI applications. Designed for high-performance tasks, this module is powered by a single Metis AI Processing Unit (AIPU), which offers cutting-edge inference capabilities. With this M.2 card module, developers can easily integrate AI processing power into compact devices.<br><br>This module accommodates demanding AI workloads, enabling applications to perform complex computations with efficiency. Thanks to its low power consumption and versatile integration capabilities, it opens new possibilities for use in edge devices that require robust AI processing power. The Metis AIPU M.2 module supports a wide range of AI models and pipelines, facilitated by Axelera's Voyager SDK software platform which ensures seamless deployment and optimization of AI models.<br><br>The module's versatile design allows for streamlined concurrent multi-model processing, significantly boosting the device's AI capabilities without the need for external data centers. Additionally, it supports advanced quantization techniques, providing users with increased prediction accuracy for high-stakes applications.
The aiWare Neural Processing Unit (NPU) is an advanced hardware solution engineered for the automotive sector, highly regarded for its efficiency in neural network acceleration tailored for automated driving technologies. This NPU is designed to handle a broad scope of AI applications, including complex neural network models like CNNs and RNNs, offering scalability across diverse performance tiers from L2 to more demanding L4 systems. With its industry-leading efficiency, the aiWare hardware IP achieves up to 98% effectiveness over various automotive neural networks. It supports vast sensor configurations typical in automotive contexts, maintaining reliable performance under rigorous conditions validated by ISO 26262 ASIL B certification. aiWare is not only power-efficient but designed with a scalable architecture, providing up to 1024 TOPS, ensuring that it meets the demands of high-performance processing requirements. Furthermore, aiWare is meticulously crafted to facilitate integration into safety-critical environments, deploying high determinism in its operations. It minimizes external memory dependencies through an innovative dataflow approach, maximizing on-chip memory utilization and minimizing system power. Featuring extensive documentation for integration and customization, aiWare stands out as a crucial component for OEMs and Tier1s looking to optimize advanced driver-assist functionalities.
RAIV represents Siliconarts' General Purpose-GPU (GPGPU) offering, engineered to accelerate data processing across diverse industries. This versatile GPU IP is essential in sectors engaged in high-performance computing tasks, such as autonomous driving, IoT, and sophisticated data centers. With RAIV, Siliconarts taps into the potential of the fourth industrial revolution, enabling rapid computation and seamless data management. The RAIV architecture is poised to deliver unmatched efficiency in high-demand scenarios, supporting massive parallel processing and intricate calculations. It provides an adaptable framework that caters to the needs of modern computing, ensuring balanced workloads and optimized performance. Whether used for VR/AR applications or supporting the back-end infrastructure of data-intensive operations, RAIV is designed to meet and exceed industry expectations. RAIV’s flexible design can be tailored to enhance a broad spectrum of applications, promising accelerated innovation in sectors dependent on AI and machine learning. This GPGPU IP not only underscores Siliconarts' commitment to technological advancement but also highlights its capability to craft solutions that drive forward computational boundaries.
The N Class RISC-V CPU IP from Nuclei is tailored for applications where space efficiency and power conservation are paramount. It features a 32-bit architecture and is highly suited for microcontroller applications within the AIoT realm. The N Class processors are crafted to provide robust processing capabilities while maintaining a minimal footprint, making them ideal candidates for devices that require efficient power management and secure operations. By adhering to the open RISC-V standard, Nuclei ensures that these processors can be seamlessly integrated into various solutions, offering customizable options to fit specific system requirements.
Syntacore's SCR3 microcontroller core is a versatile option for developers looking to harness the power of a 5-stage in-order pipeline. Designed to support both 32-bit and 64-bit symmetric multiprocessing (SMP) configurations, this core is perfectly aligned with the needs of embedded applications requiring moderate power and resource efficiency coupled with enhanced processing capabilities. The architecture is fine-tuned to handle a variety of workloads, ensuring a balance between performance and power usage, making it suitable for sectors such as industrial automation, automotive sensors, and IoT devices. The inclusion of privilege modes, memory protection units (MPUs), and cache systems further enhances its capabilities, particularly in environments where system security and reliability are paramount. Developers will find the SCR3 core to be highly adaptable, fitting seamlessly into designs that need scalability and modularity. Syntacore's comprehensive toolkit, combined with detailed documentation, ensures that system integration is both quick and reliable, providing a robust foundation for varied applications.
The Codasip RISC-V BK Core Series is renowned for integrating flexibility and performance scalability within a RISC-V framework. These cores are designed to cater to various application demands, from general-purpose computing to specialized tasks requiring high processing capability. The BK series supports customization that optimizes performance, power, and area based on different application scenarios. One notable feature of the BK Core Series is its ability to be tailored using Codasip Studio, which enables architects to modify microarchitectures and instruction sets efficiently. This customization is supported by a robust set of pre-verified options, ensuring quality and reliability across applications. The BK cores also boast energy efficiency, making them suitable for both power-sensitive and performance-oriented applications. Another advantage of the BK Core Series is its compatibility with a broad range of industry-standard tools and interfaces, which simplifies integration into existing systems and accelerates time to market. The series also emphasizes secure and safe design, aligning with industry standards for functional safety and security, thereby allowing integration into safety-critical environments.
The eSi-1650 is a compact, low-power 16-bit CPU core integrating an instruction cache, making it an ideal choice for mature process nodes reliant on OTP or Flash program memory. By omitting large on-chip RAMs, the IP core optimizes power and area efficiency and permits the CPU to capitalize on its maximum operational frequency beyond OTP/Flash constraints.
Designed for exceptional performance in demanding environments, the SCR6 microcontroller core integrates advanced processing capabilities with power efficiency. Featuring a 12-stage, dual-issue out-of-order pipeline and a high-performance floating-point unit (FPU), it excels in managing computationally intensive tasks with finesse and speed, making it a prime candidate for next-gen microcontroller applications. With a focus on high bandwidth and efficient throughput, the SCR6 supports scalable deployments thanks to its symmetrical multiprocessing (SMP) configurations. This design enables usage in sectors where swift processing and reliability are crucial, such as real-time industrial automation, automotive systems, and IoT platforms. Syntacore’s SCR6 benefits from a well-rounded development environment, offering support that ensures high compatibility with a variety of platforms and applications. The core exemplifies Syntacore's commitment to providing innovative solutions that embody both the potential and flexibility of the RISC-V architecture.
The eSi-1600 is a 16-bit CPU core designed for cost-sensitive and power-efficient applications. It accords performance levels similar to that of 32-bit CPUs while maintaining a system cost comparable to 8-bit processors. This IP is particularly well-suited for control applications needing limited memory resources, demonstrating excellent compatibility with mature mixed-signal technologies.
The eSi-3200, a 32-bit cacheless core, is tailored for embedded control with its expansive and configurable instruction set. Its capabilities, such as 64-bit multiply-accumulate operations and fixed-point complex multiplications, cater effectively to signal processing tasks like FFTs and FIRs. Additionally, it supports SIMD and single-precision floating point operations, coupled with efficient power management features, enhancing its utility for diverse embedded applications.
The SCR1 microcontroller core from Syntacore is an open-source, compact core tailored for deeply embedded applications. It features a straightforward 4-stage in-order pipeline, making it ideally suited for smaller, power-constrained devices where performance needs to be finely balanced with energy consumption. This core is particularly valuable in applications requiring a high degree of customization and flexibility. With a unique combination of low area footprint and efficiency, the SCR1 is a pivotal tool for developers involved in creating optimized, scalable systems, particularly in the fields of sensory data processing, IoT, and control systems. Its design architecture ensures that it can efficiently handle the demands of modern consumer electronics and other compact embedded devices. The SCR1 supports a rich ecosystem of development tools provided by Syntacore, ensuring that integration into various platforms is seamless. Syntacore's commitment to open-source development allows for a wide adoption of their core among a diverse range of projects and initiatives, enhancing the potential of the RISC-V architecture in global markets.
The ISPido on VIP Board solution is designed for the Lattice Semiconductor's VIP (Video Interface Platform) board, offering real-time, high-quality image processing. It supports automatic configuration selection at boot, ensuring a balanced output or alternatively, it provides a menu interface for manual adjustments. Key features include input from two Sony IMX 214 sensors and output in HDMI format with 1920 x 1080p resolution using YCrCb 4:2:2 color space. This system supports run-time calibration via a serial port, allowing users to customize gamma tables, convolution filters, and other settings to match specific application needs. The innovative setup facilitates streamlined image processing for efficient deployment across applications requiring high-definition video processing.
The iCan PicoPop® is a highly compact System on Module (SOM) based on the Zynq UltraScale+ MPSoC from Xilinx, suited for high-performance embedded applications in aerospace. Known for its advanced signal processing capabilities, it is particularly effective in video processing contexts, offering efficient data handling and throughput. Its compact size and performance make it ideal for integration into sophisticated systems where space and performance are critical.
The Universal DSP Library is designed to simplify digital signal processing tasks. It ensures efficient and highly effective operations by offering a comprehensive suite of algorithms and functions tailored for various DSP applications. The library is engineered for optimal performance and can be easily integrated into FPGA-based designs, making it a versatile tool for any digital signal processing needs. The comprehensive nature of the Universal DSP Library simplifies the development of complex signal processing applications. It includes support for key processing techniques and can significantly reduce the time required to implement and test DSP functionalities. By leveraging this library, developers can achieve high efficiency and performance in their digital signal processing tasks, thereby optimizing overall system resources. Moreover, the DSP library is designed to be compatible with a wide range of FPGAs, providing a flexible and scalable solution. This makes it an ideal choice for developers seeking to create innovative solutions across various applications, ensuring that their designs can handle demanding signal processing requirements effectively.
ISPido is a comprehensive image signal processing (ISP) pipeline that is fully configurable via the AXI4-LITE protocol. It features a complete ISP pipeline incorporating modules for defective pixel correction, color filter array interpolation using the Malvar-Cutler algorithm, and a series of image enhancements. These include convolution filters, auto-white balance, color correction matrix, gamma correction, and color space conversion between RGB and YCbCr formats. ISPido supports resolutions up to 7680x7680, ensuring compatibility with ultra-high-definition applications, up to 8K resolution systems. It is engineered to comply with the AMBA AXI4 standards, offering versatility and easy integration into various systems, whether for FPGA, ASIC, or other hardware configurations.
The Prodigy Universal Processor by Tachyum is a versatile chip that merges the capabilities of CPUs, GPGPUs, and TPUs into a single architecture. This innovation is designed to cater to the needs of AI, HPC, and hyperscale data centers by delivering improved performance, energy efficiency, and server utilization. The chip functions as a general-purpose processor, facilitating various applications from hyperscale data centers to high-performance computing and private clouds. It boasts a seamless integration model, allowing existing software packages to run flawlessly on its uniquely designed instruction set architecture. By providing up to 18.5x increased performance and enhanced performance per watt, Prodigy stands out in the industry, tackling common issues like high power consumption and limited processor performance that currently hamper data centers. It comprises a coherent multiprocessor architecture that supports a wide range of AI and computing workloads, ultimately transforming data centers into universal computing hubs. The design not only aims to lower the total cost of ownership but also contributes to reducing carbon emissions through decreased energy requirements. Prodigy’s architecture supports a diverse range of SKUs tailored to specific markets, making it adaptable to various applications. Its flexibility and superior performance capabilities position it as a significant player in advancing sustainable, energy-efficient computational solutions worldwide. The processor's ability to handle complex AI tasks with minimal energy use underlines Tachyum's commitment to pioneering green technology in the semiconductor industry.
The SiFive Essential family provides a comprehensive range of embedded processor cores that can be tailored to various application needs. This series incorporates silicon-proven, pre-defined CPU cores with a focus on scalability and configurability, ranging from simple 32-bit MCUs to advanced 64-bit processors capable of running embedded RTOS and full-fledged operating systems like Linux. SiFive Essential empowers users with the flexibility to customize the design for specific performance, power, and area requirements. The Essential family introduces significant advancements in processing capabilities, allowing users to design processors that meet precise application needs. It features a rich set of options for interface customizations, providing seamless integration into broader SoC designs. Moreover, the family supports an 8-stage pipeline architecture and, in some configurations, offers dual-issue superscalar capabilities for enhanced processing throughput. For applications where security and traceability are crucial, the Essential family includes WorldGuard technology, which ensures comprehensive protection across the entire SoC, safeguarding against unauthorized access. The flexible design opens up various use cases, from IoT devices and microcontrollers to real-time control applications and beyond.
The NX Class RISC-V CPU IP by Nuclei is characterized by its 64-bit architecture, making it a robust choice for storage, AR/VR, and AI applications. This processing unit is designed to accommodate high data throughput and demanding computational tasks. By leveraging advanced capabilities, such as virtual memory and enhanced processing power, the NX Class facilitates cutting-edge technological applications and is adaptable for integration into a vast array of high-performance systems.
Engineered for a dynamic performance footprint, the SCR4 microcontroller core offers a significant advantage with its 5-stage in-order pipeline and specialized floating-point unit (FPU). This characteristic makes it ideal for applications demanding precise computational accuracy and speed, such as control systems, network devices, and automotive technologies. Leveraging 32/64-bit capability, the SCR4 core supports symmetric multiprocessing (SMP) with the added benefit of privilege modes and a comprehensive memory architecture, which includes both L1 and L2 caches. These features make it particularly attractive for developers seeking a core that enables high data throughput while maintaining a focus on power efficiency and area optimization. Syntacore has positioned the SCR4 as a go-to core for projects requiring both power and precision, supported by a development environment that is both intuitive and comprehensive. Its applicability across various industrial sectors underscores its versatility and the robustness of the RISC-V architecture that underpins it.
A robust platform offering a full spectrum of ARM Cortex-M microprocessors, perfect for integration across a broad scope of systems. These ASICs are finely tuned to accommodate various applications, demonstrating commendable performance in areas such as IoT, industrial automation, and consumer electronics. Known for their reliability and scalability, these ASICs enhance system capabilities by providing customizable features that match exclusive client criteria.
The eSi-3264 stands out with its support for both 32/64-bit operations, including 64-bit fixed and floating-point SIMD (Single Instruction Multiple Data) DSP extensions. Engineered for applications mandating DSP functionality, it does so with minimal silicon footprint. Its comprehensive instruction set includes specialized commands for various tasks, bolstering its practicality across multiple sectors.
Naneng Microelectronics offers a versatile Universal High-Speed SERDES capable of operating in a broad range of speeds from 1Gbps to 12.5Gbps. This SERDES is engineered to provide seamless and agile data transmission, underpinning critical communications infrastructure in various applications. The high-speed capabilities of this serializer/deserializer underline its suitability for high-performance networking solutions. Its flexible deployment options make it an ideal candidate for integration in a variety of system architectures, promoting a balance between speed and signal integrity. The design includes robust features to counter signal degradation and maintain the integrity of transmitted data, ensuring reliable operation across extensive data networks. Support for high data rates ensures this SERDES component meets and exceeds industry standards, delivering enhanced data throughput and supporting next-generation electronic systems. With adaptability at its core, the Universal High-Speed SERDES exemplifies comprehensive technological solutions in the semiconductor industry.
The Origin E1 is a streamlined neural processing unit designed specifically for always-on applications in personal electronics and smart devices such as smartphones and security systems. This processor focuses on delivering highly efficient AI performance, achieving around 18 TOPS per watt. With its low power requirements, the E1 is ideally suited for tasks demanding continuous data sampling, such as camera operations in smart surveillance systems where it runs on less than 20mW of power. Its packet-based architecture ensures efficient resource utilization, maintaining high performance with lower power and area consumption. The E1's adaptability is enhanced through customizable options, allowing it to meet specific PPA requirements effectively, making it the go-to choice for applications seeking to improve user privacy and experience by minimizing external memory use.
The Cyclone V FPGA with Integrated PQC Processor by ResQuant is a specialized product that comes pre-equipped with a comprehensive NIST PQC cryptography suite. This FPGA is tailored for applications requiring a robust proof-of-concept for quantum-safe implementations. It ensures seamless integration into existing systems, providing a practical platform for testing and deployment in quantum-secure environments. This product is available at a competitive price and represents an ideal starting point for entities looking to explore and adopt quantum-resilient technologies. Its configuration allows for straightforward implementation in diverse hardware infrastructures while offering a reliable option for organizations aiming to stay ahead in the evolving cyber security landscape. By incorporating the latest in cryptographic standards and ensuring vendor independence, the Cyclone V FPGA with Integrated PQC Processor by ResQuant effectively bridges current hardware technologies and future-proof security needs. It supports industry-wide applications, from IoT and ICT to automotive and military sectors, underscoring ResQuant's versatility in hardware security solutions.
DolphinWare IPs is a versatile portfolio of intellectual property solutions that enable efficient SoC design. This collection includes various control logic components such as FIFO, arbiter, and arithmetic components like math operators and converters. In addition, the logic components span counters, registers, and multiplexers, providing essential functionalities for diverse industrial applications. The IPs in this lineup are meticulously designed to ensure data integrity, supported by robust verification IPs for AXI4, APB, SD4.0, and more. This comprehensive suite meets the stringent demands of modern electronic designs, facilitating seamless integration into existing design paradigms. Beyond their broad functionality, DolphinWare’s offerings are fundamental to applications requiring specific control logic and data integrity solutions, making them indispensable for enterprises looking to modernize or expand their product offerings while ensuring compliance with industry standards.
The UX Class RISC-V CPU IP epitomizes Nuclei's commitment to potent processing solutions suited for data centers and network environments. Equipped with a 64-bit architecture with integrated MMU capabilities, it is tailored for embedding into Linux-operated systems that demand high operational efficiency and reliability. The UX Class supports extensive data handling and computational tasks, ensuring seamless performance even under the rigors of data-intensive environments.
The SCR5 application core by Syntacore is crafted for high-efficiency, Linux-capable applications, focusing on delivering a balance between robust performance and resource optimization. Its 9-stage in-order pipeline is augmented by an integrated Memory Management Unit (MMU), alongside L1 and L2 caches, enabling enhanced cache coherency—a critical requirement for applications that demand consistent data processing and management. This core is particularly attuned to industries such as artificial intelligence, machine learning, data centers, and mobile computing. Its seamless compatibility with SMP configurations, scaling up to 4 cores, ensures that even complex workloads can be handled efficiently without sacrificing operational efficiency or computational power. SCR5's adaptability and comprehensive support features make it an outstanding choice for developers aiming to craft high-performance applications. Syntacore's supplementary tools, including development kits and SDKs, provide a strong support ecosystem for leveraging the RISC-V architecture, empowering developers to innovate without constraints.
The xcore-200 series by XMOS is engineered for high-performance tasks requiring precise timing and robust audio processing capabilities. It supports a wide array of use cases with its parallel processing power, enabling extensive audio management and control in multichannel systems. This capability makes it suitable for both professional audio products and consumer-grade technology seeking reliable, low-latency performance. Ideal for developers focused on creating responsive and interactive technologies, xcore-200 provides a scalable platform to facilitate advanced audio experiences with exceptional ease.
Nuclei's U Class RISC-V CPU IP represents a versatile computing solution engineered to handle complex processing tasks. With a 32-bit architecture augmented by a Memory Management Unit (MMU), this class is optimized for Linux environments and excels in edge computing applications. Featuring extensive configuration options, the U Class processor ensures adaptability to varied computing demands, facilitating efficient task execution across diverse scenarios.
TimbreAI T3 addresses audio processing needs by embedding AI in sound-based applications, particularly suitable for power-constrained devices like wireless headsets. It's engineered for exceptional power efficiency, requiring less than 300 µW to operate while maintaining a performance capacity of 3.2 GOPS. This AI inference engine simplifies deployment by never necessitating changes to existing trained models, thus preserving accuracy and efficiency. The TimbreAI T3's architecture ensures that it handles noise reduction seamlessly, offering core audio neural network support. This capability is complemented by its flexible software stack, further reinforcing its strength as a low-power, high-functionality solution for state-of-the-art audio applications.
Engineered for top-tier AI applications, the Origin E8 excels in delivering high-caliber neural processing for industries spanning from automotive solutions to complex data center implementations. The E8's design supports singular core performance up to 128 TOPS, while its adaptive architecture allows easy multi-core scalability to exceed PetaOps. This architecture eradicates common performance bottlenecks associated with tiling, delivering robust throughput without unnecessary power or area compromises. With an impressive suite of features, the E8 facilitates remarkable computational capacity, ensuring that even the most intricate AI networks function smoothly. This high-performance capability, combined with its relatively low power usage, positions the E8 as a leader in AI processing technologies where high efficiency and reliability are imperative.
The Origin E2 NPU cores offer a balanced solution for AI inference by optimizing for both power and area without compromising performance. These cores are expertly crafted to save system power in devices such as smartphones and edge nodes. Their design supports a wide variety of networks, including RNNs and CNNs, catering to the dynamic demands of consumer and industrial applications. With customizable performance ranging from 1 to 20 TOPS, they are adept at handling various AI-driven tasks while reducing latency. The E2 architecture is ingeniously configured to enable parallel processing, affording high resource utilization that minimizes memory demands and system overhead. This results in a flexible NPU architecture that serves as a reliable backbone for deploying efficient AI models across different platforms.
ADICSYS, a subsidiary of EASii IC, provides advanced Field Programmable Gate Array (FPGA) solutions that blend the benefits of custom FPGA and embedded FPGA technologies. With over a decade's worth of expertise in FPGA development, ADICSYS offers soft eFPGA IP which is not only highly customizable and scalable but also seamlessly integrates into standard RTL design flows. This IP is designed to be technology-independent and supports a synthesis from RTL to FPGA bitstream conversion, catering to diverse application requirements. The soft eFPGA technology from ADICSYS is celebrated for its flexibility, allowing modifications to circuits even post-production and during service. This adaptability significantly reduces design times and risks associated with errors. By enabling Programmable IPs with immediate accessibility for customization, ADICSYS supports a range of architectural parameters, from LUT count to routing density, ensuring precise adaptation to area, performance, and power constraints. The Synthesizable Programmable Core (SPC) created by ADICSYS is particularly advantageous for reducing risks associated with design errors and specification changes, making it a pivotal component in many industrial applications. ADICSYS stands out for its application of industry-standard CAD tools, guaranteeing ease in integration and adaptability for varied semiconductor projects.
The iCEVision platform is built around enabling designers and developers to exploit the iCE40 UltraPlus FPGA's connectivity features. This board provides rapid prototyping and testing environments through exposed I/O interfaces compatible with popular camera modules such as ArduCam CSI and PMOD. Programming can be handled via the Lattice Diamond Programmer, which allows users to modify the on-board SPI flash with custom code. Moreover, iCEVision supports seamless multi-board connection through ArduCam connectors, offering a versatile tool for both learning and professional development phases in FPGA design and implementation.
The Origin E6 provides a formidable edge in AI processing demands for mobile and AR/VR applications, boasting performance specifications between 16 to 32 TOPS. Tailored to accommodate the latest AI models, the E6 benefits from Expedera's distinct packet-based architecture. This cutting-edge design simplifies parallel processing, which enhances efficiency while concurrently diminishing power and resource consumption. As an NPU, it supports an extensive array of video, audio, and text-based networks, thus delivering consistent performance even under complex specifications. The E6's high utilization rates minimize wastage and amplify throughput, certifying its position as an optimal choice for forward-thinking gadgets requiring potent due to its scalable and adaptable architecture.
The YVR is a sophisticated processor designed around the AVR Instruction Set Architecture, optimized with a 2-clock machine cycle. It capitalizes on the strengths of the AVR architecture, providing enhanced processing speeds while maintaining power efficiency—a key requirement for many modern electronics. Its design ensures that it can be integrated into a wide range of applications, particularly those that demand rapid data processing alongside reliable performance. The YVR supports a variety of technological environments, offering flexibility in both legacy systems and new developments requiring robust embedded processors. Systemyde provides a complete package of design and verification resources for the YVR, ensuring high performance and dependability. This processor is a versatile choice for designers seeking a balance between speed, efficiency, and reliability in their embedded applications, making it an integral part of Systemyde’s processor offerings.
Featuring cutting-edge AI technology, Axelera AI's Metis AIPU Quad-Core High-Performance PCIe Card stands as a beacon of advancement in AI accelerator technology. This card equips developers with the tools needed to tackle even the most challenging AI applications with ease and efficiency.<br><br>This PCIe card includes 4 Metis AI Processing Units (AIPUs) working in unison to deliver peak performance, capable of supporting demanding AI inference tasks across various verticals such as healthcare, smart cities, and advanced robotics. Whether you're aiming to enhance machine learning applications or build complex neural network infrastructures, this card is crafted to meet such high-end needs.<br><br>With a strong focus on power efficiency and development ease, the Metis PCIe Card offers both extensive configuration options and compatibility with Axelera's Voyager SDK. This ensures flexible deployment and seamless integration, transforming your AI vision into reality with precision and speed.
This high performance digital filter is engineered to elevate audio applications, boasting exceptional capabilities when deployed in FPGA. It embodies ITechland's dedication to technological excellence, utilizing ZYNQ tools and C++ for impressive interconnectivity and performance. Commonly applied in satellite wireless communication systems, this filter not only enhances signal clarity but also optimizes system function. Designed to integrate seamlessly with existing infrastructure, it features robust connectivity options, linking efficiently with FPGA and DDR, alongside other external interfaces. This flexibility allows it to be adapted for various applications, such as monitoring motor control systems, ensuring real-time analysis and response. The advanced capabilities of this digital filter offer unmatched audio clarity, aiding in the fine-tuning of audio outputs to meet precise specifications. Professionals in telecommunications and audio engineering will find its precision and adaptability a valuable asset, embodying a blend of innovative technology and practical functionality.
The ONNC Compiler is a robust compilation tool designed for optimizing AI models, particularly neural networks, for efficient deployment on hardware accelerators. This compiler is capable of translating high-level AI models into optimized code that makes the best use of the underlying silicon architecture, ensuring reduced power consumption and increased processing performance. One of the key features of the ONNC Compiler is its support for a wide array of neural network models and architectures, facilitating versatile applications across different AI domains. It provides developers with flexibility and control over the compilation process, allowing for optimizations that align closely with specific hardware capabilities and constraints. The ONNC Compiler is integrated into Skymizer's suite of tools to support seamless deployment of AI solutions, reducing the complexity and time associated with bringing AI models from development stages to fully functioning applications. This integration ensures high efficiency and scalability, making it an essential tool for enterprises looking to maximize their AI hardware investments.
The High-Performance FPGA & ASIC Networking Product by CetraC.io is a leading-edge solution for distributed architectures in critical systems across various sectors. It is specifically designed to cater to the demanding needs of industries requiring robust, high-speed networking capabilities with a primary focus on performance and reliability. This product combines FPGA and ASIC technologies, harnessing their synergies to deliver exceptional speed and precise control over data streams, making it ideal for complex, data-intensive environments. Engineered to support a wide range of protocols such as Ethernet, AFDX, PCI Express, and more, this networking product embodies flexibility and adaptability. Its ability to handle diverse data streams simultaneously, with ultra-low latency and high throughput, ensures that it can meet the needs of high-demand infrastructural setups, from aerospace and automotive to industrial networks. Moreover, this technology is pivotal in integrating seamlessly with existing network frameworks, enhancing overall system efficiency and communication accuracy. Security is a cornerstone of CetraC.io’s offering, with this product incorporating advanced hardware-based encryption mechanisms. Using AES256 GCM, the networking product ensures that all transmitted data remains secure and protected against unauthorized access, fulfilling stringent industry cybersecurity standards. This robust security framework works in tandem with its performance attributes to present a comprehensive solution to modern networking challenges. Furthermore, the product features high levels of cyber resilience and determinism, crucial for maintaining intact operations even under adverse conditions. Its hardware-based design replaces traditional software vulnerability points, offering a more secure, reliable, and efficient operation, perfectly suited to support the evolving landscape of industries transitioning towards increased automation and digitalization.
**DRV64IMZicsr – 64-bit RISC-V Performance. Designed for Demanding Innovation.** The DRV64IMZicsr is a powerful and versatile 64-bit RISC-V CPU core, built to meet the performance and safety needs of next-generation embedded systems. Featuring the M (Multiply/Divide), Zicsr (Control and Status Registers), and External Debug extensions, this core is engineered to scale—from edge computing to mission-critical applications. As part of the DRVX Core Family, the DRV64IMZicsr embodies DCD’s philosophy of combining open-standard freedom with customizable IP excellence—making it a smart and future-proof alternative to legacy architectures. ✅ Why Choose RISC-V? * No license fees – open-source instruction set means reduced TCO * Unmatched flexibility – tailor the architecture to your specific needs * A global, thriving ecosystem – support from toolchains, OSes, and hardware vendors * Security & longevity – open and verifiable architecture ensures trust and sustainability 🚀 DRV64IMZicsr – Core Advantages: * 64-bit RISC-V ISA with M, Zicsr, and Debug support * Five-stage pipeline, Harvard architecture, and efficient branch prediction * Configurable memory size and allocation for program and data spaces Performance optimized: * **Up to 2.38 CoreMark/MHz** * **Up to 1.17 DMIPS/MHz** * Compact footprint starting from just 17.6k gates * Interface options: AXI, AHB, or native * Compatible with Classical CAN, CAN FD, and CAN XL through additional IPs 🛡️ Safety, Compatibility & Flexibility Built In: * Developed as an ISO 26262 Safety Element out of Context (SEooC) * Technology-agnostic – works seamlessly across all FPGA and ASIC vendors * Expandable with DCD’s IP portfolio: DMA, SPI, UART, I²C, CAN, PWM, and more 🔍 Robust Feature Set for Real Applications: * Full 64-bit processing – ideal for performance-intensive, memory-heavy tasks * M extension enables high-speed multiplication/division via dedicated hardware unit * Zicsr extension gives full access to Control and Status Registers, enabling: * Interrupts and exception handling (per RISC-V Privileged Spec) * Performance counters and timers * JTAG-compatible debug interface – compliant with RISC-V Debug Spec (0.13.2 & 1.0.0) 🧪 Ready for Development & Integration: * Comes with a fully automated testbench * Includes a comprehensive suite of validation tests for smooth SoC integration * Supported by industry-standard tools, ensuring a hassle-free dev experience Whether you’re designing for automotive safety, industrial control, IoT gateways, or AI-enabled edge devices, the DRV64IMZicsr gives you the performance, flexibility, and future-readiness of RISC-V—without compromise. 💡 Build smarter, safer systems—on your terms. 📩 Contact us today at info@dcd.pl to start your next RISC-V-powered project.
The DF6802 is an 8-bit synthesizable MPU IP Core, software-compatible with Motorola MC6802. It features an enhanced internal architecture for approximately 4 times faster execution than the original 6802 chip at the same clock frequency. Designed with two power-saving modes (WAIT and HALT), the DF6802 is ideal for automotive and battery-driven applications. It is fully customizable, allowing for a configuration that meets specific user needs, without extra costs for unused features. The IP Core comes equipped with a fully automated testbench and a comprehensive set of test cases for smooth package validation. Moreover, the DF6802 supports DCD’s Hardware Debug System, DoCD™, which offers real-time, non-intrusive debugging across the entire SoC, including the ability to halt, run, step into, or skip instructions, and read/write data to any part of the microprocessor. With support for a wide range of interfaces such as USB, Ethernet, I2C, SPI, UART, CAN, LIN, HDLC, and Smart Card, the DF6802 shows versatile connectivity while ensuring efficient power and performance optimization. The DF6802 is technology agnostic, ensuring compatibility with all FPGA and ASIC vendors. It comes with extensive deliverables including synthesizable RTL, testbench environment, simulation macros, synthesis scripts, and complete technical documentation along with 12 months of technical support.
DRV32IMZicsr – Scalable RISC-V Power. Tailored for Your Project. Ready for the Future. The DRV32IMZicsr is a high-performance, 32-bit RISC-V processor core, equipped with M (Multiply/Divide), Zicsr (Control and Status Registers), and External Debug support. Built as part of DCD’s latest DRVX Core Family, it delivers the full flexibility, openness, and innovation that RISC-V promises—without locking you into proprietary architectures. ✅ Why RISC-V? RISC-V is a rapidly growing open standard for modern computing—backed by a global ecosystem of developers and vendors. It brings: * Freedom from licensing fees and vendor lock-in * Scalability from embedded to high-performance systems * Customizability with standard and custom instruction sets * Strong toolchain & ecosystem support 🚀 DRV32IMZicsr Highlights: * Five-stage pipeline and Harvard architecture for optimized performance * Configurable memory architecture: size and address allocation tailored to your needs Performance metrics: * **Up to 1.15 DMIPS/MHz** * **Up to 2.36 CoreMark/MHz** * Minimal footprint starting from just 14k gates * Flexible interfaces: Choose from AXI, AHB, or native bus options 🛡️ Designed for Safety & Integration: * Developed as an ISO 26262 Safety Element out of Context (SEooC) * Fully technology-agnostic, compatible with all FPGA and ASIC platforms * Seamless integration with DCD’s rich portfolio of IPs: DMA, SPI, UART, PWM, CAN, and more 🔍 Advanced Feature Set: * 32 general-purpose registers * Support for arithmetic, logic, load/store, conditional and unconditional control flow * M extension enables efficient integer multiplication/division * Zicsr extension provides robust interrupt and exception handling, performance counters, and timers * External Debug via JTAG: compliant with RISC-V Debug Specification 0.13.2 and 1.0.0, compatible with all mainstream tools 🧪 Developer-Ready: * Delivered with a fully automated testbench * Includes a comprehensive validation test suite for smooth integration into your SoC flow Whether you're building for automotive, IoT, consumer electronics, or embedded systems, the DRV32IMZicsr offers a future-ready RISC-V solution—highly configurable, performance-optimized, and backed by DCD’s 25 years of experience. Interested? Let’s build the next generation together. 📩 Contact us at info@dcd.pl
DP8051CPU is an ultra high performance 8-bit soft core microcontroller designed by DCD-SEMI to be highly efficient in terms of speed and power consumption. With a pipelined RISC architecture, it can perform operations remarkably faster than the traditional 80C51, with its performance metrics standing up to 15.55 times its predecessor when benchmarked using Dhrystone 2.1. The architecture supports both Harvard and von Neumann configurations, increasing the flexibility for memory access and inclusion. The microcontroller is equipped with an advanced Power Management Unit, allowing it to maintain its high performance capabilities while optimizing power consumption. Targeted for carrying out operations with both fast on-chip memory and slower off-chip alternatives, it can process up to 300 million instructions per second while managing substantial code and data spaces efficiently. Furthermore, it is 100% compatible with the industry-standard 8051 microcontrollers in terms of binary operation, making it highly suitable for integration in existing systems. It boasts of supporting a wide variety of interfaces like USB, Ethernet, I2C, SPI, UART, and many others, which adds to the scope of applications, especially in portable and power-conscious devices. The microcontroller supports a comprehensive hardware debugging system (DoCD™), uniquely proposed to allow non-intrusive debugging of an operational application, offering a robust development and testing phase. With real-time capability and providing insights at various operational stages, it ensures that users can have a contained yet exhaustive overview of their designs. DCD ensures a technology-agnostic design, meaning that this IP core ensures compatibility across all prominent FPGA and ASIC vendors, providing flexibility and convenience for a wide array of users. The DP8051CPU is delivered with a complete test bench and a series of validation sets, ensuring a smooth integration within any workflow.
Designed for sophisticated mobile and consumer applications, the Cortex-A725 Processor combines high performance with energy efficiency. It is rooted in Arm's latest architecture, delivering optimal balance in computational capacity and power saving. This processor is well-suited for a range of applications from smartphones to tablets, where power efficiency is crucial without sacrificing processing capabilities. With advanced stacking technology, the Cortex-A725 delivers substantial improvements in responsiveness and application handling, providing a smoother user experience even during demanding tasks. Incorporating security features, this processor ensures safe and efficient operations, making it a preferred choice for developers aiming to integrate high-performance computing into portable devices.
Digital Core Design presents the D68000-CPU32+, a soft core microprocessor compatible with the 68000's CPU32+ architecture. With a 32-bit data bus and address bus, this core is optimized for high performance program execution and includes a built-in DoCD-BDM debugger interface, making it ideal for debugging complete SoC systems. Its support for 8-, 16-, and 32-bit unaligned/aligned data-bus transfers and a vast array of addressing modes offers flexibility in complex application development. Designed for universal compatibility across FPGA and ASIC vendors, the D68000-CPU32+ is delivered with a comprehensive suite of testbenches, automatic validation tests, and sculpted documentation. The architecture boasts advanced arithmetic and logic capabilities, making it suitable for a wide array of applications, from embedded systems to complex SoCs. With licensing methods streamlined for ease of access, utilizing the D68000-CPU32+ in various contexts is both simple and efficient.
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