All IPs > Multimedia
In the rapidly evolving world of semiconductors, multimedia semiconductor IPs play a crucial role in enabling and enhancing digital media experiences across various electronic devices. This category encompasses a broad range of intellectual properties tailored for multimedia processing, from audio and video codecs to graphical interfaces, essential for consumer electronics, mobile devices, broadcasting equipment, and more. As technology advances, so too do the demands for higher performance, better quality, and increased efficiency in multimedia signal processing.
This category is home to subcategories that feature cutting-edge technologies and industry standards in multimedia processing. 2D and 3D rendering IPs lead the visual innovation charge, offering essential tools for developing immersive user interfaces and gaming experiences. Advanced audio interfaces, including ADPCM and WMA IPs, provide high-quality sound reproduction and compression, essential for both professional audio systems and consumer devices.
One of the highlights of the multimedia IP category is video compression technology. Standards like H.264, H.265, and the new H.266 are crucial for streaming services, broadcasting, and digital video recorders, offering solutions that reduce data rates while maintaining video quality. Image processing IPs including JPEG, JPEG 2000, and MPEG standards, ensure efficient image storage and retrieval, vital for digital cameras and web applications.
Additionally, interface IPs such as HDMI, Camera Interface, and MHL provide seamless connectivity, enabling efficient data transfer between devices. With innovations such as AV1 for open-source video coding, and emerging technologies like TICO and MPEG 5 LCEVC, our catalog covers both established and avant-garde solutions for multimedia applications. These semiconductor IPs empower developers and manufacturers to deliver next-generation multimedia experiences, ensuring devices meet the modern consumer's expectations for quality and performance.
Overview: CMOS Image Sensors (CIS) often suffer from base noise, such as Additive White Gaussian Noise (AWGN), which deteriorates image quality in low-light environments. Traditional noise reduction methods include mask filters for still images and temporal noise data accumulation for video streams. However, these methods can lead to ghosting artifacts in sequential images due to inconsistent signal processing. To address this, this IP offers advanced noise reduction techniques and features a specific Anti-ghost Block to minimize ghosting effects. Specifications:  Maximum Resolution o Image : 13MP o Video : 13MP@30fps  -Input formats : YUV422–8 bits  -Output formats o DVP : YUV422-8 bits o AXI : YUV420, YUV422  -8 bits-Interface o ARM® AMBA APB BUS interface for ISP system control o ARM® AMBA AXI interface for data o Direct connection to sensor stream data (DVP) Features:  Base Noise Correction: AWGN reduction for improved image quality  Mask Filter: Convolution-based noise reduction for still images  Temporal Noise Data Accumulation: Gaussian Distribution-based noise reduction for video streams using 2 frames of images  3D Noise Reduction (3DNR): Sequential image noise reduction with Anti-ghost Block  Motion Estimation and Adaptive: Suppresses ghosting artifacts during noise reduction  Real-Time Processing: Supports Digital Video Port (DVP) and AXI interfaces for seamless integration  Anti-Ghost  Real time De-noising output
Overview: Lens distortion is a common issue in cameras, especially with wide-angle or fisheye lenses, causing straight lines to appear curved. Radial distortion, where the image is expanded or reduced radially from the center, is the most prominent type. Failure to correct distortion can lead to issues in digital image analysis. The solution involves mathematically modeling and correcting distortion by estimating parameters that determine the degree of distortion and applying inverse transformations. Automotive systems often require additional image processing features, such as de-warping, for front/rear view cameras. The Lens Distortion Correction H/W IP comprises 3 blocks for coordinate generation, data caching, and interpolation, providing de-warping capabilities for accurate image correction. Specifications:  Maximum Resolution: o Image: 8MP (3840x2160) o Video: 8MP @ 60fps  Input Formats: YUV422 - 8 bits  Output Formats: o AXI: YUV420, YUV422, RGB888 - 8 bits  Interface: o ARM® AMBA APB BUS interface for system control o ARM® AMBA AXI interface for data Features:  Programmable Window Size and Position  Barrel Distortion Correction Support  Wide Angle Correction up to 192°  De-warping Modes: o Zoom o Tilt o Pan o Rotate o Side-view  Programmable Parameters: o Zoom Factor: controls Distance from the Image Plane to the Camera (Sensor)
The KL730 AI SoC is a state-of-the-art chip incorporating Kneron's third-generation reconfigurable NPU architecture, delivering unmatched computational power with capabilities reaching up to 8 TOPS. This chip's architecture is optimized for the latest CNN network models and performs exceptionally well in transformer-based applications, reducing DDR bandwidth requirements substantially. Furthermore, it supports advanced video processing functions, capable of handling 4K 60FPS outputs with superior image handling features like noise reduction and wide dynamic range support. Applications can range from intelligent security systems to autonomous vehicles and commercial robotics.
Overview: The Camera ISP IP is an Image Signal Processing (ISP) IP developed for low-light environments in surveillance and automotive applications, supporting a maximum processing resolution of 13 Mega or 8Mega Pixels (MP) at 60 frames per second (FPS). It offers a configurable ISP pipeline with features such as 18x18 2D/8x6 2D Color Shading Correction, 19-Point Bayer Gamma Correction, Region Color Saturation, Hue, and Delta L Control functions. The ISP IP enhances image quality with optimal low-light Noise/Sharp filters and offers benefits such as low gate size and memory usage through algorithm optimization. The IP is also ARM® AMBA 3 AXI protocol compliant for easy control via an AMBA 3 APB bus interface. Specifications:  Maximum Resolution: o Image: 13MP/8MP o Video: 13MP @ 60fps / 8MP @ 60fps  Input Formats: Bayer-8, 10, 12, 14 bits  Output Formats: o DVP: YUV422, YUV444, RGB888 - 8, 10, 12 bits o AXI: YUV422, YUV444, YUV420, RGB888 - 8, 10, 12 bits  Interface: o ARM® AMBA APB BUS interface for ISP system control o ARM® AMBA AXI interface for data o Direct connection to sensor stream data (DVP) o Features:  Defective Pixel Correction: On-The-Fly Defective Pixel Correction  14-Bit Bayer Channel Gain Support: Up to x4 / x7.99 with Linear Algebra for Input Pixel Level Adjustment  Gb/Gr Unbalance Correction: Maximum Correction Tolerance Gb/Gr Rate of 12.5%  2D Lens-Shading Correction: Supports 18x18 / 8x6 with Normal R/Gb/Gr/B Channel Shading Correction and Color Stain Correction  High-Resolution RGB Interpolation: Utilizes ES/Hue-Med/Average/Non-Directional Based Hybrid Type Algorithm  Color Correction Matrix: 3x3 Matrix  Bayer Gamma Correction: 19 points  RGB Gamma Correction: 19 points  Color Enhancement: Hue/Sat/∆-L Control for R/G/B/C/M/Y Channels  High-Performance Noise Reduction: For Bayer/RGB/YC Domain Noise Reduction  High-Resolution Sharpness Control: Multi-Sharp Filter with Individual Sharp Gain Control  Auto Exposure: Utilizes 16x16 Luminance Weight Window & Pixel Weighting  Auto White Balance: Based on R/G/B Feed-Forward Method  Auto Focus: 2-Type 6-Region AF Value Return
Overview: RCCC and RCCB in ISP refer to Red and Blue Color Correction Coefficients, respectively. These coefficients are utilized in Image Signal Processing to enhance red and blue color components for accurate color reproduction and balance. They are essential for color correction and calibration to ensure optimal image quality and color accuracy in photography, video recording, and visual displays. The IP is designed to process RCCC pattern data from sensors, where green and blue pixels are substituted by Clear pixel, resulting in Red or Clear (Monochrome) format after demosaicing. It supports real-time processing with Digital Video Port (DVP) format similar to CIS output. RCCB sensors use Clear pixels instead of Green pixels, enhancing sensitivity and image quality in low-light conditions compared to traditional RGB Bayer sensors. LOTUS converts input from RCCB sensors to a pattern resembling RGB Bayer sensors, providing DVP format interface for real-time processing. Features:  Maximum Resolution: 8MP (3840h x 2160v)  Maximum Input Frame Rate: 30fps  Low Power Consumption  RCCC/RCCB Pattern demosaicing
Overview: Human eyes have a wider dynamic range than CMOS image sensors (CIS), leading to differences in how objects are perceived in images or videos. To address this, CIS and IP algorithms have been developed to express a higher range of brightness. High Dynamic Range (HDR) based on Single Exposure has limitations in recreating the Saturation Region, prompting the development of Wide Dynamic Range (WDR) using Multi Exposure images. The IP supports PWL companding mode or Linear mode to perform WDR. It analyzes the full-image histogram for global tone mapping and maximizes visible contrast in local areas for enhanced dynamic range. Specifications:  Maximum Resolution: o Image: 13MP o Video: 13MP @ 60fps (Input/Output)  Input Formats (Bayer): o HDR Linear Mode: Max raw 28 bits o Companding Mode: Max PWL compressed raw 24 bits  Output Formats (Bayer): 14 bits  Interface: o ARM® AMBA APB BUS interface for ISP system control o ARM® AMBA AXI interface for data o Video data stream interface Features:  Global Tone Mapping based on histogram analysis o Adaptive global tone mapping per Input Images  Local Tone Mapping for adaptive contrast enhancement  Real-Time WDR Output  Low Power Consumption and Small Gate Count  28-bit Sensor Data Interface
Axelera AI has crafted a PCIe AI acceleration card, powered by their high-efficiency quad-core Metis AIPU, to tackle complex AI vision tasks. This card provides an extraordinary 214 TOPS, enabling it to process the most demanding AI workloads. Enhanced by the Voyager SDK's streamlined integration capabilities, this card promises quick deployment while maintaining superior accuracy and power efficiency. It is tailored for applications that require high throughput and minimal power consumption, making it ideal for edge computing.
The Metis M.2 AI accelerator module from Axelera AI is a cutting-edge solution for embedded AI applications. Designed for high-performance AI inference, this card boasts a single quad-core Metis AIPU that delivers industry-leading performance. With dedicated 1 GB DRAM memory, it operates efficiently within compact form factors like the NGFF M.2 socket. This capability unlocks tremendous potential for a range of AI-driven vision applications, offering seamless integration and heightened processing power.
The AX45MP is engineered as a high-performance processor that supports multicore architecture and advanced data processing capabilities, particularly suitable for applications requiring extensive computational efficiency. Powered by the AndesCore processor line, it capitalizes on a multicore symmetric multiprocessing framework, integrating up to eight cores with robust L2 cache management. The AX45MP incorporates advanced features such as vector processing capabilities and support for MemBoost technology to maximize data throughput. It caters to high-demand applications including machine learning, digital signal processing, and complex algorithmic computations, ensuring data coherence and efficient power usage.
Overview: RGB-IR features in ISP enable the capture and processing of Red, Green, Blue, and Infrared (IR) light data in an Image Signal Processing (ISP) system. This functionality enhances image quality by extracting additional information not visible to the human eye in standard RGB images. By integrating IR and RGB data into the demosaic processing pipeline, the ISP can enhance scene analysis, object detection, and image clarity in applications such as surveillance, automotive, and security systems. Features:  IR Core - 4Kx1EA:  4K Maximum Resolution: 3840h x 2160v @ 30fps  IR Color Correction 3.99x support  IR data Full-size output / 1/4x subsample support (Pure IR Pixel data)  Only RGB-IR 4x4 pattern support  IR data Crop support
The AI Camera Module from Altek Corporation is a testament to their prowess in integrating complex imaging technologies. With substantial expertise in lens design and an adeptness for soft-hard integration capabilities, Altek partners with top global brands to supply a variety of AI-driven cameras. These cameras meet diverse customer demands in AI+IoT differentiation, edge computing, and high-resolution image requisites of 2K to 4K quality. This module's ability to seamlessly engage with the latest AI algorithms makes it ideal for smart environments requiring real-time data analysis and decision-making capabilities.
As the SoC that placed Kneron on the map, the KL520 AI SoC continues to enable sophisticated edge AI processing. It integrates dual ARM Cortex M4 CPUs, ideally serving as an AI co-processor for products like smart home systems and electronic devices. It supports an array of 3D sensor technologies including structured light and time-of-flight cameras, which broadens its application in devices striving for autonomous functionalities. Particularly noteworthy is its ability to maximize power savings, making it feasible to power some devices on low-voltage battery setups for extended operational periods. This combination of size and power efficiency has seen the chip integrated into numerous consumer product lines.
Archband's PDM-to-PCM Converter is a versatile module designed to facilitate digital audio transformation. By converting Pulse Density Modulated audio signals into Pulse Code Modulated signals, this converter enhances audio clarity and fidelity in modern digital interfaces. It suits applications where efficient data streaming and noise reduction are critical, such as in high-quality audio devices and communications technology.
This ultra-compact and high-speed H.264 core is engineered for FPGA platforms, boasting industry-leading size and performance. Capable of providing 1080p60 H.264 Baseline support, it accommodates various customization needs, including different pixel depths and resolutions. The core is particularly noted for its minimal latency of less than 1ms at 1080p30, a significant advantage over competitors. Its flexibility allows integration with a range of FPGA systems, ensuring efficient compression without compromising on speed or size. In one versatile package, users have access to a comprehensive set of encoding features including variable and fixed bit-rate options. The core facilitates simultaneous processing of multiple video streams, adapting to various compression ratios and frame types (I and P frames). Its support for advanced video input formats and compliance with ITAR guidelines make it a robust choice for both military and civilian applications. Moreover, the availability of low-cost evaluation licenses invites experimentation and custom adaptation, promoting broad application and ease of integration in diverse projects. These cores are especially optimized for low power consumption, drawing minimal resources in contrast to other market offerings due to their efficient FPGA design architecture. They include a suite of enhanced features such as an AXI wrapper for simple system integration and significantly reduced Block RAM requirements. Embedded systems benefit from its synchronous design and wide support for auxiliary functions like simultaneous stream encoding, making it a versatile addition to complex signal processing environments.
The Chimera GPNPU by Quadric redefines AI computing on devices by combining processor flexibility with NPU efficiency. Tailored for on-device AI, it tackles significant machine learning inference challenges faced by SoC developers. This licensable processor scales massively offering performance from 1 to 864 TOPs. One of its standout features is the ability to execute matrix, vector, and scalar code in a single pipeline, essentially merging the functionalities of NPUs, DSPs, and CPUs into a single core. Developers can easily incorporate new ML networks such as vision transformers and large language models without the typical overhead of partitioning tasks across multiple processors. The Chimera GPNPU is entirely code-driven, empowering developers to optimize their models throughout a device's lifecycle. Its architecture allows for future-proof flexibility, handling newer AI workloads as they emerge without necessitating hardware changes. In terms of memory efficiency, the Chimera architecture is notable for its compiler-driven DMA management and support for multiple levels of data storage. Its rich instruction set optimizes both 8-bit integer operations and complex DSP tasks, providing full support for C++ coded projects. Furthermore, the Chimera GPNPU integrates AXI Interfaces for efficient memory handling and configurable L2 memory to minimize off-chip access, crucial for maintaining low power dissipation.
DisplayPort and Embedded DisplayPort (eDP) IP by Silicon Library enables advanced digital display connectivity, offering superior video performance and enhanced sound. Designed to serve high-resolution displays, this IP supports next-gen display protocols, delivering robust signal quality and efficient energy use.
The KL630 AI SoC represents Kneron's sophisticated approach to AI processing, boasting an architecture that accommodates Int4 precision and transformers, making it incredibly adept in delivering performance efficiency alongside energy conservation. This chip shines in contexts demanding high computational intensity such as city surveillance and autonomous operation. It sports an ARM Cortex A5 CPU and a specialized NPU with 1 eTOPS computational power at Int4 precision. Suitable for running diverse AI applications, the KL630 is optimized for seamless operation in edge AI devices, providing comprehensive support for industry-standard AI frameworks and displaying superior image processing capabilities.
Vantablack S-VIS Space Coating is engineered for use in space-qualified applications, excelling in suppressing stray light in optical systems. This coating is highly regarded for its ability to offer extremely high spectrally flat absorption, extending from the ultraviolet through to the near-millimeter wavelengths. Such attributes make it a superior choice for space missions, where light pollution from celestial bodies is a paramount challenge. Designed to withstand the harsh conditions of space, Vantablack S-VIS improves the effectiveness of baffles and calibration systems by reducing both the size and weight of the instrument package. This not only enhances the optical performance but also contributes to cost savings in manufacturing and deployment. The coating has been tested rigorously to ensure it withstands the environmental extremes experienced in space, including thermal stability and resistance to outgassing. For over a decade, Vantablack S-VIS has demonstrated flawless performance in low Earth orbit, particularly on dual star-trackers on disaster monitoring satellites. Its reliability has been proven through numerous successful implementations, including its deployment on the International Space Station. These achievements underscore Surrey NanoSystems' leadership in advanced coating technologies for aerospace applications.
HDMI Receiver IP by Silicon Library allows for the efficient and reliable reception of high-definition audio and video signals from a variety of HDMI sources. This IP component guarantees the integrity of transmitted data by employing advanced error correction methodologies, thus ensuring high quality and undistorted playback. The design focuses on supporting multiple HDMI standard versions, accommodating a wide spectrum of device connectivity requirements while maintaining backward compatibility. Its architecture emphasizes minimal delay in signal processing, allowing real-time multimedia to be displayed without lag, which is critical for both consumer electronics and professional audio-visual installations. This IP is engineered to handle the challenges of signal timing paths and electromagnetic interference, ensuring robust performance even in challenging environments. Applications extend from home entertainment setups to advanced multimedia presentation systems, offering flexibility and reliability based on users' specific demands and technological configurations.
The xcore.ai platform from XMOS is engineered to revolutionize the scope of intelligent IoT by offering a powerful yet cost-efficient solution that combines high-performance AI processing with flexible I/O and DSP capabilities. At its heart, xcore.ai boasts a multi-threaded architecture with 16 logical cores divided across two processor tiles, each equipped with substantial SRAM and a vector processing unit. This setup ensures seamless execution of integer and floating-point operations while facilitating high-speed communication between multiple xcore.ai systems, allowing for scalable deployments in varied applications. One of the standout features of xcore.ai is its software-defined I/O, enabling deterministic processing and precise timing accuracy, which is crucial for time-sensitive applications. It integrates embedded PHYs for various interfaces such as MIPI, USB, and LPDDR, enhancing its adaptability in meeting custom application needs. The device's clock frequency can be adjusted to optimize power consumption, affirming its cost-effectiveness for IoT solutions demanding high efficiency. The platform's DSP and AI performances are equally impressive. The 32-bit floating-point pipeline can deliver up to 1600 MFLOPS with additional block floating point capabilities, accommodating complex arithmetic computations and FFT operations essential for audio and vision processing. Its AI performance reaches peaks of 51.2 GMACC/s for 8-bit operations, maintaining substantial throughput even under intensive AI workloads, making xcore.ai an ideal candidate for AI-enhanced IoT device creation.
The Avispado core is a 64-bit in-order RISC-V processor that provides an excellent balance of performance and power efficiency. With a focus on energy-conscious designs, Avispado facilitates the development of machine learning applications and is prime for environments with limited silicon resources. It leverages Semidynamics' innovative Gazzillion Missesâ„¢ technology to address challenges with sparse tensor weights, enhancing energy efficiency and operational performance for AI tasks. Structured to support multiprocessor configurations, Avispado is integral in systems requiring cache coherence and high memory throughput. It is particularly suitable for setups aimed at recommendation systems due to its ability to manage numerous outstanding memory requests, thanks to its advanced memory interface architectures. Integration with Semidynamics' Vector Unit enriches its offering, allowing dense computations and providing optimal performance in handling vector tasks. The ability to engage with Linux-ready environments and support for RISC-V Vector Specification 1.0 ensures that Avispado integrates seamlessly into existing frameworks, fostering innovative applications in fields like data centers and beyond.
The eSi-Comms IP suite provides a highly adaptable OFDM-based MODEM and DFE portfolio, crucial for facilitating communications-oriented ASIC designs. This IP offers adept handling of many air interface standards in use today, making it ideal for 4G, 5G, Wi-Fi, and other wireless applications. The suite includes advanced DSP algorithms for ensuring robust links under various conditions, using a core design that is highly configurable to the specific needs of high-performance communication systems. Notably, it supports synchronization, equalization, and channel decoding, boasting features like BPSK to 1024-QAM demodulation and multi-antenna processing.
MajEQ Pro is an advanced equalization tool designed explicitly for professional audio applications, capable of achieving precise frequency response alignment. This tool allows for both static and dynamic EQ adjustments, providing users with unparalleled control over their sound systems, whether for live events or in-studio recordings. With MajEQ Pro, operators can seamlessly switch between modes, adjusting to static venue acoustics or responding dynamically to changing auditory environments in real-time. The tool supports high-frequency accuracy, essential for maintaining sound quality in diverse acoustic conditions, such as outdoor venues where frequency responses fluctuate. The implementation of MajEQ Pro in professional settings elevates the capabilities of audio systems, delivering superior sound quality and flexibility. For audio engineers and businesses involved in audio production, this tool aligns with the demands for high precision and reliability, ensuring that auditory outputs are always of the highest standard.
The ARINC 818 Streaming IP Core is engineered to deliver real-time streaming conversion between a pixel data bus and an ARINC 818 formatted Fibre Channel (FC) serial data stream, or vice versa. This core is pivotal in applications where precision and timing are critical, providing efficient data handling for high-resolution display systems commonly used in avionics. Tailored for flexibility, this IP core supports bidirectional conversion, which provides seamless integration into existing infrastructure, enhancing both legacy systems and new installations. By handling ARINC 818 formatted FC data, it ensures consistent and accurate data synchronization, making it ideal for mission-critical aerospace applications. This IP core excels in environments requiring advanced data processing and synchronization. Its design minimizes latency while maximizing throughput, ensuring high-quality transmission and reception of visual data. The ARINC 818 Streaming IP Core is a vital asset in enhancing the performance and reliability of communication and display systems in complex aerospace technologies.
ISPido on VIP Board is a customized runtime solution tailored for Lattice Semiconductors’ Video Interface Platform (VIP) board. This setup enables real-time image processing and provides flexibility for both automated configuration and manual control through a menu interface. Users can adjust settings via histogram readings, select gamma tables, and apply convolutional filters to achieve optimal image quality. Equipped with key components like the CrossLink VIP input bridge board and ECP5 VIP Processor with ECP5-85 FPGA, this solution supports dual image sensors to produce a 1920x1080p HDMI output. The platform enables dynamic runtime calibration, providing users with interface options for active parameter adjustments, ensuring that image settings are fine-tuned for various applications. This system is particularly advantageous for developers and engineers looking to integrate sophisticated image processing capabilities into their devices. Its runtime flexibility and comprehensive set of features make it a valuable tool for prototyping and deploying scalable imaging solutions.
The Tentiva Video FMC is a versatile board crafted for sophisticated video processing tasks. Its modular setup, featuring two PHY slots, facilitates easy customization and expansion. These slots are equipped to support high-speed data communication, providing up to 20 Gbps, making it suitable for a range of digital video projects. The Tentiva board's compatibility with various PHY cards, including the DisplayPort 2.1 TX and RX cards, allows it to flexibly manage video transmission and reception tasks. These cards are specifically designed to work with DisplayPort-compatible devices, such as monitors and GPUs, ensuring seamless and reliable performance in handling DisplayPort video signals. Furthermore, the Tentiva is meticulously crafted to integrate with FPGA development boards that incorporate FMC headers. This capability offers extensive adaptability and expands its utilities in numerous development environments, thereby making it an essential tool for professionals in digital video processing.
Allegro DVT’s HEVC/H.265 Encoder is designed for those requiring efficient video encoding solutions that deliver high-quality video streams. This encoder supports high dynamic range content and scales to support up to 8K resolution, making it particularly suitable for cutting-edge applications seeking superior video quality and compression efficiency. The encoder integrates seamlessly into various systems, thanks to its flexible architecture which allows for customization based on user requirements. It captures extensive detail in the video while maintaining exceptional compression ratios, thereby reducing bandwidth usage without sacrificing image integrity. Emphasizing both performance and power efficiency, the encoder is tailored for use in environments where these factors are paramount, such as broadcasting, surveillance, and media streaming solutions. With its support for an array of advanced video processing functions, the HEVC/H.265 Encoder is a preferred choice for industries pushing the boundaries of video technology.
MIPI DSI-2 Transmitter IP is crafted for high-performance display interfaces, enabling vivid and seamless visuals with efficient power usage. Its compatibility with the MIPI DSI-2 standard offers flexibility for integration with various display technologies and applications. This transmitter supports high-speed data transfer, catering to ultra-high resolution displays and media-rich environments. Designed for compatibility across major manufacturing nodes, it provides developers with a robust and adaptable platform for a broad spectrum of display solutions. The IP's efficient architecture ensures reduced latency and power demands, aligning with market needs for mobile devices and other portable gadgets.
The ARINC 818 Direct Memory Access (DMA) IP Core is specifically designed to optimize data transaction processes within ARINC 818 protocols, particularly emphasizing receipt and transmission efficiency. This core is an essential component for embedded applications where offloading of formatting, timing, and buffer management is crucial for operational success. Ideal for avionics applications, the core simplifies integration by efficiently managing data transfer operations between system nodes through coordinated DMA mechanisms. It provides a streamlined hardware solution, reducing the overhead typically associated with direct memory operations and improving the overall system performance. Built with scalability in mind, the ARINC 818 DMA IP Core supports various data rates and configurations, enhancing its adaptability to different system architectures. By minimizing CPU intervention in data handling, it increases processing efficiency, further ensuring high-speed data handling with minimal delay or disruption.
The Hyperspectral Imaging System is designed to provide comprehensive imaging capabilities that capture data across a wide spectrum of wavelengths. This system goes beyond traditional imaging techniques by combining multiple spectral images, each representing a different wavelength range. By doing this, it enables the identification and analysis of various materials and substances based on their spectral signatures. Ideal for applications in agriculture, healthcare, and industry, it allows for the precise characterisation of elements and compounds, contributing to advancements in fields such as remote sensing and environmental monitoring.
Functioning as a comprehensive cross-correlator, the XCM_64X64 facilitates efficient and precise signal processing required in synthetic radar receivers and advanced spectrometers. Designed on IBM's 45nm SOI CMOS technology, it supports ultra-low power operation at about 1.5W for the entire array, with a sampling performance of 1GSps across a bandwidth of 10MHz to 500MHz. The ASIC is engineered to manage high-throughput data channels, a vital component for high-energy physics and space observation instruments.
ZIA Stereo Vision by Digital Media Professionals Inc. revolutionizes three-dimensional image processing by delivering exceptional accuracy and performance. This stereo vision technology is particularly designed for use in autonomous systems and advanced robotics, where precise spatial understanding is crucial. It incorporates deep learning algorithms to provide robust 3D mapping and object recognition capabilities. The IP facilitates extensive depth perception and analyzed spatial data for applications in areas like automated surveillance and navigation. Its ability to create detailed 3D maps of environments assists machines in interpreting and interacting with their surroundings effectively. By applying sophisticated AI algorithms, it enhances the ability of devices to make intelligent decisions based on rich visual data inputs. Integration into existing systems is simplified due to its compatibility with a variety of platforms and configurations. By enabling seamless deployment in sectors demanding high reliability and accuracy, ZIA Stereo Vision stands as a core component in the ongoing evolution towards more autonomous and smart digital environments.
The HDMI Transmission technology from Silicon Library is crafted to support high-definition multimedia interface standards, ensuring high-quality video and audio output from multiple types of consumer electronics such as televisions, projectors, and displays. This transmitter module facilitates high-speed data transfer, capable of handling vast bandwidths necessary for crystal-clear signal transmissions. HDMI Tx excels in maintaining signal integrity over various transmission lengths, upholding quality across different configurations. It's designed for compatibility with multiple iterations of HDMI standards, making it versatile for integration into both existing and up-and-coming technologies. The IP facilitates seamless connection abilities, simplifying the user experience and enhancing multimedia interaction at home and in professional environments. Moreover, the transmitter supports high-definition resolutions, ensuring crystal-clear images and sound for viewers. It proves invaluable not only for entertainment devices but also for professional applications such as monitors and video conferencing equipment, where image fidelity and signal reliability are paramount.
ISPido represents a fully configurable RTL Image Signal Processing Pipeline, adhering to the AMBA AXI4 standards and tailored through the AXI4-LITE protocol for seamless integration with systems such as RISC-V. This advanced pipeline supports a variety of image processing functions like defective pixel correction, color filter interpolation using the Malvar-Cutler algorithm, and auto-white balance, among others. Designed to handle resolutions up to 7680x7680, ISPido provides compatibility for both 4K and 8K video systems, with support for 8, 10, or 12-bit depth inputs. Each module within this pipeline can be fine-tuned to fit specific requirements, making it a versatile choice for adapting to various imaging needs. The architecture's compatibility with flexible standards ensures robust performance and adaptability in diverse applications, from consumer electronics to professional-grade imaging solutions. Through its compact design, ISPido optimizes area and energy efficiency, providing high-quality image processing while keeping hardware demands low. This makes it suitable for battery-operated devices where power efficiency is crucial, without sacrificing the processing power needed for high-resolution outputs.
The MIPI interfaces from Silicon Library offer a solution optimized for low-power and high-speed data transmission between microcontrollers, application processors, and peripheral devices. Known for a compact form factor and efficient energy consumption, these interfaces integrate seamlessly into mobile phones, tablets, and other portable devices, offering reliable data exchanges with minimal power usage. Silicon Library's MIPI IP is engineered to meet the demands of the latest high-performance processors, supporting cutting-edge data protocols to ensure swift communication between components. It maintains signal integrity across varied operational conditions, making it a versatile choice for consumer electronics manufacturers. This IP product fits well into applications requiring scalable connectivity solutions, extending its utility across a range of devices from everyday consumer gadgets to specialized industrial tools. Its ability to maintain high data rates over short distances complements the requirements of high-resolution imaging, bridging camera sensors with processing units effectively.
The Alcora V-by-One HS Daughter Card is tailored for high-speed digital interfacing, specifically aligning with FPGA development boards via FMC connectors. The card features 8 RX and 8 TX lanes, with the option to combine two FMC cards for a total of 16 lanes. This configuration supports video resolutions up to 4K at 120Hz or 8K at 30Hz, demonstrating its capability to handle large volumes of data efficiently. Designed to meet the demanding requirements of high-resolution and high-frame-rate applications, the Alcora card integrates dual clock generators to optimize signal clarity by synthesizing the transceiver reference clock and minimizing jitter. This characteristic is crucial in maintaining data integrity and ensuring smooth video performance, making the Alcora an optimal choice for flat panel display integration. Featuring flexible connectivity options, the Alcora card is available in both 51-pin and 41-pin header variants. This design ensures that it can provide a comprehensive interface to meet various technical challenges, advancing the capabilities of high-speed digital communications within FPGA systems.
Dillon Engineering's 2D FFT Core is specifically developed for applications involving two-dimensional data processing, perfect for implementations in image processing and radar signal analysis. This FFT Core operates by processing data in a layered approach, enabling it to concurrently handle two-dimensional data arrays. It effectively leverages internal and external memory, maximizing throughput while minimizing the impact on bandwidth, which is crucial in handling large-scale data sets common in imaging technologies. Its ability to process data in two dimensions simultaneously offers a substantial advantage in applications that require comprehensive analysis of mass data points, including medical imaging and geospatial data processing. With a focus on flexibility, the 2D FFT Core, designed using the ParaCore Architect, offers configurable data processing abilities that can be tailored to unique project specifications. This ensures that the core can be adapted to meet a range of application needs while maintaining high-performance standards that Dillon Engineering is renowned for.
The BlueLynx Chiplet Interconnect is a sophisticated die-to-die interconnect solution that offers industry-leading performance and flexibility for both advanced and conventional packaging applications. As an adaptable subsystem, BlueLynx supports the integration of Universal Chiplet Interconnect Express (UCIe) as well as Bunch of Wires (BoW) standards, facilitating high bandwidth capabilities essential for contemporary chip designs.\n\nBlueLynx IP emphasizes seamless connectivity to on-die buses and network-on-chip (NoCs) using standards such as AMBA, AXI, and ACE among others, thereby accelerating the design process from system-on-chip (SoC) architectures to chiplet-based designs. This innovative approach not only allows for faster deployment but also mitigates development risks through a predictable and silicon-friendly design process with comprehensive support for rapid first-pass silicon success.\n\nWith BlueLynx, designers can take advantage of a highly optimized performance per watt, offering customizable configurations tailored to specific application needs across various markets like AI, high-performance computing, and mobile technologies. The IP is crafted to deliver outstanding bandwidth density and energy efficiency, bridging the requirements of advanced nodal technologies with compatibility across several foundries, ensuring extensive applicability and cost-effectiveness for diverse semiconductor solutions.
The ARINC 818 Product Suite offered by Great River Technology is designed to support the entire lifecycle of ARINC 818 enabled systems. This suite offers tools for the development, qualification, and testing of ARINC 818 products. With robust simulation capabilities and expert guidance, clients benefit from a streamlined process to bring complex ARINC 818-based systems to functional reality. Whether for airborne, ground, or naval applications, the suite provides comprehensive support in implementing ARINC 818 protocols. Great River Technology's ARINC 818 tools are the cornerstone for organizations needing to integrate advanced video and data systems operationally. The product suite includes a development suite and flyable products, offering resources for learning, implementing, and testing ARINC 818 standards. Their unique ability to productize every aspect of the ARINC 818 standard demonstrates unparalleled commitment to customer success in avionic technology. Clients can access specialized interface solutions that facilitate easy integration into varied technological environments. As a leading supplier of ARINC 818 tools globally, Great River Technology supports the development and qualification of systems to assure performance in demanding operational circumstances.
ActLight has tailored its Dynamic PhotoDetector (DPD) technology for smartphone applications to meet the growing demand for high-performance sensors. This sensor promises to elevate the smartphone experience with cutting-edge proximity and ambient light sensing capabilities. Utilizing a 3D Time-of-Flight (ToF) approach, it enables precise detection and response to varying lighting conditions, significantly enhancing the functionality of smart devices. The DPD technology operates on a low-voltage platform, which reduces both power consumption and thermal output, making it an ideal solution for managing battery-intensive tasks. Its ability to detect even the smallest light changes allows for finely tuned screen adaptations, improving the user interface and device efficiency. By providing advanced light sensitivity and low-energy operation, ActLight's DPD enhances mobile devices' overall utility and performance. This allows for sharper imaging, more immersive applications, and more precise environmental sensing, crafting a superior and user-friendly smartphone experience. Its integration into smartphones paves the way for more efficient and innovative mobile technologies.
The JPEG Encoder offered by section5 is a highly efficient image compression solution suitable for standard Field Programmable Gate Arrays (FPGAs). This encoder facilitates machine vision systems by providing robust JPEG and motion JPEG encoding capabilities. It is designed to work with pixel depths up to 12 bits and supports dual-channel operations for high-quality image processing, such as 1280x720 at 60 frames per second.\n\nGiven its adaptability, this JPEG Encoder is applicable for high-speed, low-latency video streaming applications, making it ideal for real-time image capture. It achieves this through its sophisticated low-latency design, capable of synchronous operation without external RAM, merely relying on the FPGA and Ethernet Phy components.\n\nThe encoder further extends its functionality through integrated streaming solutions compatible with both Windows and Linux platforms. This is facilitated using embedded GStreamer applications that ensure stable, lossless transmission even over high bandwidths. For developers, the JPEG IP offers comprehensive simulation models and support for custom application integration, assuring seamless deployment in various hardware environments.
Emphasizing energy efficiency and processing power, the KL530 AI SoC is equipped with a newly developed NPU architecture, making it one of the first chips to adopt Int4 precision commercially. It offers remarkable computing capacity with lower energy consumption compared to its predecessors, making it ideal for IoT and AIoT scenarios. Embedded with an ARM Cortex M4 CPU, this chip enhances comprehensive image processing performance and multimedia codec efficiency. Its ISP capabilities leverage AI-based enhancements for superior image quality while maintaining low power usage during operation, thereby extending its competitiveness in fields such as robotics and smart appliances.
The MIPITM V-NLM-01 is a specialized non-local mean image noise reduction product designed to enhance image quality through sophisticated noise reduction techniques. This hardware core features a parameterized search-window size and adjustable bits per pixel, ensuring a high degree of customization and efficiency. Supporting HDMI with resolutions up to 2048×1080 at 30 to 60 fps, it is ideally suited for applications requiring image enhancement and processing.
NeuroVoice is a powerful ultra-low-power neuromorphic front-end chip engineered for voice processing in environments plagued by irregular noises and privacy concerns. This chip, built on the NASP framework, improves real-time voice recognition, reducing reliance on cloud processing and providing heightened privacy. It is ideal for applications in hearables, smart home devices, and other AI-driven voice control systems, capable of efficiently processing human voice amidst noise. The NeuroVoice chip addresses key challenges faced by existing digital solutions, such as excessive power consumption and low latency in real-time scenarios. Its brain-inspired architecture processes voice commands independently of the cloud, which minimizes Internet dependency and enhances privacy. Furthermore, the chip's ability to manage voice detection and extraction makes it suitable for diverse environments ranging from urban noise to quiet domestic settings. Advanced features of the NeuroVoice chip include its ultra-fast inference capability, processing all data locally and ensuring user privacy without compromising performance. By supporting applications like smart earbuds and IoT devices, NeuroVoice optimizes energy efficiency while maintaining superior voice processing quality. This innovative technology not only empowers users with clearer communication abilities but also encourages adoption across multiple consumer electronics.
The XCM_64X64_A is a powerful array designed for cross-correlation operations, integrating 128 ADCs each capable of 1GSps. Targeted at high-precision synthetic radar and radiometer systems, this ASIC delivers ultra-low power consumption around 0.5W, ensuring efficient performance over a wide bandwidth range from 10MHz to 500MHz. Built on IBM's 45nm SOI CMOS technology, it forms a critical component in systems requiring rapid data sampling and intricate signal processing, all executed with high accuracy, making it ideal for airborne and space-based applications.
The KL720 AI SoC stands out for its excellent performance-to-power ratio, designed specifically for real-world applications where such efficiency is critical. Delivering nearly 0.9 TOPS per Watt, this chip underlines significant advancement in Kneron's edge AI capabilities. The KL720 is adept for high-performance devices like cutting-edge IP cameras, smart TVs, and AI-driven consumer electronics. Its architecture, based on the ARM Cortex M4 CPU, facilitates high-quality image and video processing, from 4K imaging to natural language processing, thereby advancing capabilities in devices needing rigorous computational work without draining power excessively.
The M3000 Graphics Processor offers a comprehensive solution for 3D rendering, providing high efficiency and quality output in graphical processing tasks. It paves the way for enhancing visual performance in devices ranging from gaming consoles to sophisticated simulation systems. This processor supports an array of graphic formats and resolutions, rendering high-quality 3D visuals efficiently. Its robust architecture is designed to handle complex visual computations, making it ideal for industries that require superior graphical interfaces and detailed rendering capabilities. As part of its user-friendly design, the M3000 is compatible with established graphic APIs, allowing for easy integration and broad utility within existing technology structures. The processor serves as a benchmark for innovations in 3D graphical outputs, ensuring optimal end-user experiences in digital simulation and entertainment environments.
The C100 from Chipchain is a highly integrated, low-power consumption single-chip solution tailored for IoT applications. Featuring an advanced 32-bit RISC-V CPU capable of operating at speeds up to 1.5GHz, it houses embedded RAM and ROM for efficient processing and computational tasks. This chip's core strength lies in its multifunctional nature, integrating Wi-Fi, various transmission interfaces, an ADC, LDO, and temperature sensors, facilitating a streamlined and rapid application development process. The C100 chip is engineered to support a diverse set of applications, focusing heavily on expanding IoT capabilities with enhanced control and connectivity features. Beyond its technical prowess, the C100 stands out with its high-performance wireless microcontrollers, designed specifically for the burgeoning IoT market. By leveraging various embedded technologies, the C100 enables simplified, fast, and adaptive application deployment across a wide array of sectors including security, healthcare, smart home devices, and digital entertainment. The chip’s integrated features ensure it can meet the rigorous demands of modern IoT applications, characterized by high integration and reliability. Moreover, the C100 represents a leap forward in IoT product development with its extensive focus on energy efficiency, compact size, and secure operations. Providing a complete IoT solution, this chip is instrumental in advancing robust IoT ecosystems, driving innovation in smart connectivity. Its comprehensive integration provides IoT developers with a significant advantage, allowing them to develop solutions that are not only high-performing but also ensure sustainability and user safety.
As part of the advanced communication toolkit, the DSER12G addresses the need for robust data/clock recovery and deserialization at rates between 8.5Gb/s to 11.3Gb/s. Prominent in 10GbE, OC-192, and equivalent setups, it boasts ultra-low power design principles grounded in IBM's 65nm technology. Supporting high noise immunity and compact integration, it is a cornerstone in systems requiring efficient data management and communications interfaces across various digital infrastructures.
Cologne Chip’s C3-CODEC-G712-4 is a highly efficient audio CODEC IP core designed to support telephony applications, adhering to ITU-T standards G.712 and G.711. What sets this CODEC apart is its fully digital implementation, making traditional analog integrations redundant, thus lowering additional component costs. This is achieved through advanced DIGICC technology, which provides state-of-the-art digital filtering capabilities. With its four integrated voice CODECs, the C3-CODEC-G712-4 supports multiple digital formats, including 16-bit linear and 8-bit a-law/µ-law configurations. This versatility ensures compliance with diverse audio transmission standards, allowing it to be deployed in a broad array of telecommunication infrastructures. The minimal external component requirements—the core requires just a handful of resistors and capacitors—enhance its applicability in compact designs. This core's digital architecture not only ensures high performance but also offers programmable gain settings for transmit and receive paths. With robust clock frequency support, the C3-CODEC-G712-4 is an asset in optimizing power consumption and maintaining high-quality audio performance, making it an outstanding choice for modern communication systems.
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