All IPs > Processor > Security Processor
Security processors are a pivotal segment of semiconductor IPs, designed to provide robust protection for data and secure transactions within electronic systems. These processors are tailored specifically to handle encryption, decryption, digital signature generation and verification, and other cryptographic functions, ensuring the integrity and confidentiality of data across a variety of platforms. In an age where cybersecurity threats are ever-evolving, the importance of reliable security processors in modern electronic devices cannot be overstated.
This category of semiconductor IP is integral to any device that requires secure communication or data protection. Whether it's in consumer electronics such as smartphones, tablets, and laptops, or in enterprise settings with servers and data centers, security processors are essential for safeguarding sensitive information. Additionally, with the proliferation of the Internet of Things (IoT), security processors are increasingly found in everyday devices, from home automation systems to industrial IoT gadgets, ensuring that they remain robust against unauthorized access and cyberattacks.
In this category, you will find a range of products designed to meet diverse security needs, from standard encryption and secure boot capabilities to more advanced features like trusted execution environments and secure key management. These semiconductor IPs are meticulously engineered to integrate seamlessly within broader processing architectures, offering flexibility and efficiency without compromising on security. Developers and manufacturers can select from a variety of configurations and performance specifications, ensuring that the security processor IPs can be optimally aligned with their specific application requirements.
As the digital landscape continues to expand, incorporating security processors becomes a crucial aspect of electronics design. They offer not only protection but also contribute to building trust among users and stakeholders by ensuring that devices and systems can function securely and efficiently. Selecting the right security processor semiconductor IP is essential for ensuring that modern electronics can withstand the challenges of the digital age, safeguarding everything from personal data to critical enterprise resources.
The Hanguang 800 AI Accelerator by T-Head Semiconductor is a powerful AI acceleration chip designed to enhance machine learning tasks. It excels in providing the computational power necessary for intensive AI workloads, effectively reducing processing times for large-scale data frameworks. This makes it an ideal choice for organizations aiming to infuse AI capabilities into their operations with maximum efficiency. Built with an emphasis on speed and performance, the Hanguang 800 is optimized for applications requiring vast amounts of data crunching. It supports a diverse array of AI models and workloads, ensuring flexibility and robust performance across varying use cases. This accelerates the deployment of AI applications in sectors such as autonomous driving, natural language processing, and real-time data analysis. The Hanguang 800's architecture is complemented by proprietary algorithms that enhance processing throughput, competing against traditional processors by providing significant gains in efficiency. This accelerator is indicative of T-Head's commitment to advancing AI technologies and highlights their capability to cater to specialized industry needs through innovative semiconductor developments.
AndesCore Processors offer a robust lineup of high-performance CPUs tailored for diverse market segments. Employing the AndeStar V5 instruction set architecture, these cores uniformly support the RISC-V technology. The processor family is classified into different series, including the Compact, 25-Series, 27-Series, 40-Series, and 60-Series, each featuring unique architectural advances. For instance, the Compact Series specializes in delivering compact, power-efficient processing, while the 60-Series is optimized for high-performance out-of-order execution. Additionally, AndesCore processors extend customization through Andes Custom Extension, which allows users to define specific instructions to accelerate application-specific tasks, offering a significant edge in design flexibility and processing efficiency.
CrossBar's ReRAM Memory is designed to redefine data storage with its high-density and energy-efficient characteristics. The memory solution can achieve terabyte-scale storage on-chip, significantly surpassing traditional flash memory solutions in both speed and power consumption. Offered in a 3D cross-point architecture, it is capable of providing high performance with minimal layout overhead. Engineered for next-generation applications, this ReRAM technology boasts a performance edge with 20ns read times and 12µs write capabilities, eliminating the usual erase latency. It is significantly faster than traditional NAND flash with its lightning-fast read and write speeds, making it suitable for real-time processing required by cutting-edge applications such as AI and IoT. Security is a key feature, offering tamper-resistant provisions for cryptographic key storage ensuring robust protection against data breaches. The memory solution leverages advanced technology to deliver energy savings of up to 5x compared to eFlash, and up to 40x when compared to BLE, positioning it as an ideal choice for mobile and low-power applications.
The Dynamic Neural Accelerator II (DNA-II) from EdgeCortix is an advanced neural network IP core tailored for high efficiency and parallelism at the edge. Incorporating a run-time reconfigurable interconnect system between compute units, DNA-II effectively manages both convolutional and transformer workloads. This architecture ensures scalable performance beginning with 1K MACs, suitable for a wide range of SoC implementations. EdgeCortix's patented architecture significantly optimizes data paths between DNA engines, enhancing parallelism while reducing on-chip memory usage. As a core component of the SAKURA-II platform, DNA-II supports state-of-the-art generative AI models with industry-leading energy efficiency. DNA-II's design acknowledges the typical inefficiencies in IP cores, improving compute utilization and power consumption metrics substantially. By adopting innovative reconfigurable datapath technologies, EdgeCortix sets a new benchmark for low-power, high-performance edge AI applications.
eSi-ADAS is a radar IP suite designed to enhance the performance and responsiveness of automotive and unmanned vehicle systems. It includes a complete Radar co-processor engine, facilitating rapid situational awareness necessary for safety-critical applications. The scalable nature of this IP makes it adaptable for various automotive and drone-based projects.
Specially engineered for the automotive industry, the NA Class IP by Nuclei complies with the stringent ISO26262 functional safety standards. This processor is crafted to handle complex automotive applications, offering flexibility and rigorous safety protocols necessary for mission-critical transportation technologies. Incorporating a range of functional safety features, the NA Class IP is equipped to ensure not only performance but also reliability and safety in high-stakes vehicular environments.
The Prodigy Universal Processor by Tachyum is a groundbreaking innovation in the realm of computing, marked as the world's first processor that merges General Purpose Computing, High-Performance Computing, Artificial Intelligence, and various other AI disciplines into a single compact chip. This processor promises to revolutionize hyperscale data centers with its unprecedented processing capabilities and efficiency, pushing the boundaries of current computational power. With its superior performance per watt, Prodigy minimizes energy consumption while maximizing data processing abilities. Offering up to 21 times higher performance compared to its contemporaries, Prodigy stands out by providing a coherent multiprocessor architecture that simplifies the programming environment. It aims to overcome challenges like high power use and server underutilization, which have long plagued modern data centers. By addressing these core issues, it allows enterprises to manage workloads more effectively and sustainably. Furthermore, Prodigy's emulation platform broadens the scope of testing and evaluation, enabling developers to optimize their applications for better performance and low power consumption. With native support for the Prodigy instruction set architecture, the processor seamlessly integrates existing software packages, promising a smooth transition and robust application support. Through the integration of this versatile processor, Tachyum is leading the charge toward a sustainable technological future.
The Veyron V1 is a high-performance RISC-V CPU designed to meet the rigorous demands of modern data centers and compute-intensive applications. This processor is tailored for cloud environments requiring extensive compute capabilities, offering substantial power efficiency while optimizing processing workloads. It provides comprehensive architectural support for virtualization and efficient task management with its robust feature set. Incorporating advanced RISC-V standards, the Veyron V1 ensures compatibility and scalability across a wide range of industries, from enterprise servers to high-performance embedded systems. Its architecture is engineered to offer seamless integration, providing an excellent foundation for robust, scalable computing designs. Equipped with state-of-the-art processing cores and enhanced vector acceleration, the Veyron V1 delivers unmatched throughput and performance management, making it suitable for use in diverse computing environments.
The NS Class is Nuclei's crucial offering for applications prioritizing security and fintech solutions. This RISC-V CPU IP securely manages IoT environments with its highly customizable and secure architecture. Equipped to support advanced security protocols and functional safety features, the NS Class is particularly suited for payment systems and other fintech applications, ensuring robust protection and reliable operations. Its design follows the RISC-V standards and is accompanied by customizable configuration options tailored to meet specific security requirements.
The NI Class RISC-V CPU IP caters to communication, video processing, and AI applications, providing a balanced architecture for intensive data handling and processing capabilities. With a focus on high efficiency and flexibility, this processor supports advanced data crunching and networking applications, ensuring that systems run smoothly and efficiently even when managing complex algorithms. The NI Class upholds Nuclei's commitment to providing versatile solutions in the evolving tech landscape.
A robust platform offering a full spectrum of ARM Cortex-M microprocessors, perfect for integration across a broad scope of systems. These ASICs are finely tuned to accommodate various applications, demonstrating commendable performance in areas such as IoT, industrial automation, and consumer electronics. Known for their reliability and scalability, these ASICs enhance system capabilities by providing customizable features that match exclusive client criteria.
The patented QDID PUF by Crypto Quantique utilizes quantum tunneling current variations to produce a unique identity in standard CMOS processes. This solution leverages oxide thickness variations and trap distributions in the gate oxide to create an unpredictable and unclonable physically unclonable function (PUF). As a hardware root-of-trust, it simplifies secure provisioning and emits high-entropy seeds resistant to side-channel attacks, supporting up to 256-bit security strength. The QDID PUF's robustness is confirmed through extensive testing, including adherence to NIST standards, making it an ideal choice for secure device identity and post-quantum cryptographic applications.
The Individual IP Core Modules by ResQuant are comprehensive components engineered to support diverse post-quantum cryptographic standards, including Dilithium, Kyber, XMSS, SPHINCS+, AES, and the SHA-2 family. These modules offer organizations the flexibility to select specific cryptographic functionalities tailored to their security needs, without the necessity of entire systems or hardware changes. Each module is designed to integrate easily into existing infrastructure, ensuring minimal disruption while enhancing security measures against potential future quantum threats. This approach allows industries to gradually implement PQC standards, ensuring a seamless transition to quantum-resistant cryptographic measures. Tailored for flexibility, the ResQuant Individual IP Core Modules can be used across a wide array of applications, from IoT devices to complex military and IT systems. By offering component-level integration, these modules empower companies to future-proof their offerings incrementally while maintaining robust security practices in their operations.
The Neural Network Accelerator from Gyrus AI is designed to enhance edge computing capabilities through native graph processing. This innovative solution offers up to 30 TOPs/W, making it highly efficient by achieving 10-30 times lower clock-cycles than conventional processors. Its design supports low memory usage configurations, significantly reducing power consumption and enabling up to 20 times lower energy requirements. Designed for seamless integration, it supports diverse neural network models with superior utilization of over 80%, leading to enhanced performance and reduced die area by 10 to 8 times smaller than traditional designs.
Suite-Q HW is a comprehensive system-on-chip (SoC) design crafted to provide a complete suite of standardized cryptographic operations essential for securing communication protocols. Targeting both high-end servers and low-end embedded systems, this design leverages the same hardware accelerators but differs in processor core choices and connectivity solutions to cater to varied application needs. By offloading symmetric and asymmetric cryptographic operations, Suite-Q HW enhances execution efficiency while integrating features such as the NIST 800-90-compliant True Random Number Generator. Classical and post-quantum public key cryptographic support is provided, encompassing a range of protocols such as ECDSA, Ed25519, and Curve25519, alongside emerging post-quantum methodologies like isogeny-based and lattice-based cryptography. Furthermore, it supports hash-based signature protocols including XMSS and LMS, and integrates the Advanced Encryption Standard for versatile encryption needs. This SoC design is crafted to simplify integration into SoC and FPGA architectures while offering various performance grades to balance silicon footprint and overall performance. Beyond its seamless integration capability, Suite-Q HW demonstrates substantial power reductions compared to software implementations, making it a suitable choice for power-sensitive applications. Comprehensive validation tests, including known answer test vectors and simulation scripts, ensure reliability and integration efficiency.
The Customizable Cryptography Accelerator offered by ResQuant is designed to meet varied client needs with an extensive array of configurable options. It integrates seamlessly with all NIST PQC standards like Dilithium, Kyber, XMSS, and SPHINCS+, and is extendible with additional algorithms, including customer-specific implementations. The accelerator is built to be DPA, timing, and SCA resistant, and is AXI 4 ready, ensuring robust protection in a variety of applications. This innovation allows for customizable tuning in performance and size, addressing the specific security requirements of customers from various industries. The accelerator demonstrates ResQuant's commitment to flexibility and adaptability, enabling clients to implement cutting-edge encryption with ease. With ongoing enhancements to extend its capabilities, the accelerator stands as a critical component in defenses against future computational threats posed by quantum technologies. In addition to its technical capabilities, the ResQuant Customizable Cryptography Accelerator is engineered for efficient power use and minimized physical footprint, making it suitable for integration into a wide range of hardware setups. This solution underscores ResQuant's dedication to delivering high-security standards and unmatched versatility in cryptographic processing solutions.
The Securyzr Key Management System is a robust infrastructure for managing cryptographic keys efficiently across various applications and devices. This system provides essential functions such as key generation, storage, distribution, and lifecycle management, all while maintaining high security standards. It supports integration into existing systems, enabling seamless and secure management of cryptographic assets, which is vital for maintaining overall cybersecurity and integrity in device communication.
PUFhsm provides a sophisticated hardware security module solution tailored for automotive chips and advanced applications. Acting as an Embedded Security Enclave, it isolates vital security operations from the main system. The module integrates a processor, cryptographic engines, and software to manage secure boot, deployment, key management, and secure monitoring. With EVITA-Full compliance, PUFhsm promises robust protection against complex threats and optimizes system efficiency for rapid market deployment.
**DRV64IMZicsr – 64-bit RISC-V Performance. Designed for Demanding Innovation.** The DRV64IMZicsr is a powerful and versatile 64-bit RISC-V CPU core, built to meet the performance and safety needs of next-generation embedded systems. Featuring the M (Multiply/Divide), Zicsr (Control and Status Registers), and External Debug extensions, this core is engineered to scale—from edge computing to mission-critical applications. As part of the DRVX Core Family, the DRV64IMZicsr embodies DCD’s philosophy of combining open-standard freedom with customizable IP excellence—making it a smart and future-proof alternative to legacy architectures. ✅ Why Choose RISC-V? * No license fees – open-source instruction set means reduced TCO * Unmatched flexibility – tailor the architecture to your specific needs * A global, thriving ecosystem – support from toolchains, OSes, and hardware vendors * Security & longevity – open and verifiable architecture ensures trust and sustainability 🚀 DRV64IMZicsr – Core Advantages: * 64-bit RISC-V ISA with M, Zicsr, and Debug support * Five-stage pipeline, Harvard architecture, and efficient branch prediction * Configurable memory size and allocation for program and data spaces Performance optimized: * **Up to 2.38 CoreMark/MHz** * **Up to 1.17 DMIPS/MHz** * Compact footprint starting from just 17.6k gates * Interface options: AXI, AHB, or native * Compatible with Classical CAN, CAN FD, and CAN XL through additional IPs 🛡️ Safety, Compatibility & Flexibility Built In: * Developed as an ISO 26262 Safety Element out of Context (SEooC) * Technology-agnostic – works seamlessly across all FPGA and ASIC vendors * Expandable with DCD’s IP portfolio: DMA, SPI, UART, I²C, CAN, PWM, and more 🔍 Robust Feature Set for Real Applications: * Full 64-bit processing – ideal for performance-intensive, memory-heavy tasks * M extension enables high-speed multiplication/division via dedicated hardware unit * Zicsr extension gives full access to Control and Status Registers, enabling: * Interrupts and exception handling (per RISC-V Privileged Spec) * Performance counters and timers * JTAG-compatible debug interface – compliant with RISC-V Debug Spec (0.13.2 & 1.0.0) 🧪 Ready for Development & Integration: * Comes with a fully automated testbench * Includes a comprehensive suite of validation tests for smooth SoC integration * Supported by industry-standard tools, ensuring a hassle-free dev experience Whether you’re designing for automotive safety, industrial control, IoT gateways, or AI-enabled edge devices, the DRV64IMZicsr gives you the performance, flexibility, and future-readiness of RISC-V—without compromise. 💡 Build smarter, safer systems—on your terms. 📩 Contact us today at info@dcd.pl to start your next RISC-V-powered project.
PUFcc stands as an advanced cryptography engine, combining the latest digital and analog crypto algorithms to provide a complete security coprocessor solution. It includes hardware for key generation, storage, and a comprehensive crypto engine, all built upon the hardware Root of Trust established by the PUFrt solution. PUFcc supports a vast array of cryptographic operations, providing secure boot, OTA, TLS, and key management capabilities across various IoT contexts.
DRV32IMZicsr – Scalable RISC-V Power. Tailored for Your Project. Ready for the Future. The DRV32IMZicsr is a high-performance, 32-bit RISC-V processor core, equipped with M (Multiply/Divide), Zicsr (Control and Status Registers), and External Debug support. Built as part of DCD’s latest DRVX Core Family, it delivers the full flexibility, openness, and innovation that RISC-V promises—without locking you into proprietary architectures. ✅ Why RISC-V? RISC-V is a rapidly growing open standard for modern computing—backed by a global ecosystem of developers and vendors. It brings: * Freedom from licensing fees and vendor lock-in * Scalability from embedded to high-performance systems * Customizability with standard and custom instruction sets * Strong toolchain & ecosystem support 🚀 DRV32IMZicsr Highlights: * Five-stage pipeline and Harvard architecture for optimized performance * Configurable memory architecture: size and address allocation tailored to your needs Performance metrics: * **Up to 1.15 DMIPS/MHz** * **Up to 2.36 CoreMark/MHz** * Minimal footprint starting from just 14k gates * Flexible interfaces: Choose from AXI, AHB, or native bus options 🛡️ Designed for Safety & Integration: * Developed as an ISO 26262 Safety Element out of Context (SEooC) * Fully technology-agnostic, compatible with all FPGA and ASIC platforms * Seamless integration with DCD’s rich portfolio of IPs: DMA, SPI, UART, PWM, CAN, and more 🔍 Advanced Feature Set: * 32 general-purpose registers * Support for arithmetic, logic, load/store, conditional and unconditional control flow * M extension enables efficient integer multiplication/division * Zicsr extension provides robust interrupt and exception handling, performance counters, and timers * External Debug via JTAG: compliant with RISC-V Debug Specification 0.13.2 and 1.0.0, compatible with all mainstream tools 🧪 Developer-Ready: * Delivered with a fully automated testbench * Includes a comprehensive validation test suite for smooth integration into your SoC flow Whether you're building for automotive, IoT, consumer electronics, or embedded systems, the DRV32IMZicsr offers a future-ready RISC-V solution—highly configurable, performance-optimized, and backed by DCD’s 25 years of experience. Interested? Let’s build the next generation together. 📩 Contact us at info@dcd.pl
The EMSA5-FS is a 32-bit embedded RISC-V processor from CAST designed with functional safety in mind, aimed specifically at mission-critical applications. This processor supports ISO 26262 ASIL-D compliance, a stringent safety standard required in automotive, industrial, and medical sectors. Key features include dual/triple modular redundancy, lockstep operations, and error-correcting code (ECC) protection, making it a robust choice for systems demanding high reliability and safety assurance. The EMSA5-FS processor not only satisfies functional safety requirements but also delivers competitive performance with low power draw, addressing the needs of applications where both efficiency and system integrity are critical.
The Akeana 1000 Series is a line of performance-oriented processors designed to meet the demanding needs of data computation across a wide range of applications. These 64-bit processors support configurations that include multi-threading capabilities and are designed to provide a seamless blend of in-order and out-of-order microarchitecture. Suitable for smart home, industrial automation, and automotive ADAS, the 1000 series processors are known for their versatility and extendable computation capabilities. Additionally, features like support for extensive virtual address ranges and scalable coherent core clusters enhance their ability to handle complex processing tasks efficiently. This series also offers robust customization opportunities, allowing developers to tailor the processors to specific computing needs through configurable options, including cache size and instruction dispatch widths, ensuring that they fulfill precise application demands.
The NV-1 is a groundbreaking low-power AI processor designed for superior parallel processing capabilities, executing multiple independent processing streams with minimal energy usage. It leverages a unique, non-von-Neumann architecture, integrating many processor-memory units, effectively eliminating memory access bottlenecks. This innovative processor is optimally utilized in edge AI applications, delivering rapid, power-efficient performance for on-device computation without reliance on cloud resources.
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