All IPs > Processor > Security Processor
Security processors are a pivotal segment of semiconductor IPs, designed to provide robust protection for data and secure transactions within electronic systems. These processors are tailored specifically to handle encryption, decryption, digital signature generation and verification, and other cryptographic functions, ensuring the integrity and confidentiality of data across a variety of platforms. In an age where cybersecurity threats are ever-evolving, the importance of reliable security processors in modern electronic devices cannot be overstated.
This category of semiconductor IP is integral to any device that requires secure communication or data protection. Whether it's in consumer electronics such as smartphones, tablets, and laptops, or in enterprise settings with servers and data centers, security processors are essential for safeguarding sensitive information. Additionally, with the proliferation of the Internet of Things (IoT), security processors are increasingly found in everyday devices, from home automation systems to industrial IoT gadgets, ensuring that they remain robust against unauthorized access and cyberattacks.
In this category, you will find a range of products designed to meet diverse security needs, from standard encryption and secure boot capabilities to more advanced features like trusted execution environments and secure key management. These semiconductor IPs are meticulously engineered to integrate seamlessly within broader processing architectures, offering flexibility and efficiency without compromising on security. Developers and manufacturers can select from a variety of configurations and performance specifications, ensuring that the security processor IPs can be optimally aligned with their specific application requirements.
As the digital landscape continues to expand, incorporating security processors becomes a crucial aspect of electronics design. They offer not only protection but also contribute to building trust among users and stakeholders by ensuring that devices and systems can function securely and efficiently. Selecting the right security processor semiconductor IP is essential for ensuring that modern electronics can withstand the challenges of the digital age, safeguarding everything from personal data to critical enterprise resources.
The SiFive Intelligence X280 is designed to address the burgeoning needs of AI and machine learning at the edge. Emphasizing a software-first methodology, this family of processors is crafted to offer scalable vector and matrix compute capabilities. By integrating broad vector processing features and high-bandwidth interfaces, it can adapt to the ever-evolving landscape of AI workloads, providing both high performance and efficient scalability. Built on the RISC-V foundation, the X280 features comprehensive vector compute engines that cater to modern AI demands, making it a powerful tool for edge computing applications where space and energy efficiency are critical. Its versatility allows it to seamlessly manage diverse AI tasks, from low-latency inferences to complex machine learning models, thanks to its support for RISC-V Vector Extensions (RVV). The X280 family is particularly robust for applications requiring rapid AI deployment and adaptation like IoT devices and smart infrastructure. Through extensive compatibility with machine learning frameworks such as TensorFlow Lite, it ensures ease of deployment, enhanced by its focus on energy-efficient inference solutions and support for legacy systems, making it a comprehensive solution for future AI technologies.
The Hanguang 800 AI Accelerator is engineered to propel artificial intelligence tasks to new heights with its cutting-edge architecture. This accelerator enhances machine learning tasks by speeding up neural network processing, making it a key player in the burgeoning AI sector. Its innovative design is optimized for low latency and high throughput, facilitating real-time AI application performance and enabling advanced machine learning model implementations. Harnessing an extensive array of computing cores, the Hanguang 800 ensures parallel processing capabilities that significantly reduce training times for large-scale AI models. Its application scope covers diverse sectors, including autonomous driving, smart city infrastructure, and intelligent robotics, underscoring its versatility and adaptability. Built with energy efficiency in mind, this AI accelerator prioritizes minimal power consumption, making it ideal for data centers looking to maximize computational power without overextending their energy footprint. By integrating seamlessly with existing frameworks, the Hanguang 800 offers a ready-to-deploy solution for enterprises seeking to enhance their AI-driven services and operations.
AndesCore Processors offer a robust lineup of high-performance CPUs tailored for diverse market segments. Employing the AndeStar V5 instruction set architecture, these cores uniformly support the RISC-V technology. The processor family is classified into different series, including the Compact, 25-Series, 27-Series, 40-Series, and 60-Series, each featuring unique architectural advances. For instance, the Compact Series specializes in delivering compact, power-efficient processing, while the 60-Series is optimized for high-performance out-of-order execution. Additionally, AndesCore processors extend customization through Andes Custom Extension, which allows users to define specific instructions to accelerate application-specific tasks, offering a significant edge in design flexibility and processing efficiency.
The Veyron V1 is a high-performance RISC-V CPU aimed at data centers and similar applications that require robust computing power. It integrates with various chiplet and IP cores, making it a versatile choice for companies looking to create customized solutions. The Veyron V1 is designed to offer competitive performance against x86 and ARM counterparts, providing a seamless transition between different node process technologies. This CPU benefits from Ventana's innovation in RISC-V technology, where efforts are placed on providing an extensible architecture that facilitates domain-specific acceleration. With capabilities stretching from hyperscale computing to edge applications, the Veyron V1 supports extensive instruction sets for high-throughput operations. It also boasts leading-edge chiplet interfaces, opening up numerous opportunities for rapid productization and cost-effective deployment. Ventana's emphasis on open standards ensures that the Veyron V1 remains an adaptable choice for businesses aiming at bespoke solutions. Its compatibility with system IP and its provision in multiple platform formats—including chiplets—enable businesses to leverage the latest technological advancements in RISC-V. Additionally, the ecosystem surrounding the Veyron series ensures support for both modern software frameworks and cross-platform integration.
CrossBar's ReRAM Memory technology introduces a revolutionary approach to non-volatile memory that transcends the limitations of traditional memory solutions. ReRAM, or Resistive RAM, distinguishes itself through its simple architectural design, enabling manufacturers to scale it down to sizes smaller than 10nm and integrate it seamlessly with existing logic processes in a single foundry. This advancement allows for unprecedented energy efficiency, with ReRAM consuming just 1/20th of the energy compared to traditional flash memory solutions, while also offering dramatically improved endurance and performance metrics. The scalability of ReRAM supports high-density memory applications, including its potential for 3D stacking, which allows terabytes of storage to be integrated on-chip. ReRAM excels in delivering low latency and high-speed operations, making it especially suitable for applications requiring rapid data access and processing, such as in data centers and IoT devices. Its robust performance characteristics make it an ideal solution for modern computing demands, offering both hard macros and architectural licenses depending on customer needs. Another key benefit of ReRAM is enhanced security, essential in applications ranging from automotive to secure computing. By providing low power consumption combined with high data integrity, ReRAM is positioned as a pivotal technology in future-proofing data storage solutions. It has proven to be a secure alternative to flash memory, with superior operational characteristics that address the diverse needs of contemporary electronic and computing environments.
The Individual IP Core Modules by ResQuant are comprehensive components engineered to support diverse post-quantum cryptographic standards, including Dilithium, Kyber, XMSS, SPHINCS+, AES, and the SHA-2 family. These modules offer organizations the flexibility to select specific cryptographic functionalities tailored to their security needs, without the necessity of entire systems or hardware changes. Each module is designed to integrate easily into existing infrastructure, ensuring minimal disruption while enhancing security measures against potential future quantum threats. This approach allows industries to gradually implement PQC standards, ensuring a seamless transition to quantum-resistant cryptographic measures. Tailored for flexibility, the ResQuant Individual IP Core Modules can be used across a wide array of applications, from IoT devices to complex military and IT systems. By offering component-level integration, these modules empower companies to future-proof their offerings incrementally while maintaining robust security practices in their operations.
The RISC-V CPU IP NS Class by Nuclei is specifically aimed at sectors requiring enhanced security and financial technology solutions. Built upon a versatile architecture, it is pivotal for applications in IoT security and payment systems. This processor IP leverages the RISC-V standard to offer customizable configurations, optimized through its Verilog-based development, to enhance readability and effectiveness in debugging, contributing to superior PPA performance. Nuclei’s NS Class equips developers with flexible tools to adapt the processor to varied system requirements, making use of extensive RISC-V extensions and the opportunity for user-defined instructions. The IP’s security features are robust, featuring TEE support and a physical security package, ensuring complete security for sensitive data. Additionally, it complies with functional safety standards such as ASIL-B and ASIL-D, which are crucial in environments requiring stringent safety compliance. In essence, the NS Class stands out for its ability to secure and optimize financial transactions and data protection in IoT applications. Its flexibility in configuration and comprehensive security measures make it a reliable choice for demanding and sensitive technology applications.
The Securyzr Key Management System offers a robust solution integrated into Secure-IC's security ecosystem to manage cryptographic keys effectively and securely. This system ensures that key generation, distribution, and storage processes are carried out in a highly secure manner, facilitating strong encryption and digital signature functions. Its integration into a wide range of devices guarantees secure communication and data handling across various applications, making it a critical component in safeguarding sensitive data.
DenseMem provides a cutting-edge solution to memory capacity constraints by effectively doubling the connected CXL memory capacity via advanced compression technologies. It is designed to alleviate the common issues of memory bottlenecks in high-performance computing environments, delivering seamless integration and configuration flexibility. By leveraging dense memory mapping strategies, DenseMem transforms traditional computer architectures into high-capacity engines capable of sustaining large data aggregates. Through its deployment, users gain a remarkable edge in terms of simultaneous data access and processing capabilities, thereby addressing critical throughput needs in enterprise settings. Adapting robustly to CXL memory systems, this software solution aligns with modern data handling paradigms, enhancing both speed and efficiency without an undue increase in power consumption. Its efficacy in simplifying complex memory allocations while upholding data integrity and operation security makes DenseMem a foundational technology for future-proofing IT frameworks in various industries.
The Prodigy Universal Processor by Tachyum represents a landmark in processor technology, designed to facilitate a range of functions from general computing applications to AI-specific tasks. It integrates the benefits of CPUs, GPGPUs, and TPUs into a singular, cohesive architecture, showcasing a significant leap in performance efficiency and energy sustainability. The Prodigy chip radically lowers data center power use, thereby cutting carbon emissions and amplifying server efficiency. Additionally, this processor supports a reliable infrastructure that maximizes resource utilization across hyperscale data centers, AI enterprises, and HPC configurations.
The EMSA5-FS processor is a robust RISC-V based solution designed for applications where functional safety is paramount, making it ideal for environments requiring high reliability and assurance. This processor is built to meet the rigorous demands of automotive and industrial markets with a single-issue, in-order 5-stage pipeline design. It supports a variety of RISC-V ISA extensions, providing a flexible architecture that can adapt to specific needs, including embedded safety functionalities like Dual Modular Redundancy (DMR) and Triple Modular Redundancy (TMR), ensuring safe operation under adverse conditions. Furthermore, it provides ISO 26262 ASIL-D readiness, which is critical for adhering to automotive safety standards. Configuration options for this processor include an optional L0 instruction cache, allowing design engineers to tailor system performance and size according to specific application requirements. The EMSA5-FS is designed to exceed 1GHz operating frequencies on advanced nodes, making it a powerful choice for applications that demand both performance and safety.
PUFcc is an all-encompassing Crypto Coprocessor that delivers key generation, storage, and complete crypto operations in one solution. It builds on the PUFrt's hardware root of trust, offering secure boot, OTA updates, TLS, and key management. Its comprehensive design includes NIST-certified cryptographic algorithms, customizable for a wide range of IoT applications. PUFcc simplifies SoC design with standardized control interfaces and secure memory access, enhancing system security effortlessly.
The Customizable Cryptography Accelerator offered by ResQuant is designed to meet varied client needs with an extensive array of configurable options. It integrates seamlessly with all NIST PQC standards like Dilithium, Kyber, XMSS, and SPHINCS+, and is extendible with additional algorithms, including customer-specific implementations. The accelerator is built to be DPA, timing, and SCA resistant, and is AXI 4 ready, ensuring robust protection in a variety of applications. This innovation allows for customizable tuning in performance and size, addressing the specific security requirements of customers from various industries. The accelerator demonstrates ResQuant's commitment to flexibility and adaptability, enabling clients to implement cutting-edge encryption with ease. With ongoing enhancements to extend its capabilities, the accelerator stands as a critical component in defenses against future computational threats posed by quantum technologies. In addition to its technical capabilities, the ResQuant Customizable Cryptography Accelerator is engineered for efficient power use and minimized physical footprint, making it suitable for integration into a wide range of hardware setups. This solution underscores ResQuant's dedication to delivering high-security standards and unmatched versatility in cryptographic processing solutions.
PUFhsm is an advanced embedded hardware security module designed for automotive and complex applications. It acts as an embedded security enclave, isolating key functions from the main system to ensure secure operations. With integrated cryptographic engines and dedicated CPUs, PUFhsm supports secure boot, updates, and key management within a compliant framework. It enhances designs by bolstering security while optimizing efficiency and reducing time-to-market.
The QDID PUF is an innovative hardware experience designed to generate a unique cryptographic identity through quantum tunneling current variations. Utilizing standard CMOS processes, it taps into randomness deriving from oxide thickness variations and defect distribution in gate oxide, creating a robust hardware root-of-trust. This enables the establishment of secure architectures by providing on-the-fly identity generation that does not rely on memory storage, making it resistant to side-channel and machine learning attacks. The QDID PUF is especially noteworthy for its high entropy seed generation, supporting customizable security strengths up to 256 bits, and is designed with built-in resistance against secret leakage through advanced countermeasures. The technology is thoroughly tested under diverse environmental conditions, consistently maintaining reliability and longevity, and has achieved extensive verification across major fabs including TSMC, GF, and UMC across various process nodes in Bulk CMOS, FDSOI, and FinFET technologies. It enables key generation and device authentication, serving as a cornerstone for secure provisioning and post-quantum cryptography, thus supporting various applications in device identification, supply chain security, and more. Successfully verified under NIST standards, QDID PUF ensures excellent performance across voltage, temperature, and ageing tests, offering a robust solution for future-proof IoT device integration.
Suite-Q SW is a versatile cryptographic software library offered by PQ Secure, tailored to optimize code size, stack usage, and performance for diverse device specifications. Available in both high-speed assembly and portable C code, it suits a variety of embedded processors ranging from 8-bit to 64-bit platforms. This software solution ensures that memory-constrained devices can still maintain robust security features without sacrificing critical system resources. Compatible with general-purpose and specialized CPUs, Suite-Q SW supports hardware offload, enhancing processing efficiency across different applications. Key functionalities include support for various symmetric and asymmetric cryptographic standards, aligning with global security protocols. Suite-Q SW offers customization options to balance speed and memory use, meeting specific performance criteria while providing thorough validation tests and performance metrics for seamless integration into existing systems.
The RISC-V CPU IP NI Class by Nuclei is engineered for artificial intelligence and advanced driver assistance systems (ADAS), as well as video processing. It supports a robust computing environment with features tailored to high-intensity applications. The NI Class IP is crafted with configurability at its core, allowing users to select and implement features as needed. Developed with Verilog, it ensures clarity in code and effectiveness in debugging, optimizing the processor's performance, power, and area metrics. Supported by a wide variety of RISC-V extensions, the NI Class also facilitates user-defined instruction enhancements for tailored application use. The security features are formidable, with TEE support and a physical security package to protect sensitive data and operations. Compliance with industrial safety standards such as ASIL-B and ASIL-D makes the NI Class a secure and resilient choice for high-demand applications in AI and ADAS. Overall, the RISC-V CPU IP NI Class exemplifies Nuclei’s commitment to developing powerful, secure, and adaptable processing solutions. Its focus on AI and video applications marks it as a leading choice for forward-looking technological advancements.
Designed as a public key algorithm coprocessor, the FortiPKA-RISC-V stands out for its ability to streamline operations typically bogged down by Montgomery domain transformations. This component is tailored for high performance in embedded systems, ensuring enhanced data security through its advanced modular multiplication and robust protection against SCA and FIA. Particularly suited for secure System on Chip (SoC) integration, FortiPKA-RISC-V offers significant performance improvements without increasing area constraints.
The RISC-V CPU IP NA Class from Nuclei is purpose-built for the automotive industry, focusing on ISO26262 FuSa standards to ensure functional safety. This processor IP is designed with automotive-specific features and flexibility, employing a 64-bit architecture to handle complex computations necessary in advanced driver assistance systems (ADAS) and other automotive applications. Developed using Verilog, the NA Class prioritizes readability, which aids in debugging and optimizing performance, power efficiency, and area measurements. With substantial configurability, the NA Class allows for integration in a wide range of systems by leveraging RISC-V extensions and user-defined instruction capabilities. Its comprehensive security suite, including TEE support and physical security packages, ensures the integrity and protection of automotive systems from cyber-threats. Furthermore, the NA Class is aligned with ASIL-B and ASIL-D safety protocols, providing the necessary assurance for automotive safety and reliability standards. In conclusion, Nuclei's NA Class is set to meet the high demands of automotive applications requiring safety and security. It offers robust features that address the specific needs of the automotive scene, showcasing Nuclei’s dedication to innovation and safety in the automotive sector.
Suite-Q HW is a comprehensive system-on-chip (SoC) design by PQ Secure that integrates all necessary cryptographic components for secure protocols. Targeted at both high-end servers and low-end embedded systems, Suite-Q HW offers versatile hardware accelerators capable of conducting symmetric and asymmetric cryptographic operations efficiently. Key features of this hardware include a NIST 800-90-compliant true random number generator (TRNG), support for a variety of elliptic curve cryptographies, and capabilities for post-quantum cryptography operations such as isogeny-based and lattice-based cryptographies. It also supports traditional algorithms like AES and SHA, ensuring compatibility with established security protocols. Suite-Q HW is engineered to offload heavy cryptographic computations, reducing system demands while providing substantial power savings over software implementations. This makes it ideal for applications requiring high security and efficiency, such as in IoT devices where power consumption is a critical concern. Enhanced by optional DPA countermeasures, it provides robust security in a compact and efficient package.
PQ Secure's Cryptographic Core is designed to handle a variety of cryptographic operations required for secure communication and data protection. This core supports both symmetric and asymmetric cryptographic algorithms, ensuring a comprehensive range of security features. With adaptability for different system requirements, it can be integrated into various hardware platforms including FPGAs and ASICs, offering efficient and secure processing. This core is capable of executing classical public key operations such as ECDSA, Ed25519, Curve25519, and Curve448, as well as supporting advanced encryption standards like AES and SHA algorithms. These capabilities ensure that the cryptographic core can handle multiple cryptographic needs, maintaining the integrity and confidentiality of data within digital systems. Designed with flexibility in mind, the core can be configured to meet specific performance and security requirements, making it suitable for applications that range from high-performance servers to low-power IoT devices. Alongside these features, the core is fortified against potential side-channel attacks, providing robust security in various application environments.
The Geon Secure Execution Processor, built on the foundational BA22 architecture, is designed for high-performance cryptographic isolation of sensitive data. Operating at up to 450 MHz in a 65 nm process, it offers DMIPS/MHz performance of 1.79, making it suitable for diverse security needs. This processor has been verified at the system level, ensuring robust protection for sensitive applications.
DRV32IMZicsr – Scalable RISC-V Power. Tailored for Your Project. Ready for the Future. The DRV32IMZicsr is a high-performance, 32-bit RISC-V processor core, equipped with M (Multiply/Divide), Zicsr (Control and Status Registers), and External Debug support. Built as part of DCD’s latest DRVX Core Family, it delivers the full flexibility, openness, and innovation that RISC-V promises—without locking you into proprietary architectures. ✅ Why RISC-V? RISC-V is a rapidly growing open standard for modern computing—backed by a global ecosystem of developers and vendors. It brings: * Freedom from licensing fees and vendor lock-in * Scalability from embedded to high-performance systems * Customizability with standard and custom instruction sets * Strong toolchain & ecosystem support 🚀 DRV32IMZicsr Highlights: * Five-stage pipeline and Harvard architecture for optimized performance * Configurable memory architecture: size and address allocation tailored to your needs Performance metrics: * **Up to 1.15 DMIPS/MHz** * **Up to 2.36 CoreMark/MHz** * Minimal footprint starting from just 14k gates * Flexible interfaces: Choose from AXI, AHB, or native bus options 🛡️ Designed for Safety & Integration: * Developed as an ISO 26262 Safety Element out of Context (SEooC) * Fully technology-agnostic, compatible with all FPGA and ASIC platforms * Seamless integration with DCD’s rich portfolio of IPs: DMA, SPI, UART, PWM, CAN, and more 🔍 Advanced Feature Set: * 32 general-purpose registers * Support for arithmetic, logic, load/store, conditional and unconditional control flow * M extension enables efficient integer multiplication/division * Zicsr extension provides robust interrupt and exception handling, performance counters, and timers * External Debug via JTAG: compliant with RISC-V Debug Specification 0.13.2 and 1.0.0, compatible with all mainstream tools 🧪 Developer-Ready: * Delivered with a fully automated testbench * Includes a comprehensive validation test suite for smooth integration into your SoC flow Whether you're building for automotive, IoT, consumer electronics, or embedded systems, the DRV32IMZicsr offers a future-ready RISC-V solution—highly configurable, performance-optimized, and backed by DCD’s 25 years of experience. Interested? Let’s build the next generation together. 📩 Contact us at info@dcd.pl
**DRV64IMZicsr – 64-bit RISC-V Performance. Designed for Demanding Innovation.** The DRV64IMZicsr is a powerful and versatile 64-bit RISC-V CPU core, built to meet the performance and safety needs of next-generation embedded systems. Featuring the M (Multiply/Divide), Zicsr (Control and Status Registers), and External Debug extensions, this core is engineered to scale—from edge computing to mission-critical applications. As part of the DRVX Core Family, the DRV64IMZicsr embodies DCD’s philosophy of combining open-standard freedom with customizable IP excellence—making it a smart and future-proof alternative to legacy architectures. ✅ Why Choose RISC-V? * No license fees – open-source instruction set means reduced TCO * Unmatched flexibility – tailor the architecture to your specific needs * A global, thriving ecosystem – support from toolchains, OSes, and hardware vendors * Security & longevity – open and verifiable architecture ensures trust and sustainability 🚀 DRV64IMZicsr – Core Advantages: * 64-bit RISC-V ISA with M, Zicsr, and Debug support * Five-stage pipeline, Harvard architecture, and efficient branch prediction * Configurable memory size and allocation for program and data spaces Performance optimized: * **Up to 2.38 CoreMark/MHz** * **Up to 1.17 DMIPS/MHz** * Compact footprint starting from just 17.6k gates * Interface options: AXI, AHB, or native * Compatible with Classical CAN, CAN FD, and CAN XL through additional IPs 🛡️ Safety, Compatibility & Flexibility Built In: * Developed as an ISO 26262 Safety Element out of Context (SEooC) * Technology-agnostic – works seamlessly across all FPGA and ASIC vendors * Expandable with DCD’s IP portfolio: DMA, SPI, UART, I²C, CAN, PWM, and more 🔍 Robust Feature Set for Real Applications: * Full 64-bit processing – ideal for performance-intensive, memory-heavy tasks * M extension enables high-speed multiplication/division via dedicated hardware unit * Zicsr extension gives full access to Control and Status Registers, enabling: * Interrupts and exception handling (per RISC-V Privileged Spec) * Performance counters and timers * JTAG-compatible debug interface – compliant with RISC-V Debug Spec (0.13.2 & 1.0.0) 🧪 Ready for Development & Integration: * Comes with a fully automated testbench * Includes a comprehensive suite of validation tests for smooth SoC integration * Supported by industry-standard tools, ensuring a hassle-free dev experience Whether you’re designing for automotive safety, industrial control, IoT gateways, or AI-enabled edge devices, the DRV64IMZicsr gives you the performance, flexibility, and future-readiness of RISC-V—without compromise. 💡 Build smarter, safer systems—on your terms. 📩 Contact us today at info@dcd.pl to start your next RISC-V-powered project.
Join the world's most advanced semiconductor IP marketplace!
It's free, and you'll get all the tools you need to discover IP, meet vendors and manage your IP workflow!
Join the world's most advanced AI-powered semiconductor IP marketplace!
It's free, and you'll get all the tools you need to advertise and discover semiconductor IP, keep up-to-date with the latest semiconductor news and more!
Plus we'll send you our free weekly report on the semiconductor industry and the latest IP launches!