All IPs > Processor > Microcontroller
Microcontrollers form the backbone of many modern electronic devices, offering precise control and processing capabilities that power everything from consumer electronics to industrial machines. In the world of semiconductor IPs, microcontrollers provide the essential building blocks that allow developers to design complex functionalities tailored to specific applications. This category is vital for those looking to integrate processing and control functionalities directly into their embedded systems, providing efficiencies in both performance and energy use.
Microcontrollers available as semiconductor IPs are used in a broad spectrum of applications, from automotive and aerospace to smart home devices and IoT gadgets. By selecting a microcontroller IP, developers can customize core functions such as CPU architecture, memory management, input/output controls, and specialized peripherals to meet the specific needs of their projects. These IPs are designed to streamline the development process, reduce time-to-market, and offer flexibility in the design and scalability of end products.
One of the key advantages of utilizing microcontroller semiconductor IPs is the ability to incorporate proprietary or emerging technologies seamlessly into existing systems. This not only helps in keeping the product line up-to-date with the latest technology trends but also ensures that the devices remain competitive in the rapidly evolving electronics marketplace. Moreover, integrating microcontroller IPs can lead to cost savings by minimizing the need for additional chips and lowering power consumption through optimized architectures and process technologies.
As you explore the Processor > Microcontroller category in our Silicon Hub, you'll discover a wealth of options that cater to various industry needs, ranging from low-power designs suitable for portable devices to high-performance solutions required for complex computing tasks. Whether you are designing a simple control unit or a sophisticated embedded application, microcontroller semiconductor IPs provide the versatility and functionality necessary to drive innovation.
The Yitian 710 processor from T-Head represents a significant advancement in server chip technology, featuring an ARM-based architecture optimized for cloud applications. With its impressive multi-core design and high-speed memory access, this processor is engineered to handle intensive data processing tasks with efficiency and precision. It incorporates advanced fabrication techniques, offering high throughput and low latency to support next-generation cloud computing environments. Central to its architecture are 128 high-performance CPU cores utilizing the Armv9 structure, which facilitate superior computational capabilities. These cores are paired with substantial cache size and high-speed DDR5 memory interfaces, optimizing the processor's ability to manage massive workloads effectively. This attribute makes it an ideal choice for data centers looking to enhance processing speed and efficiency. In addition to its hardware prowess, the Yitian 710 is designed to deliver excellent energy efficiency. It boasts a sophisticated power management system that minimizes energy consumption without sacrificing performance, aligning with green computing trends. This combination of power, efficiency, and environmentally friendly design positions the Yitian 710 as a pivotal choice for enterprises propelling into the future of computing.
The Chimera GPNPU from Quadric is engineered to meet the diverse needs of modern AI applications, bridging the gap between traditional processing and advanced AI model requirements. It's a fully licensable processor, designed to deliver high AI inference performance while eliminating the complexity of traditional multi-core systems. The GPNPU boasts an exceptional ability to execute various AI models, including classical backbones, state-of-the-art transformers, and large language models, all within a single execution pipeline.\n\nOne of the core strengths of the Chimera GPNPU is its unified architecture that integrates matrix, vector, and scalar processing capabilities. This singular design approach allows developers to manage complex tasks such as AI inference and data-parallel processing without resorting to multiple tools or artificial partitioning between processors. Users can expect heightened productivity thanks to its modeless operation, which is fully programmable and efficiently executes C++ code alongside AI graph code.\n\nIn terms of versatility and application potential, the Chimera GPNPU is adaptable across different market segments. It's available in various configurations to suit specific performance needs, from single-core designs to multi-core clusters capable of delivering up to 864 TOPS. This scalability, combined with future-proof programmability, ensures that the Chimera GPNPU not only addresses current AI challenges but also accommodates the ever-evolving landscape of cognitive computing requirements.
xcore.ai is a versatile and powerful processing platform designed for AIoT applications, delivering a balance of high performance and low power consumption. Crafted to bring AI processing capabilities to the edge, it integrates embedded AI, DSP, and advanced I/O functionalities, enabling quick and effective solutions for a variety of use cases. What sets xcore.ai apart is its cycle-accurate programmability and low-latency control, which improve the responsiveness and precision of the applications in which it is deployed. Tailored for smart environments, xcore.ai ensures robust and flexible computing power, suitable for consumer, industrial, and automotive markets. xcore.ai supports a wide range of functionalities, including voice and audio processing, making it ideal for developing smart interfaces such as voice-controlled devices. It also provides a framework for implementing complex algorithms and third-party applications, positioning it as a scalable solution for the growing demands of the connected world.
Leveraging a high-performance RISC architecture, the eSi-3250 32-bit core efficiently integrates instruction and data caches. This makes it compatible with designs utilizing slower on-chip memories such as eFlash. The core not only supports MMU for address translation but also allows for user-defined custom instructions, greatly enhancing its flexibility for specialized and high-performance applications.
The Jotunn8 AI Accelerator represents a pioneering approach in AI inference chip technology, designed to cater to the demanding needs of contemporary data centers. Its architecture is optimized for high-speed deployment of AI models, combining rapid data processing capabilities with cost-effectiveness and energy efficiency. By integrating features such as ultra-low latency and substantial throughput capacity, it supports real-time applications like chatbots and fraud detection that require immediate data processing and agile responses. The chip's impressive performance per watt metric ensures a lower operational cost, making it a viable option for scalable AI operations that demand both efficiency and sustainability. By reducing power consumption, Jotunn8 not only minimizes expenditure but also contributes to a reduced carbon footprint, aligning with the global move towards greener technology solutions. These attributes make Jotunn8 highly suitable for applications where energy considerations and environmental impact are paramount. Additionally, Jotunn8 offers flexibility in memory performance, allowing for the integration of complexity in AI models without compromising on speed or efficiency. The design emphasizes robustness in handling large-scale AI services, catering to the new challenges posed by expanding data needs and varied application environments. Jotunn8 is not simply about enhancing inference speed; it proposes a new baseline for scalable AI operations, making it a foundational element for future-proof AI infrastructure.
RaiderChip's GenAI v1 is a pioneering hardware-based generative AI accelerator, designed to perform local inference at the Edge. This technology integrates optimally with on-premises servers and embedded devices, offering substantial benefits in privacy, performance, and energy efficiency over traditional hybrid AI solutions. The design of the GenAI v1 NPU streamlines the process of executing large language models by embedding them directly onto the hardware, eliminating the need for external components like CPUs or internet connections. With its ability to support complex models such as the Llama 3.2 with 4-bit quantization on LPDDR4 memory, the GenAI v1 achieves unprecedented efficiency in AI token processing, coupled with energy savings and reduced latency. What sets GenAI v1 apart is its scalability and cost-effectiveness, significantly outperforming competitive solutions such as Intel Gaudi 2, Nvidia's cloud GPUs, and Google's cloud TPUs in terms of memory efficiency. This solution maximizes the number of tokens generated per unit of memory bandwidth, thus addressing one of the primary limitations in generative AI workflow. Furthermore, the adept memory usage of GenAI v1 reduces the dependency on costly memory types like HBM, opening the door to more affordable alternatives without diminishing processing capabilities. With a target-agnostic approach, RaiderChip ensures the GenAI v1 can be adapted to various FPGAs and ASICs, offering configuration flexibility that allows users to balance performance with hardware costs. Its compatibility with a wide range of transformers-based models, including proprietary modifications, ensures GenAI v1's robust placement across sectors requiring high-speed processing, like finance, medical diagnostics, and autonomous systems. RaiderChip's innovation with GenAI v1 focuses on supporting both vanilla and quantized AI models, ensuring high computation speeds necessary for real-time applications without compromising accuracy. This capability underpins their strategic vision of enabling versatile and sustainable AI solutions across industries. By prioritizing integration ease and operational independence, RaiderChip provides a tangible edge in applying generative AI effectively and widely.
The RV12 RISC-V Processor is a versatile single-core microprocessor that adheres to both the RV32I and RV64I RISC-V instruction sets. Designed primarily for the embedded market, this processor features a Harvard architecture that enables simultaneous instruction and data accesses, enhancing performance in computing tasks. As part of the Roa Logic CPU family, this processor is highly configurable, allowing users to adjust its parameters to fit specific application requirements, thus making it an excellent choice for technology developers seeking efficient custom solutions.
Designed for minimal power consumption, the Tianqiao-70 is a 64-bit RISC-V CPU core that harmonizes efficiency with energy savings. Targeting primarily the commercial space, this CPU core supports applications that demand lower power usage without compromising performance outputs. It stands out in the fields of mobile and desktop processing, AI learning, and other demanding applications that require consistent yet power-efficient computing. Architected to provide maximum throughput with minimum power draw, it is essential for energy-critical systems. The Tianqiao-70 showcases StarFive's commitment to optimizing for efficiency, enabling mobile, desktop, and AI platforms to leverage low power requirements effectively. This makes it a compelling choice for developers aiming to integrate eco-friendly solutions in their products.
The A25 processor model is a versatile CPU suitable for a variety of embedded applications. With its 5-stage pipeline and 32/64-bit architecture, it delivers high performance even with a low gate count, which translates to efficiency in power-sensitive environments. The A25 is equipped with Andes Custom Extensions that enable tailored instruction sets for specific application accelerations. Supporting robust high-frequency operations, this model shines in its ability to manage data prefetching and cache coherence in multicore setups, making it adept at handling complex processing tasks within constrained spaces.
The NMP-750 is a high-performance accelerator designed for edge computing, particularly suited for automotive, AR/VR, and telecommunications sectors. It boasts an impressive capacity of up to 16 TOPS and 16 MB local memory, powered by a RISC-V or Arm Cortex-R/A 32-bit CPU. The three AXI4 interfaces ensure seamless data transfer and processing. This advanced accelerator supports multifaceted applications such as mobility control, building automation, and multi-camera processing. It's designed to cope with the rigorous demands of modern digital and autonomous systems, offering substantial processing power and efficiency for intensive computational tasks. The NMP-750's ability to integrate into smart systems and manage spectral efficiency makes it crucial for communications and smart infrastructure management. It helps streamline operations, maintain effective energy management, and facilitate sophisticated AI-driven automation, ensuring that even the most complex data flows are handled efficiently.
The GenAI v1-Q from RaiderChip brings forth a specialized focus on quantized AI operations, reducing memory requirements significantly while maintaining impressive precision and speed. This innovative accelerator is engineered to execute large language models in real-time, utilizing advanced quantization techniques such as Q4_K and Q5_K, thereby enhancing AI inference efficiency especially in memory-constrained environments. By offering a 276% boost in processing speed alongside a 75% reduction in memory footprint, GenAI v1-Q empowers developers to integrate advanced AI capabilities into smaller, less powerful devices without sacrificing operational quality. This makes it particularly advantageous for applications demanding swift response times and low latency, including real-time translation, autonomous navigation, and responsive customer interactions. The GenAI v1-Q diverges from conventional AI solutions by functioning independently, free from external network or cloud auxiliaries. Its design harmonizes superior computational performance with scalability, allowing seamless adaptation across variegated hardware platforms including FPGAs and ASIC implementations. This flexibility is crucial for tailoring performance parameters like model scale, inference velocity, and power consumption to meet exacting user specifications effectively. RaiderChip's GenAI v1-Q addresses crucial AI industry needs with its ability to manage multiple transformer-based models and confidential data securely on-premises. This opens doors for its application in sensitive areas such as defense, healthcare, and financial services, where confidentiality and rapid processing are paramount. With GenAI v1-Q, RaiderChip underscores its commitment to advancing AI solutions that are both environmentally sustainable and economically viable.
The Azurite Core-hub by InCore Semiconductors is a sophisticated solution designed to offer scalable RISC-V SoCs with high-speed secure interconnect capabilities. This processor is tailored for performance-demanding applications, ensuring that systems maintain robust security while executing tasks at high speeds. Azurite leverages advanced interconnect technologies to enhance the communication between components within a SoC, making it ideal for industries that require rapid data transfer and high processing capabilities. The core is engineered to be scalable, supporting a wide range of applications from edge AI to functional safety systems, adapting seamlessly to various industry needs. Engineered with a focus on security, the Azurite Core-hub incorporates features that protect data integrity and system operation in a dynamic technological landscape. This makes it a reliable choice for companies seeking to integrate advanced RISC-V architectures into their security-focused applications, offering not just innovation but also peace of mind with its secure design.
The eSi-3200, a 32-bit cacheless core, is tailored for embedded control with its expansive and configurable instruction set. Its capabilities, such as 64-bit multiply-accumulate operations and fixed-point complex multiplications, cater effectively to signal processing tasks like FFTs and FIRs. Additionally, it supports SIMD and single-precision floating point operations, coupled with efficient power management features, enhancing its utility for diverse embedded applications.
The NMP-350 is a cutting-edge endpoint accelerator designed to optimize power usage and reduce costs. It is ideal for markets like automotive, AIoT/sensors, and smart appliances. Its applications span from driver authentication and predictive maintenance to health monitoring. With a capacity of up to 1 TOPS and 1 MB of local memory, it incorporates a RISC-V/Arm Cortex-M 32-bit CPU and supports three AXI4 interfaces. This makes the NMP-350 a versatile component for various industrial applications, ensuring efficient performance and integration. Developed as a low-power solution, the NMP-350 is pivotal for applications requiring efficient processing power without inflating energy consumption. It is crucial for mobile and battery-operated devices where every watt conserved adds to the operational longevity of the product. This product aligns with modern demands for eco-friendly and cost-effective technologies, supporting enhanced performance in compact electronic devices. Technical specifications further define its role in the industry, exemplifying how it brings robust and scalable solutions to its users. Its adaptability across different applications, coupled with its cost-efficiency, makes it an indispensable tool for developers working on next-gen AI solutions. The NMP-350 is instrumental for developers looking to seamlessly incorporate AI capabilities into their designs without compromising on economy or efficiency.
The eSi-1600 is a 16-bit CPU core designed for cost-sensitive and power-efficient applications. It accords performance levels similar to that of 32-bit CPUs while maintaining a system cost comparable to 8-bit processors. This IP is particularly well-suited for control applications needing limited memory resources, demonstrating excellent compatibility with mature mixed-signal technologies.
The Spiking Neural Processor T1 is a neuromorphic microcontroller engineered for always-on sensor applications. It utilizes a spiking neural network engine alongside a RISC-V processor core, creating an ultra-efficient single-chip solution for real-time data processing. With its optimized power consumption, it enables next-generation artificial intelligence and signal processing in small, battery-operated devices. The T1 delivers advanced applications capabilities within a minimal power envelope, making it suitable for use in devices where power and latency are critical factors. The T1 includes a compact, multi-core RISC-V CPU paired with substantial on-chip SRAM, enabling fast and responsive processing of sensor data. By employing the remarkable abilities of spiking neural networks for pattern recognition, it ensures superior power performance on signal-processing tasks. The versatile processor can execute both SNNs and conventional processing tasks, supported by various standard interfaces, thus offering maximum flexibility to developers looking to implement AI features across different devices. Developers can quickly prototype and deploy solutions using the T1's development kit, which includes software for easy integration into existing systems and tools for accurate performance profiling. The development kit supports a variety of sensor interfaces, streamlining the creation of sophisticated sensor applications without the need for extensive power or size trade-offs.
The SiFive Essential family of processors is renowned for its flexibility and wide applicability across embedded systems. These CPU cores are designed to meet specific market needs with pre-defined, silicon-proven configurations or through use of SiFive Core Designer for custom processor builds. Serving in a range of 32-bit to 64-bit options, the Essential processors can scale from microcontrollers to robust dual-issue CPUs. Widely adopted in the embedded market, the Essential series cores stand out for their scalable performance, adapting to diverse application requirements while maintaining power and area efficiency. They cater to billions of units worldwide, indicating their trusted performance and integration across various industries. The SiFive Essential processors offer an optimal balance of power, area, and cost, making them suitable for a wide array of devices, from IoT and consumer electronics to industrial applications. They provide a solid foundation for products that require reliable performance at a competitive price.
The Chipchain C100 is a pioneering solution in IoT applications, providing a highly integrated single-chip design that focuses on low power consumption without compromising performance. Its design incorporates a powerful 32-bit RISC-V CPU which can reach speeds up to 1.5GHz. This processing power ensures efficient and capable computing for diverse IoT applications. This chip stands out with its comprehensive integrated features including embedded RAM and ROM, making it efficient in both processing and computing tasks. Additionally, the C100 comes with integrated Wi-Fi and multiple interfaces for transmission, broadening its application potential significantly. Other notable features of the C100 include an ADC, LDO, and a temperature sensor, enabling it to handle a wide array of IoT tasks more seamlessly. With considerations for security and stability, the Chipchain C100 facilitates easier and faster development in IoT applications, proving itself as a versatile component in smart devices like security systems, home automation products, and wearable technology.
Syntacore's SCR9 processor core is a state-of-the-art, high-performance design targeted at applications requiring extensive data processing across multiple domains. It features a robust 12-stage dual-issue out-of-order pipeline and is Linux-capable. Additionally, the core supports up to 16 cores, offering superior processing power and versatility. This processor includes advanced features such as a VPU (Vector Processing Unit) and hypervisor support, allowing it to manage complex computational tasks efficiently. The SCR9 is particularly well-suited for deployments in enterprise, AI, and telecommunication sectors, reinforcing its status as a key component in next-generation computing solutions.
The NMP-550 is tailored for enhanced performance efficiency, serving sectors like automotive, mobile, AR/VR, drones, and robotics. It supports applications such as driver monitoring, image/video analytics, and security surveillance. With a capacity of up to 6 TOPS and 6 MB local memory, this accelerator leverages either a RISC-V or Arm Cortex-M/A 32-bit CPU. Its three AXI4 interface support ensures robust interconnections and data flow. This performance boost makes the NMP-550 exceptionally suited for devices requiring high-frequency AI computations. Typical use cases include industrial surveillance and smart robotics, where precise and fast data analysis is critical. The NMP-550 offers a blend of high computational power and energy efficiency, facilitating complex AI tasks like video super-resolution and fleet management. Its architecture supports modern digital ecosystems, paving the way for new digital experiences through reliable and efficient data processing capabilities. By addressing the needs of modern AI workloads, the NMP-550 stands as a significant upgrade for those needing robust processing power in compact form factors.
The Neural Processing Unit (NPU) offered by OPENEDGES is engineered to accelerate machine learning tasks and AI computations. Designed for integration into advanced processing platforms, this NPU enhances the ability of devices to perform complex neural network computations quickly and efficiently, significantly advancing AI capabilities. This NPU is built to handle both deep learning and inferencing workloads, utilizing highly efficient data management processes. It optimizes the execution of neural network models with acceleration capabilities that reduce power consumption and latency, making it an excellent choice for real-time AI applications. The architecture is flexible and scalable, allowing it to be tailored for specific application needs or hardware constraints. With support for various AI frameworks and models, the OPENEDGES NPU ensures compatibility and smooth integration with existing AI solutions. This allows companies to leverage cutting-edge AI performance without the need for drastic changes to legacy systems, making it a forward-compatible and cost-effective solution for modern AI applications.
The RISC-V CPU IP N Class is part of a comprehensive lineup offered by Nuclei, optimized for microcontroller applications. This 32-bit architecture is ideal for AIoT solutions, allowing seamless integration into innovative low-power and high-efficiency projects. As a highly configurable IP, it supports extensions in security and physical safety measures, catering to applications that demand reliability and adaptability. With a focus on configurability, the N Class can be tailored for specific system requirements by selecting only the necessary features, ensuring optimized performance and resource utilization. Designed with robust and readable Verilog coding, it facilitates effective debugging and performance, power, and area (PPA) optimization. The IP also supports Trust Execution Environment (TEE) for enhanced security, catering to a variety of IoT and embedded applications. This class offers efficient scalability, supporting several RISC-V extensions like B, K, P, and V, while also allowing for user-defined instruction expansion. Committed to delivering a highly adaptable processor solution, the RISC-V CPU IP N Class is essential for developers aiming to implement secure and flexible embedded systems.
The eSi-1650 is a compact, low-power 16-bit CPU core integrating an instruction cache, making it an ideal choice for mature process nodes reliant on OTP or Flash program memory. By omitting large on-chip RAMs, the IP core optimizes power and area efficiency and permits the CPU to capitalize on its maximum operational frequency beyond OTP/Flash constraints.
The RISC-V Core IP developed by AheadComputing Inc. stands out in the field of 64-bit application processors. Designed to deliver exceptional per-core performance, this processor is engineered with the highest standards to maximize the Instructions Per Cycle (IPC) efficiency. AheadComputing's RISC-V Core IP is continuously refined to address the growing demands of high-performance computing applications. The innovative architecture of this core allows for seamless execution of complex algorithms while achieving superior speed and efficiency. This design is crucial for applications that require fast data processing and real-time computational capabilities. By integrating advanced power management techniques, the RISC-V Core IP ensures energy efficiency without sacrificing performance, making it suitable for a wide range of electronic devices. Anticipating future computing needs, AheadComputing's RISC-V Core IP incorporates state-of-the-art features that support scalability and adaptability. These features ensure that the IP remains relevant as technology evolves, providing a solid foundation for developing next-generation computing solutions. Overall, it embodies AheadComputing’s commitment to innovation and performance excellence.
The Y180 is a streamlined microprocessor featuring around 8K gates, specifically designed as a clone of the Zilog Z180 CPU. Tailored for applications requiring compact size and efficient performance, this CPU-only design is a suitable replacement for legacy systems needing updates with reliable components. As a lightweight processor, the Y180 supports fundamental computational tasks while maintaining compatibility with existing infrastructure designed for Z180 systems. Its straightforward design facilitates easy integration, making it desirable for projects necessitating simplicity and lower power usage. Given its specialized purpose, the Y180 serves niche markets where updating older technology cost-effectively without compromising performance is a priority. It leverages Systemyde's depth of microprocessor design expertise to deliver practicality and adaptability.
The SCR3 is an efficient microcontroller core offered by Syntacore, designed to meet the needs of both industrial and consumer applications. It introduces a 5-stage in-order pipeline and includes privilege modes along with an MPU, as well as L1 and L2 cache support for improved performance. This core balances processing efficiency with power consumption, making it suitable for use cases that require reliable performance within space and energy constraints. The SCR3's versatility extends across various sectors, including IoT, automotive, and networking.
The SCR6 stands out with a high-performance 12-stage dual-issue out-of-order pipeline coupled with an advanced FPU. As a microcontroller core, it boasts excellent computational capabilities while maintaining efficient power consumption. This attribute makes it highly suitable for deeply embedded applications that demand a fine balance between performance and energy efficiency. Its architecture is particularly favored in sectors such as sensor fusion, control systems, and network devices. The SCR6 is emblematic of Syntacore's engineering prowess, integrating high-level functionalities into compact design footprints.
Tyr AI Processor Family is engineered to bring unprecedented processing capabilities to Edge AI applications, where real-time, localized data processing is crucial. Unlike traditional cloud-based AI solutions, Edge AI facilitated by Tyr operates directly at the site of data generation, thereby minimizing latency and reducing the need for extensive data transfers to central data centers. This processor family stands out in its ability to empower devices to deliver instant insights, which is critical in time-sensitive operations like autonomous driving or industrial automation. The innovative design of the Tyr family ensures enhanced privacy and compliance, as data processing stays on the device, mitigating the risks associated with data exposure. By doing so, it supports stringent requirements for privacy while also reducing bandwidth utilization. This makes it particularly advantageous in settings like healthcare or environments with limited connectivity, where maintaining data integrity and efficiency is crucial. Designed for flexibility and sustainability, the Tyr AI processors are adept at balancing computing power with energy consumption, thus enabling the integration of multi-modal inputs and outputs efficiently. Their performance nears data center levels, yet they are built to consume significantly less energy, making them a cost-effective solution for implementing AI capabilities across various edge computing environments.
The AndeShape Platforms are designed to streamline system development by providing a diverse suite of IP solutions for SoC architecture. These platforms encompass a variety of product categories, including the AE210P for microcontroller applications, AE300 and AE350 AXI fabric packages for scalable SoCs, and AE250 AHB platform IP. These solutions facilitate efficient system integration with Andes processors. Furthermore, AndeShape offers a sophisticated range of development platforms and debugging tools, such as ADP-XC7K160/410, which reinforce the system design and verification processes, providing a comprehensive environment for the innovative realization of IoT and other embedded applications.
The SCR1 is an open-source microcontroller core optimized for deeply embedded applications. It features a 4-stage in-order pipeline, ensuring efficient processing of instructions. Designed for compactness and resource optimization, the SCR1 is an excellent choice for applications requiring simplicity and functionality within constrained environments. Its open-source nature and configurability make it adaptable to a wide range of use cases, from consumer electronics to industrial devices. This core is part of Syntacore's commitment to providing highly efficient, silicon-proven solutions.
The Codasip RISC-V BK Core Series represents a family of processor cores that bring advanced customization to the forefront of embedded designs. These cores are optimized for power and performance, striking a fine balance that suits an array of applications, from sensor controllers in IoT devices to sophisticated automotive systems. Their modular design allows developers to tailor instructions and performance levels directly to their needs, providing a flexible platform that enhances both existing and new applications. Featuring high degrees of configurability, the BK Core Series facilitates designers in achieving superior performance and efficiency. By supporting a broad spectrum of operating requirements, including low-power and high-performance scenarios, these cores stand out in the processor IP marketplace. The series is verified through industry-leading practices, ensuring robust and reliable operation in various application environments. Codasip has made it straightforward to use and adapt the BK Core Series, with an emphasis on simplicity and productivity in customizing processor architecture. This ease of use allows for swift validation and deployment, enabling quicker time to market and reducing costs associated with custom hardware design.
The pPLL05 Family comprises low-power all-digital fractional-N PLLs designed for IoT and embedded applications, operating efficiently at frequencies up to 1GHz. Leveraging Perceptia's advanced digital PLL technology, these PLLs deliver exceptional low-jitter performance in a highly compact footprint, typically less than 0.01 square millimeters, and consume as little as 1 milliwatt. These characteristics make them ideal for integration in low-voltage environments where power efficiency is critical. This second-generation PLL family is constructed to support both integer-N and fractional-N operation, providing flexibility in choosing optimal input and output frequencies. The pPLL05 Family integrates easily into complex designs, offering robust support for multi-PLL systems and shared power supply configurations. The PLLs are built to function reliably across various processes, ensuring consistent performance regardless of PVT variations. Customization and integration support are key features of the pPLL05 Family, allowing designers to optimize for specific applications and seamlessly adapt to different technological requirements. This allows for rapid deployment and operational efficiency in power-sensitive environments, a crucial advantage for emerging IoT solutions.
The SCR7 application core is a Linux-capable, high-performance processing unit equipped with a 12-stage dual-issue out-of-order pipeline. Designed for sophisticated computational tasks, it delivers superior performance through its SMP support, accommodating up to 8 cores. The core's comprehensive memory architecture, which includes cache coherency, makes it ideal for demanding sectors like AI and high-performance computing. The SCR7 is configured to excel in data-heavy environments, efficiently handling complex operations with lower power consumption, aligning with global trends in AI and enterprise data processing.
The eSi-3264 stands out with its support for both 32/64-bit operations, including 64-bit fixed and floating-point SIMD (Single Instruction Multiple Data) DSP extensions. Engineered for applications mandating DSP functionality, it does so with minimal silicon footprint. Its comprehensive instruction set includes specialized commands for various tasks, bolstering its practicality across multiple sectors.
The Maverick-2 Intelligent Compute Accelerator (ICA) is a groundbreaking innovation by Next Silicon Ltd. This architecture introduces a novel software-defined approach that adapts in real-time to optimize computational tasks, breaking the traditional constraints of CPUs and GPUs. By dynamically learning and accelerating critical code segments, Maverick-2 ensures enhanced efficiency and performance efficiency for high-performance computing (HPC), artificial intelligence (AI), and vector databases. Designers have developed the Maverick-2 to support a wide range of common programming languages, including C/C++, FORTRAN, OpenMP, and Kokkos, facilitating an effortless porting process. This robust toolchain reduces time-intensive application porting, allowing for a significant cut in development time while maximizing scientific output and insights. Developers can enjoy seamless integration into their existing workflows without needing new proprietary software stacks. A standout feature of this intelligent architecture is its ability to adjust hardware configurations on-the-fly, optimizing power efficiency and overall performance. With an emphasis on sustainable innovation, the Maverick-2 offers a performance-per-watt advantage that exceeds traditional GPU and high-end CPU solutions by over fourfold, making it a cost-effective and environmentally friendly choice for modern data centers and research facilities.
The NoISA Processor is an innovative microprocessor designed by Hotwright Inc. to overcome the limitations of traditional instruction set architectures. Unlike standard processors, which rely on a fixed ALU, register file, and hardware controller, the NoISA Processor utilizes the Hotstate machine - an advanced microcoded algorithmic state machine. This technology allows for runtime reprogramming and flexibility, making it highly suitable for various applications where space, power efficiency, and adaptability are paramount. With the NoISA Processor, users can achieve significant performance improvements without the limitations imposed by fixed instruction sets. It's particularly advantageous in IoT and edge computing scenarios, offering enhanced efficiency compared to conventional softcore CPUs while maintaining lower energy consumption. Moreover, this processor is ideal for creating small, programmable state machines and Sysotlic arrays rapidly. Its unique architecture permits behavior modification through microcode, rather than altering the FPGA, thus offering unprecedented flexibility and power in adapting to specific technological needs.
The RISC-V CPU IP NS Class is specifically engineered for security-focused applications, including fintech mobile payments and IoT security. This architecture supports a variety of security protocols, making it ideal for systems that require robust data protection and secure transaction handling. It features a background in efficiently managing sensitive information, supporting comprehensive information security solutions with strong cryptographic capabilities. This IP is built with RISC-V's flexible extensions, ensuring files and communication streams maintain confidentiality and integrity in diverse operational scenarios. Robust by design, the NS Class caters to sectors such as IoT, where data protection is paramount, making it a trusted choice for developers seeking to enforce stringent security measures into their solutions. With options for extending functionality and increasing resilience through user-defined instructions, the NS Class remains adaptable for future security requirements.
NeuroSense is a highly efficient AI chip engineered for use in wearables, focusing on reducing power consumption while enhancing the accuracy of health monitoring metrics, such as heart rate. Unlike traditional methods that heavily rely on cloud connectivity, NeuroSense executes all data processing locally using NASP technology. This chip ensures increased precision in measuring heart rates in motion by leveraging a simple PPG configuration, which translates to a more extended operational lifespan of wearables without frequent charges. One of NeuroSense's significant advantages is its ability to distinguish human activity levels, adjusting its operations accordingly to offer precise activity recognition capabilities. This functionality allows wearables to classify activities into categories such as rest or intensive activity accurately. Furthermore, the chip facilitates the inclusion of additional monitoring parameters like oxygen saturation and stress levels, broadening its application range. With a small IC footprint, NeuroSense is not only cost-effective but also facilitates quicker time-to-market for new devices. Its integration enables significant power efficiency gains, helping prolong wearable battery life significantly, thus allowing consumers to enjoy uninterrupted functions for extended periods.
Y51 microprocessor embeds the 8051 Instruction Set Architecture within a 2-clock machine cycle, streamlining processing for devices adhering to this widely recognized standard. By adopting this efficient architecture, the Y51 ensures compatibility with legacy systems while optimizing performance outcomes. Focused on simplicity and efficiency, the Y51 is ideal for applications within embedded systems where adherence to the 8051 architecture is required. It provides easy system integration due to its standard compliance and operational fluency, becoming a repeat choice for developers maintaining or upgrading applications utilizing older technology. System architects benefit from the Y51’s reliability and processing strength, underscoring Systemyde’s commitment to delivering microprocessors that meet the traditional demands without sacrificing integration ease or flexibility.
The SCR4 combines efficiency with advanced features, offering a 5-stage in-order pipeline, an FPU (Floating Point Unit), and an MPU (Memory Protection Unit), alongside comprehensive cache support. This microcontroller core is tailored for applications necessitating precision and enhanced computational performance. Its architecture enables effective power management, making it ideal for embedded systems with strict energy budgets. By supporting a range of markets like industrial automation and sensor networks, the SCR4 core exemplifies Syntacore's adaptability and forward-thinking approach.
The M8051EW expands upon the M8051W's impressive performance by incorporating on-chip debugging capabilities. This microcontroller core offers not only rapid execution but also integrates a JTAG debug port for compatibility with external debugging tools. Additionally, this core is designed with hardware breakpoints and instruction tracebacks, providing full read and write access across all register and memory locations. Such capabilities, together with its fast execution cycle, make it an ideal choice for designs requiring advanced debugging and real-time control.
Rabbit 4000 is a powerful member of the Rabbit microprocessor family, designed to deliver significant computational power and versatility in design. With 161K gates and 128 pins, this microprocessor supports more complex systems that require efficient processing capabilities combined with extensive peripheral support. This model is suitable for applications requiring superior performance and flexibility, making it particularly advantageous for use in high-demand environments such as industrial automation and sophisticated control systems. Its design is silicon-proven, reinforcing Systemyde's reputation for reliability and excellence in microprocessor engineering. The Rabbit 4000 offers enhanced features, including an upgraded instruction set that allows for greater processing power and efficiency. Its robust configuration supports the integration of multiple peripherals, ensuring that it meets the comprehensive needs of modern technology landscapes. This makes it a trusted choice for developers working with intricate and demanding applications.
As the Rabbit series progresses, the Rabbit 5000 sets a benchmark in high-performance microprocessor design. With an expansive 540K gates and 289 pins configuration, this processor is a powerhouse for data-intensive applications that demand rapid processing and extensive peripheral integration. The Rabbit 5000 is ideally suited for advanced embedded systems that require a balanced combination of processing speed and input/output capabilities. It offers comprehensive system integration options, making it exemplary for sophisticated industrial controls and high-speed communication systems. This processor stands out for its wide-ranging compatibility and performance enhancements, featuring an enriched instruction set designed to meet modern computational challenges. Its silicon-proven design guarantees stability and reliability, making it an optimal choice for engineers seeking cutting-edge technology for complex applications.
Syntacore’s SCR5 is a Linux-capable application core featuring a 9-stage in-order pipeline. It includes an MMU (Memory Management Unit), as well as L1 and L2 caches, which enhance its processing speed and efficiency. Designed to support multi-core configurations (SMP up to 4 cores), the SCR5 core is perfect for high-performance computing environments that require robust data processing capabilities. This core supports various application markets, including AI, ML, and mobile devices, due to its efficient integration of advanced processing at reduced energy costs.
Rabbit 2000 is a pioneering microprocessor suitable for a wide array of applications, featuring 19K gates in its design and occupying 100 pins. It offers a compact and efficient core, well-suited for integrating into systems where space and power are constrained. This processor is foundational in the Rabbit series and demonstrates excellent performance as a standard 8-bit microprocessor. The Rabbit 2000 architecture promotes seamless integration into larger systems with minimal design overhead. It provides a reliable base for developing sophisticated projects that require a blend of processing power and unique peripheral interfaces. The model has been thoroughly proven in silicon, ensuring robustness and reliability from prototype to mass production. This processor also supports various standard interfaces, simplifying the design process for developers needing a versatile processing unit with peripheral connectivity. Its versatile design makes it applicable in numerous applications, from embedded systems to industrial controllers.
The Rabbit 6000 reaches new heights in processing power and adaptability, featuring a substantial 760K gates and 292 pins. This processor is meticulously crafted for the most demanding applications where high performance and extensive integration are key considerations. Ideal for critical embedded systems requiring both swift data processing and robust peripheral connectivity, the Rabbit 6000 excels in environments where complex, multi-layered operations are commonplace. It provides a resilient, silicon-proven solution that integrates seamlessly into modern electronic ecosystems. System architects and developers benefit from its advanced instruction set and enhanced peripheral options, positioning the Rabbit 6000 as a processor of choice for technologies necessitating speed, reliability, and flexibility. This microprocessor offers unprecedented levels of integration and efficiency, ideal for next-generation communication technologies and automation systems.
Tailored for storage solutions, augmented reality (AR), virtual reality (VR), and artificial intelligence (AI) applications, the RISC-V CPU IP NX Class offers a 64-bit architecture engineered for high demand environments. This class is geared towards applications that require significant data throughput and processing capability. The NX Class IP thrives in systems where intensive computational processes and large data sets are handled. It employs a sophisticated architecture that allows for optimal resource management and efficiency, ensuring fast and reliable performance across diverse industries. With support for advanced RISC-V extensions, the IP delivers flexibility allowing modifications to fit user-specific requirements. Its robust design supports functional safety and enhanced security measures, making it ideal for critical systems in sectors demanding high reliability and performance. Whether for consumer devices or industrial use, the NX Class IP represents a cutting-edge solution for developers focused on creating competitive and future-ready products.
The Satellite Navigation SoC Integration offering by GNSS Sensor Ltd is a comprehensive solution designed to integrate sophisticated satellite navigation capabilities into System-on-Chip (SoC) architectures. It utilizes GNSS Sensor's proprietary VHDL library, which includes modules like the configurable GNSS engine, Fast Search Engine for satellite systems, and more, optimized for maximum CPU independence and flexibility. This SoC integration supports various satellite navigation systems like GPS, Glonass, and Galileo, with efficient hardware designs that allow it to process signals across multiple frequency bands. The solution emphasizes reduced development costs and streamlining the navigation module integration process. Leveraging FPGA platforms, GNSS Sensor's solution integrates intricate RF front-end components, allowing for a robust and adaptable GNSS receiver development. The system-on-chip solution ensures high performance, with features like firmware stored on ROM blocks, obviating the need for external memory.
iniDSP is a 16-bit DSP core optimized for a variety of applications requiring digital signal processing. The core is architected to offer high performance in signal processing tasks across different technology platforms, suitable for integration in both FPGA and ASIC implementations. It stands out due to its ability to handle complex mathematical functions effectively while maintaining low power consumption. This DSP core is structured to allow seamless integration into larger systems, providing flexibility and reliability. It is an excellent choice for developers seeking to enhance their products with sophisticated digital signal processing capabilities without extensive redesign efforts. The iniDSP can be employed in audio processing, control systems, and any application that benefits from efficient digital computation. Engineered to ensure both ease-of-use and robustness, the iniDSP core helps shorten the development cycle by offering pre-tested, reusable components tailored for rapid deployment. Its versatile nature supports a wide range of uses, making it a vital part of Inicore's offerings for innovative system solutions.
Focused on automotive applications and certified for ISO 26262 Functional Safety, the RISC-V CPU IP NA Class is a specialized offering for high-stakes environments such as vehicular systems. Its design is tailored to meet the rigorous safety standards required in the automotive industry, supporting ASIL-B and ASIL-D safety levels. The NA Class IP combines robust functionality with advanced safety measures, providing a reliable solution for implementing safety-critical tasks in next-generation automotive designs. With scalability at its core, it supports advanced RISC-V extensions and user-defined instruction sets, ensuring the adaptability of the IP to meet evolving industry standards and custom specifications. Through its comprehensive support of safety and performance features, the NA Class stands as a reliable building block for developers focusing on creating secure, high-performance automotive systems. Its cutting-edge design ensures it can handle the sophisticated demands of modern vehicles, from engine management to advanced driver-assistance systems (ADAS).
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