The Arora V series represents the second generation of the Arora FPGA family, boasting a rich array of internal resources. With a novel architecture and high-performance DSP blocks that support AI operations, these FPGAs also feature high-speed LVDS interfaces and ample BSRAM resources. Showcasing cutting-edge 22nm SRAM technology, these devices integrate high-speed SerDes interfaces ranging from 270 Mbps to 12.5 Gbps. Additionally, they include PCIe 2.1 hard cores supporting x1, x2, and x8 configurations, along with MIPI hard core modules reaching speeds of up to 2.5 Gbps. The FPGA is further equipped with DDR3 interfacing, capable of speeds up to 1333 Mbps.
The initial offering, the GW5AT-138FC676, provides a robust configuration including 138K LUT logic resources, 6.4MB of block RAM, and 1.1MB of distributed SRAM, coupled with advanced DSP blocks and an integrated ADC. Future models will expand the range with devices offering 25K (non-Serdes) and 60K LUT options.
Supported by GOWIN's EDA tool, these FPGAs create an efficient environment for FPGA hardware development, supporting multiple RTL programming languages, synthesis, placement and routing, bitstream generation and download, as well as power analysis and in-device logic analysis.
