The AES Crypto core by Dillon Engineering is designed to provide robust encryption and decryption capabilities, compliant with the Federal Information Processing Standard (FIPS) 197. This highly parameterized core supports a multitude of operating modes including ECB, CBC, CFB, OFB, and CTR as outlined in NIST special publication 800-38A.
Engineered to handle up to 12.8 Gb/s data throughput, this core manages dynamic key changes without affecting performance, ensuring secure data handling per advanced encryption standards. The core is versatile, offered in configurations that balance throughput and area, fulfilling diverse security demands.
Employing Dillon's ParaCore Architect, the AES Crypto core is adaptable to both FPGA and ASIC platforms, designed as a self-contained module with a comprehensive testbench. This core provides a seamless security solution for applications that demand high-speed encryption, effectively supporting secure communications and data protection in different deployment contexts.
