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Western Design Center, Inc.

Founded in 1978, the Western Design Center, Inc. (WDC) has pioneered the development of the 65xx microprocessor family, which has consistently adhered to its Instruction Set Architecture over the years. Their technology supports a wide array of electronic markets while demonstrating reliability and adaptability amidst continuous technological progress. This proven performance combined with a business philosophy focused on mutual benefit has played a vital role in the success of many companies. WDC is well-regarded for its intellectual property offerings, available in two versatile forms: GDSII Hard Core and Verilog RTL Soft Core. With these options, WDC provides tailored solutions fitting a range of design requirements, particularly for systems with varying voltage specifications. The hard cores are optimized for 5V and 3.3V systems, whereas the RTL soft cores cater to 3.3V and below, accommodating an array of FPGA technologies. In addition, WDC maintains strategic partnerships for ASIC manufacturing, offering conversions from FPGA designs to ASICs. The company is committed to rigorous specification processes and employs a library of validated circuit IPs, ensuring thorough design reviews and minimizing project risks. Their hands-on educational resources, including tutorials and development tools, highlight their commitment to supporting both industry professionals and academia. Through a trusted reputation built over decades, WDC has established itself as a reliable source for both standard and custom FPGA microcontrollers. Their involvement in various markets, from industrial systems to educational platforms, ensures that their technology meets the evolving needs of modern electronic applications. Read more

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IPs available

W65C02SOC-40 HDL SOC Design

The W65C02SOC-40 HDL SOC Design represents a robust solution in system-on-chip design, utilizing the renowned 65xx microprocessor architecture. This design is particularly valuable for applications requiring reliable microprocessor functionality within FPGA environments. The HDL SOC configuration allows for extensive customization, making it a suitable choice for complex electronic projects. Offering direct integration capabilities, the W65C02SOC-40 allows users to interface it with various peripherals and other IP cores seamlessly. Its addressable register architecture makes this process straightforward, ensuring minimal latency and higher performance in data handling and control tasks compared to more complex bus systems. The SOC design also supports efficient firmware development, facilitated by its 8-bit assembly and compatibility with widely-used C-compiler tools, making it versatile for both legacy and newer technology applications. Additionally, the design stands out due to its ability to implement FPGA-to-ASIC conversions, allowing for scalability and performance optimization where necessary. As part of the 65xx family, it equally excels in educational contexts, providing an effective learning platform for those studying microprocessor architecture and design. Its consistent performance across various FPGA families underlines its reliability and adaptability.

Western Design Center, Inc.

CPU, Microcontroller, Processor Core Dependent, Processor Core Independent, Processor Cores

W65C02SOL-28 PragmatIC HDL SOL Design

The W65C02SOL-28 PragmatIC HDL SOL Design is part of the WDC's soft-core offerings, optimized for efficient operation in programmable logic environments. This design showcases the flexibility of the 65xx microprocessor family, designed specifically to cater to the needs of pragmatic solutions requiring simple yet powerful logic configurations. With a focus on lower power consumption and smaller footprint, the W65C02SOL-28 is apt for systems that necessitate cost-effective implementations without compromising on the versatility or performance. The soft-core configuration of this design ensures it can cater to a variety of applications across different FPGA platforms. The architecture integrates a comprehensive addressable register system, simplifying connectivity with additional peripherals and IP cores, facilitating direct access to data and control functions. This results in a more responsive system with reduced bottlenecks typically associated with more complex bus architectures. Educators and developers alike will find this HDL SOL design manageable, offering support for efficient firmware development through 8-bit assembly alongside modern C-compiler tools. Its adaptability and ease of integration make it a valuable resource for educational environments and industry applications seeking streamlined development paths.

Western Design Center, Inc.

Building Blocks, CPU, Processor Core Dependent, Processor Cores

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