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Wasiela

Wasiela, known as Wireless Advanced System Innovations And Electronics Art, excels in developing IP cores primarily for forward error correction and the design of physical layers in wireless digital communications. Their offerings aim to provide chip manufacturers and design facilities with advanced PHY-layer IP, spanning from system and algorithm levels to practical implementation. Wasiela's products focus on delivering highly efficient algorithms to ensure their customers lead the market with top-notch performance. The company places emphasis on delivering flexible and low-power designs, tailored to enhance performance while maintaining configurability. Their Application Specific Instruction-set Processors (ASIPs) manifest as low-power and customizable architectures suitable for numerous applications. Wasiela's commitment to innovation is also evident in their digital design services for ASIC and FPGA implementations, which target communications receivers in consumer electronics sectors, particularly those involving OFDM systems. Wasiela garners distinction for its expertise in forward error correction and wireless communications physical layers, serving to optimize the capabilities of chip manufacturers. By equipping its clients with superior algorithmic solutions that maximize power efficiency without compromising performance, Wasiela cements its role as a leader in cutting-edge technology solutions in the semiconductor industry. Overall, their suite of services and products underscores a dedication to quality and performance, ensuring their clients stay at the forefront of technological advancements. Their strategic approach to product development proves essential in securing a competitive edge for their partners in various high-tech domains. Read more

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IPs available

802.11 LDPC

The 802.11 LDPC is a high-throughput solution designed for efficient wireless communication. This product supports frame-to-frame, on-the-fly configurations, offering flexibility in decoding iterations to balance throughput and error correction. It is engineered to conform to necessary performance specifications, ensuring optimal bit-error-rate and packet-error-rate performance in wireless networks. Functionality-wise, the design excels in meeting demanding throughput requirements while maintaining superior error correction capabilities. By allowing flexible configuration of LDPC decoding iterations, the product empowers users to tailor performance based on specific needs. This flexibility is essential for networks requiring dynamic adaptation to changing conditions or varying environmental factors. Technically, the 802.11 LDPC is crafted to integrate seamlessly into existing communication infrastructures, providing robust support for maintaining high data rates even under challenging conditions. Its unique ability to balance performance and energy efficiency makes it a preferred choice for modern wireless applications, strengthening connectivity reliability across multiple devices and environments.

Wasiela
TSMC
28nm
3GPP-5G, 3GPP-LTE, 802.11, Cryptography Cores, PLL, Wireless USB
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DVB-S2-LDPC-BCH

The DVB-S2-LDPC-BCH IP core is designed to meet the stringent requirements of satellite digital video broadcasting by offering a sophisticated forward error correction subsystem. This product leverages LDPC codes combined with BCH codes to facilitate near Shannon limit performance, ensuring quasi-error-free operation even under demanding transmission conditions. Key features include an irregular parity check matrix, layered decoding, and a minimum sum algorithm, all of which contribute to its high efficiency. The soft decision decoding mechanism further enhances performance through its ability to handle varying levels of noise and transmission errors. With full compliance to the ETSI EN 302 307-1 standards, this IP core guarantees compatibility with existing and future broadcasting standards. This solution delivers a complete package for implementing resilient communication links in satellite transmission systems. The product's ability to manage complex decoding tasks in a power-efficient manner significantly reduces operational costs, making it ideal for applications that require both high performance and energy savings.

Wasiela
TSMC
500nm
ATM / Utopia, Camera Interface, DDR, Digital Video Broadcast, DVB, Error Correction/Detection, H.263, H.264, VC-2 HQ
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