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EverOn is an ultra-low voltage SRAM developed by sureCore to cater to modern applications requiring extensive dynamic and static power savings. Built on the 40ULP BULK CMOS process, EverOn achieves up to 80% reductions in dynamic power utilization while cutting static power draw by 75%, making it highly efficient for IoT and wearable technology. Operational from 0.6V to 1.21V, EverOn supports a cycle time as short as 20MHz at its lowest voltage, scaling impressively to over 300MHz at its highest. This voltage scaling unlocks robust performance capabilities in energy-constrained environments, aligning with the trend towards increasingly sophisticated, low-power always-on devices. EverOn incorporates advanced techniques such as subdividing memory into banks for flexible power management and synchronized single-port operation, which enhances versatility. Its high-density bit cells facilitate reduced area footprints while the patented SMART-Assist technology ensures robust operation even at the retention voltage, supporting extended battery life applications in emerging markets.
MiniMiser articulates a revolutionary multi-port register file architecture designed with dual focuses on both low power and high performance. This product delivers over 50% reduction in power consumption, allowing developers to finely tune the power envelope through substituted standard register files with MiniMiser. Such power-saving measures help extend the design's practicality in spaces traditionally constrained by power budgets. With its stress on wide operating voltages and flexibility, MiniMiser effectively replaces standard bit cell implementations without the need for excessive clock domain adjustments, level shifters, or static timing analyses. It operates seamlessly in high-density environments where logic blocks interface and interim calculation storage is necessary, making it integral for AI-enhanced wearables. The product's architecture adapts to multiple performance modes assigning them to varying voltage levels, which keeps instantaneous power demands and total power use in check more effectively. Through these enhancements, MiniMiser innovatively cap size and energy requisites while improving the system's competitive sustainability via elongated recharge cycles and reduced thermal management overhead.
The PowerMiser is a pinnacle in low-power SRAM solutions, designed to cater to devices requiring extended battery life and minimal power consumption both when operating and in standby. Developed across several process technologies such as 28nm FDSOI and 22nm ULL bulk CMOS, PowerMiser demonstrates significant power savings, achieving up to 50% reduction in dynamic power while maintaining functionality over wide voltage ranges. With an ability to operate effectively at voltages as low as 0.7V and as high as 1.2V, PowerMiser facilitates flexible design adjustments for varying application needs without performance compromise. This SRAM compiler supports capacities as high as 576Kbit and word lengths up to 144 bits, featuring multiple multiplexing factors to provide designers with varied sizing options. Its innovative "Bit Line Voltage Control" further optimizes power usage, especially in retentive sleep modes offering quick awaken capabilities or deep sleep for maximum leakage savings. PowerMiser supports streamlined dynamic power efficiency suitable for critical applications like edge AI, where minimizing SRAM power usage is essential to product feasibility and competitiveness. Its architecture is geared towards future-focused designs, leveraging low power methodologies to meet contemporary low voltage operation demands in an increasingly battery-conscious world.
CryoIP represents sureCore's innovative approach to ultra-low temperature silicon solutions designed for the speculative yet promising field of quantum computing. This IP supports CryoCMOS, ensuring control electronics operate efficiently at temperatures reaching down to 4 K. Quantum Computing's requirements for extreme temperatures necessitate new solutions for both cabling and control electronics, often hindered by the substantial scale and density of qubits. CryoIP positions sureCore at the forefront of cryogenic electronic control, enabling the movement of electronic processes within the cryostat — a step critical for effective scaling of qubit numbers. The CryoIP architecture incorporates low power design principles in response to cryogenic demands, supporting streamlined dynamic and static power reductions of up to 50%. Collaborations with industry partners and foundries ensure CryoIP's readiness for integration into the next era of quantum computing, facilitating scalable and heat-efficient Cryo-CMOS. In combination with the CryoMem range, sureCore's CryoIP provides an expansive library of cryogenic control solutions, aiding in mitigating the challenges faced by scaling quantum systems, thus bridging the current technological gaps.
Building on the PowerMiser framework, PowerMiser Plus sets a new benchmark in ultra-low voltage SRAM solutions. This product line supports voltages as low as 0.45V without imperiling performance, allowing synergistic logic and memory operations within the same voltage tier. By maintaining minimal voltage differentials between the core array and peripheral supplies, PowerMiser Plus eliminates the need for level shifters, further enhancing power efficiency. In response to increasing market demands for longer device battery lives, especially in edge AI where SRAM consumption is substantial, PowerMiser Plus ensures optimal power savings by transitioning applications to operate at lower voltages while maintaining sufficient computational integrity. It employs an architecture that facilitates simultaneous adjustments in logic and SRAM voltages, improving overall device energy efficiency. PowerMiser Plus effectively addresses the challenges faced in power-conscious application spaces, where traditional solutions fail to meet stringent energy objectives. Its cutting-edge low-voltage expertise aids in catering to applications needing state-of-the-art power reduction strategies to achieve ambitious power budgets set within the industry.
sureCore introduces a silicon service suite, offering a complete package for low-power, next-gen device design, addressing power efficiency across multiple applications. Read more
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