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EverOn is a single-port ultra-low voltage SRAM solution that provides excellent power savings by substantially reducing both dynamic and static power needs. Developed on the 40ULP bulk CMOS process, this IP is tailored for cutting-edge applications in wearables and IoT devices, where power efficiency is crucial. EverOn operates across an extensive voltage range, from as low as 0.6V to 1.21V, ensuring it is versatile and adaptable for various applications. The IP is known for delivering remarkable power performance, cutting dynamic power consumption by up to 80% and static power by up to 75%. These capabilities make EverOn an ideal choice for energy-efficient designs that need to strike a balance between performance and power consumption. Moreover, it supports a wide operating frequency, commencing at 20MHz at the lower voltage threshold and exceeding 300MHz at higher voltages. EverOn integrates sureCore's SMART-Assist technology, which strengthens its operation down to the retention voltage. An innovative feature of this SRAM is its subdivided memory banks, allowing for flexible power management where each bank can function independently. This feature, alongside advanced sleep modes, enables tailored product performance according to specific operational requirements, ultimately extending battery life and enhancing overall product efficiency.
PowerMiser represents sureCore's effort to deliver an advanced low power SRAM solution that is particularly suitable for devices needing extended battery life. This SRAM IP is developed across several cutting-edge manufacturing processes such as 28nm FDSOI and 22nm ULL BULK CMOS. It boasts dynamic power savings of more than 50% and significant leakage power reductions. PowerMiser's architecture incorporates innovative techniques such as Bit Line Voltage Control, enhancing its ability to deliver optimal performance even at low voltages. In addition to achieving superior power efficiency, PowerMiser accommodates up to 576Kbit memory capacity with flexible word lengths thanks to its versatile compilers. These compilers facilitate design flexibility, automatically generating data sheets and facilitating integration with standard Electronic Design Automation (EDA) tools. Notably, PowerMiser also offers retentive sleep modes like light sleep for swift wake-up and deep-sleep for maximum power conservation. This SRAM solution is particularly valuable in markets responding to demands for longer battery lifecycles, such as in edge-AI applications that utilize extensive SRAM for pattern matching. PowerMiser sets a benchmark in ultra-low voltage operations, enabling significant power savings necessary to meet the stringent power targets required by such innovative applications.
CryoIP is an advanced range of semiconductor solutions designed to operate efficiently at cryogenic temperatures ideal for Quantum Computing (QC) applications. This IP enables the development of CryoCMOS control chips that can be integrated closely with qubits within the cryostat, reducing the extent and performance constraints of cabling traditionally required for connection with control electronics at room temperature. Key hurdles in QC include vast control cabling and heat generation, both of which are exacerbated as qubits scale into thousands. CryoIP addresses these challenges by designing electronics that perform optimally within the cryostat, reducing cabling needs and minimizing heat dissipation with low power design techniques. These efforts are crucial for mitigating scaling barriers in large quantum systems. sureCore, leveraging its proficiency in ultra-low power memory IP, pioneers the CryoIP to bridge the gap between current and future QC technology needs. This development is critical in creating cost-effective cryogenic control ASICs for the quantum sector. CryoIP offers a robust platform for cryogenic control ICs that aids in advancing QC technology by enhancing performance and reducing barriers to scalability.
CompuRAM introduces in-memory computing to enhance power efficiency for edge computing solutions, a critical component for IoT devices where processing is necessary within the device rather than offloaded to a server. This ensures low latency and reduces the connectivity overhead while enabling advanced AI processing directly on the device. The integration of computing operations directly within the memory array epitomizes sureCore's commitment to advanced power savings, ensuring the data manipulation occurs close to the memory components. Such architectural advancements pave the way for substantial reductions in power consumption and improved performance throughput. CompuRAM is built upon sureCore’s foundation of low-power memory solutions like EverOn and PowerMiser, translating these power-saving principles into a memory array capable of arithmetic operations. This IP aligns with the industry's trajectory towards integrating AI capabilities at the edge, presenting a future-proof solution that meets the power and performance demands of next-generation smart devices.
MiniMiser is a versatile and adjustable multi-port register file architecture designed for both low power and high-performance applications. This architecture is distinct for its ability to significantly reduce power consumption by over 50%, offering developers a novel method to optimize power usage. MiniMiser enables the implementation of multiple performance modes aligned with varying operating voltages, making sure it aligns with specific application needs. Designed without reliance on foundry bit cells, MiniMiser's single-rail design allows seamless connection with system logic. This eliminates common design complexities such as static timing analysis challenges and level shifters, facilitating easier integration within SoC architectures. As wearable technologies and AI capabilities grow, the demand for integrated memory to support computational demands rises, making efficient use of power more critical. MiniMiser's contribution is in its ability to bridge the gap between typical performance norms and the need for multiple read/write ports and high-performance requirements often associated with power-efficient register storage solutions. The architecture deftly maneuvers around conventional limitations by delivering robust power and area savings, accommodating the ever-increasing AI integration demands in wearable devices and beyond.
sureCore introduces a silicon service suite, offering a complete package for low-power, next-gen device design, addressing power efficiency across multiple applications. Read more
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