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The InfiniBand Transport Layer Core is engineered to deliver exceptional performance in data handling and high-bandwidth applications. Suitable for Data Acquisition and High-Performance Computing, it supports advanced UC SEND and RDMA Write operations across one to eight virtual lanes with up to 1024 Queue Pairs. This core is pivotal for creating powerful Target Channel Adapters, enabling efficient data transfer with minimal latency. Its versatility supports a range of applications like bridging PCI to InfiniBand and integrating with various high-speed data protocols.
Designed for robust data throughput, the InfiniBand DDR Link Layer Core offers enhanced speed and efficiency for data-centric applications. Operating at 250 MHz, it supports bidirectional speeds up to 20 Gbits per second and requires a 5 GHz SerDes for optimal performance. This core is utilized in advanced Xilinx and Altera FPGA platforms and is suitable for a variety of ASIC applications. With support for medium speed grades, it integrates seamlessly into existing systems, providing a reliable backbone for high-performance data transmission applications.
The Xilinx FPGA Test Patterns by Polybus facilitate extensive testing for Xilinx FPGAs, enhancing the detection of defects and bolstering system reliability. This customizable suite includes over 400 test patterns designed to evaluate both the internal functionality and the extensive interconnects of FPGAs, far surpassing traditional manufacturer tests in coverage. By running these tests in-system, users can ensure the future upgradeability and robustness of their FPGA installations, minimizing the risk associated with field upgrades and handling defects.
The InfiniBand QDR Link Layer Core is tailored for extreme data environments, operating at up to 500 MHz in ASICs and 250 MHz in FPGAs. It supports multiple data rates, including 1X, 4X, and 8X QDR operation, facilitating versatility in deployment. Suitable for both Xilinx and Altera platforms, the core is integral to systems requiring fast, efficient data handling capabilities. With an embedded PCS Layer, this core also accommodates high-speed SerDes interfaces, crucial for maintaining low-latency and high-throughput data processes in demanding networking systems.
The InfiniBand SDR Link Layer Core is engineered to facilitate high-speed data transfer in modern high-performance computing environments. This smaller core operates at a frequency of 125 MHz and achieves bidirectional data rates of 10 Gbits per second, making it ideal for FPGA and ASIC deployments. It supports popular FPGA platforms including Xilinx Virtex and Altera Stratix, ensuring broad compatibility and flexibility in various system configurations. With capabilities to operate in lower speed grades, it efficiently supports a range of applications while maintaining performance integrity.
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