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TwinBit Gen-1 is NSCore's pioneering solution in embedded non-volatile memory technology, optimized for seamless integration into CMOS logic processes across nodes ranging from 180nm to 55nm. Known for its robust endurance performance, it supports over 10,000 program/erase cycles, making it highly reliable for repeated usage. This IP is designed without necessitating any additional masks or process steps, which aligns with NSCore’s ethos of simplifying the integration process. TwinBit Gen-1's flexible memory configuration, spanning 64 bits up to 512K bits, ensures its applicability in a wide array of domains. From enabling secure key storage to supporting analog trimming and system switches on ASICs/ASSPs, it offers a broad spectrum of functional capabilities, making it ideally suited for modern IoT devices and embedded systems. With built-in test circuits that facilitate stress-free test environments and automotive-grade reliability, TwinBit Gen-1 presents a formidable option for applications that demand low-voltage and low-power operations. Its alignment with standard IPs and lack of additional process overhead also contribute to its attractive development turnaround time and cost-effectiveness.
PermSRAM is a highly adaptive nonvolatile memory macro designed to operate on standard CMOS fabrication processes. It supports a variety of process nodes ranging from 180nm to 28nm and beyond. One of its key features is its ability to offer diverse functionalities such as one-time programmable ROM and pseudo multi-time PROM, along with a multipage configuration that greatly broadens its utility across different applications. A prominent attribute of PermSRAM is its security-oriented design. It incorporates a non-rewritable hardware safety lock for secure code storage, which ensures data integrity and tamper resistance. This product caters to a wide span of memory sizes, from 64 bits to a robust 512K bits, accommodating both minimal and extensive data storage requirements. PermSRAM's inherently stable yield and reliability are complemented by its automotive-grade data retention, making it ideal for demanding applications that require long-term data retention capability at high temperatures. Furthermore, it operates efficiently without the need for a charge pump in read operations, offering significant efficiency and area savings.
TwinBit Gen-2 represents the next evolution in NSCore's non-volatile memory offering, supporting process nodes from 40nm to 22nm and beyond. Maintaining the foundational benefits of its predecessor, TwinBit Gen-2 further elevates its efficiency with the inclusion of the Pch Schottky Non-Volatile Memory Cell, which facilitates ultra-low-power operations without additional masks or process steps. The Gen-2 variant is engineered with an increased focus on minimizing power consumption while ensuring strong functional performance. It is adept at handling a wide range of program/erase dynamics through controlled hot carrier injection, offering refined operational flexibility for diverse applications. This memory technology serves applications requiring robust data management in tightly constrained power scenarios. Like its predecessor, TwinBit Gen-2 excels in environments demanding longevity and durability, boasting comprehensive integration flexibility into existing systems. Its ability to harmonize cutting-edge non-volatile memory design with the demands of smaller process nodes makes it highly beneficial for forward-looking applications.
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