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The H.265 HEVC Decoder System by Korusys offers an ultra-low latency and robust solution for decoding HEVC video streams, fully compliant with the ITU-T H.265 standard. Tailored for Intel FPGA platforms, this decoder fits a wide range of applications from high-end broadcast to consumer electronics. It supports high-definition video resolutions up to 4K with efficient error concealment features. The solution is available as a standalone IP core or as part of a comprehensive package with added design services for optimal implementation. Its flexible architecture is designed to support various video profiles and output configurations.
Korusys' Video Wall Display Management System is a sophisticated solution for managing multiple video outputs from a single source. Designed to support digital signage and public information displays, it processes HDMI or Display Port video inputs and synchronizes their display across up to four monitors. The system is customizable and scalable, allowing for various configurations like cloning or spanning inputs across multiple outputs. This flexibility, combined with bezel compensation and EDID parsing, ensures flawless display arrangement and resolution support, making it ideal for both large-scale and small-scale video wall applications.
The SMPTE 2059-2 Synchronization Solution by Korusys is engineered for synchronizing video and audio signals over IP networks. This involves using an FPGA to implement the necessary logic to align signals with a reference PTP time source and associated clock. The solution is designed for professional broadcast environments, promising high accuracy, low latency synchronization, and ease of integration. It employs advanced software algorithms alongside precise FPGA timestamping, providing a flexible, small footprint solution that is easy to deploy. An API adds further configuration ease, supporting various framerates and timecode generation upon receiving a PTP time source.
The IEEE1588 Precision Time Protocol Solution offers a scalable and flexible system for precision timekeeping across networked devices. Designed with plug-and-play features, it accommodates configurations such as a Line Rate Master supporting up to 4000 slaves and fully compliant IEEE1588v2 slave functionalities. The solution's adaptability allows it to fit seamlessly into various systems, supported by robust simulation tools that test timing recovery algorithms against real-world network conditions. This comprehensive solution is ideal for environments requiring precise time synchronization, making it a key feature in network infrastructure.
The 12G-SDI Playback and Capture System is a versatile FPGA-based solution designed for video capture and playback over Quad 3G-SDI interfaces. The system includes an FPGA image set for generating test patterns, capturing data from SDI inputs, and playing back over SDI. It can be integrated with a PCIe interface for enhanced performance in host machines, featuring Linux-based software and drivers to facilitate video processing. This IP core is available independently or paired with the High Performance FPGA PCIe Accelerator Card, offering a robust solution for applications requiring high-definition video handling and processing.
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