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The NuLink Die-to-Die PHY for Standard Packaging by Eliyan is engineered to facilitate superior die-to-die interconnectivity on standard organic/laminate package substrates. This innovative PHY IP supports key industry standards such as UCIe and BoW, and includes proprietary technologies like UMI and SBD. The NuLink PHY delivers leading performance and power efficiency, comparable to advanced packaging technologies, but at a fraction of the cost. It features configurations with up to 64 data lanes, supporting a data rate per lane of up to 64Gbps, making it ideal for applications demanding high bandwidth and low latency. The implementation enhances system design while reducing the necessary area and thermal load, which significantly eases integration into existing hardware ecosystems.
Designed for aiding seamless integration with memory systems, Eliyan's NuLink Die-to-Memory PHY products provide robust solutions for breaking the memory wall in high-performance computing and AI systems. These PHY products advocate the use of simultaneous bidirectional (SBD) signaling, improving efficiency by allowing data to be transmitted and received simultaneously, doubling the bandwidth capacity instantly. NuLink technology excels in configuring lanes for unidirectional and half-duplex bidirectional signaling, all on standard organic packaging with bump pitches starting at 90um. Eliyan's NuLink PHY expands memory bandwidth without necessitating advanced packaging like silicon interposers, making it a cost-effective solution for implementing universal memory interfaces. These interfaces further enhance interoperability across various memory types and settings, ensuring superior performance and flexibility.
Exploring the nuances of UCIe 2.0, its optional features, and the evolving chiplet marketplace. Read more
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