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The Ultra-Low Latency 10G Ethernet MAC IP core by Chevin Technology exemplifies cutting-edge design for high-speed network communications, catered specifically to deliver the lowest possible latency. It is meticulously constructed to meet the demands of applications that require minimal delay in data exchange, thus maximising data throughput. The IP core is finely tuned for deployment in FPGAs, optimizing the balance between performance and resource utilization. Benefiting from a streamlined logic architecture, this IP core enhances the efficiency of hardware accelerations and simplifies the incorporation of Ethernet connectivity into customer systems. Its fundamental construction is rooted in Chevin’s extensive experience with Ethernet technologies and it has been thoroughly tested to ensure reliable operation across a diverse range of settings. This Ethernet MAC utilises all-logic architecture which removes need for additional CPU or software intervention, providing immense power savings and reduced system complexity. Features like programmable interframe gap control and flexible licensing allow for the tailored installation in both traditional and contemporary systems. The combination of robust performance capabilities alongside expert support creates a compelling choice for integrators focused on high-speed, low-latency Ethernet solutions.
The 10G Ethernet MAC and PCS IP core from Chevin Technology is crafted to ensure seamless integration of high-speed Ethernet connectivity within FPGA platforms. This solution underscores Chevin Technology’s commitment to providing adaptable and resource-efficient Ethernet IP cores. Supporting a range of interfaces, it optimizes the synthesis of duplex 10Gbit/s Ethernet, making it ideal for implementation in systems that require high data throughput. The integration process is made effortless through detailed user guides and expert support, making it possible to incorporate this IP into varied FPGA platforms effectively. Its low-latency architecture supports high-performance communications while occupying minimal FPGA resources. Designed in accordance with IEEE 802.3 standards, this MAC/PCS core facilitates transmitting and receiving data at unrivalled speeds. The compact design ensures that broader functionalities and additional IP can comfortably reside on the FPGA, thereby enriching the application possibilities without inflating costs. Streamlining data transfer processes, the core offers flexible licensing to support various project needs, providing an unparalleled level of adaptability. With strategically laid out features that include CRC32 error detection and correction capabilities, the 10G Ethernet MAC and PCS IP core supports rapid data transfers while maintaining reliability. It incorporates advanced fault management and statistics blocks for detailed operational insights and robust performance monitoring. The core is compatible with leading industry boards and comes equipped with all necessary integrations to ensure optimal functionality across various platforms.
The TCP/IP Offload Engine developed by Chevin Technology represents a leap forward in securing fast, reliable connectivity for any FPGA application. By utilizing the efficient, all-RTL architecture, it offloads the TCP/IP stack directly onto the FPGA, thereby reserving critical CPU resources for other tasks. This innovative approach results in considerably enhanced data transfer speeds and reduced jitter. Supporting up to 256 simultaneous connections, this IP core offers configurable server and client roles across each connection. This creates a dynamic platform on which network communications can be built, facilitating the automatic establishment and tear-down of connections, and thereby greatly reducing operational overhead. This capability is useful in creating scalable, flexible systems that can accommodate fluctuating loads and diverse networking needs. Engineered to easily integrate with other protocols, the TCP/IP Offload Engine supports ARP/ICMP layers, providing a comprehensive solution for FPGA-based network applications. Its design prioritizes key performance metrics including low latency and high sustained throughput, ensuring that communications remain seamless regardless of underlying architectural complexities. For developers, this translates into a product that is not only in alignment with advanced communication standards but also one that is simpler to deploy and maintain.
Chevin Technology’s UDP/IP Offload Engine is designed to streamline communication processes where high throughput is critical, but some data loss is permissible. This User Datagram Protocol (UDP) based solution is optimized for environments requiring rapid data cycling, such as video streaming or live audio broadcasting. Engineered for low latency, this IP core allows for large datagram transmission via optional de-fragmentation, deftly handling packet transfer without confirmation, thereby minimizing bandwidth overhead. The IP core is adaptable, supporting interface with commonly used FPGAs, specifically compatible with Intel and AMD designs, to facilitate simple adoption into existing architectures. This core ensures seamless integration and assembly of complete Ethernet frames, simplifying setup and reducing deployment time. Its compatibility extends to various reference boards, provisioning deep support for expedited integration. Incorporated into the UDP queue are functionalities like checksum verification and de-fragmentation capabilities, thus enhancing integrity and compression of packeted data. It also features adaptable port management, capable of handling thousands of ports with flexible filtering. These capabilities underscore its adaptability across a series of high-performance use cases, offering substantial support for integrators aiming for a customizable, yet robust network communication platform.
The HMAC–SHA256 Accelerator from Chevin Technology offers a robust method for generating and verifying message authentication codes effectively. This hardware-based solution is ideal for sectors like cybersecurity, defense, and aerospace, where message integrity and authentication are crucial. Integrated seamlessly into hardware environments, it supports the protective transport of data by constructing HMAC keyed-hash message authentication codes. This IP solution is optimal when you demand high throughput that standard CPUs cannot provide reliably. It is a highly flexible architecture, accommodating multiple channels and supporting any message length up to hardware limits. The incorporated AXI4 streaming interface ensures compatibility with existing system protocols, fostering accelerated data throughput and ensuring secure streams with minimal latency. Engineered to work independently of external CPUs, the HMAC-SHA256 Accelerator saves power and significantly reduces the processing overhead by handling cryptographic operations within FPGA structures. The high-performance, all-RTL security architecture minimizes risk from attacks like cloning or hacking, while guaranteeing compliance with various cryptographic standards including NIST specifications, thereby making it a trusted solution for secure communications and data integrity assurance.
Chevin Technology’s ChevinID™ Silicon Security Solution addresses pressing cybersecurity challenges within the silicon production ecosystem by empowering the selection, control, and authentication of hardware and software functions. It intelligently manages and identifies both intentional and unintentional changes during the production processes, providing a secure root of trust for FPGAs, ASICs, and Chiplets. ChevinID bridges security across various vendor platforms, showcasing its flexibility and applicability in diverse hardware configurations. Integrators can use this technology to create a robust security fabric across multiple devices and firmware versions. It thrives within systems that require continuous management and adaptation, like those using distributed computing or cloud-hosted server solutions. Additionally, Chalked up for its robust additional layer of silicon security, ChevinID supports intricate feature control and modification, allowing developers to securely maximize the potential of their integrated circuits. By simplifying software configuration and management, ChevinID resoundingly streamlines the security across diverse project landscapes, reducing the complexity associated with multi-vendor environments.
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