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Active-HDL is a powerful Windows-based environment for FPGA design creation and simulation. It is tailored for team-centric development, providing an integrated design suite complete with HDL and graphical design tools. Supporting rapid design verification and debugging, Active-HDL ensures a smooth and efficient workflow for designers.
HES-DVM offers a comprehensive environment for hybrid verification and validation of SoC and ASIC designs, capable of handling up to 633 million ASIC gates. It supports bit-level simulation acceleration, hardware prototyping, and virtual modeling through advanced co-emulation. This platform is integral for developers requiring scalability and flexibility in design validation.
Riviera-PRO is engineered to meet the high demands of FPGA and SoC verification. Combining advanced debugging capabilities and an efficient simulation engine, it maximizes testbench productivity, reusability, and automation. Riviera-PRO is ideal for engineers developing cutting-edge devices, ensuring reliability and performance in verification.
ALINT-PRO is a specialized RTL design verification solution, designed to minimize issues in your RTL code. It addresses mismatches in RTL and post-synthesis simulation, enhances code portability, and ensures code is optimized for synthesis. ALINT-PRO facilitates a smoother path through the various stages of design with its comprehensive analysis capabilities.
Spec-TRACER is a requirements lifecycle management tool crafted for FPGA and ASIC designs. It simplifies the capture, management, analysis, traceability, and reporting of requirements, supporting robust lifecycle management from inception to completion. This tool ensures that design specifications are met, facilitating compliance and reducing the potential for development errors.
TySOM Boards are a series of embedded system prototyping boards, featuring FPGAs at the core, including Xilinx Zynq and Microchip PolarFire SoC options. The boards support a wide range of industry-standard interfaces, making them versatile for rapid application development in areas like automotive, artificial intelligence, machine learning, and industrial automation.
HES Proto-AXI is a software package that, when combined with HES prototyping boards, provides a robust environment for rapid design prototyping or algorithm accelerator development. It offers a seamless design and testing framework that supports the rapid integration of designs, ensuring quick time-to-market for new products.
Supporting telecommand applications, this LDPC encoder and decoder adheres to CCSDS standards. It provides exceptional error correction with schemes that cater to the demanding requirements of telecommand and other applications with significant forward error correction needs. Available for both ASIC and FPGA implementations, its flexible design supports a range of configurations.
The 5G LDPC Decoder, compliant with 5th generation mobile broadband standards, employs a new rate-compatible structure for LDPC codes. Offering high flexibility, it provides high throughput and low latency, essential for meeting the broad applications supported by 5G standards. This decoder is vital for applications requiring robust and efficient error correction.
The AWGN Channel generator delivers hardware-based noise generation, addressing performance evaluation needs in digital communication systems. This generator supports up to 512 parallel symbols, significantly reducing the evaluation time compared to software-based solutions. It's designed for benchmarking communication systems characterized by very low bit-error-rates.
This modulator performs essential tasks for an inner transmitter in communication systems, handling SCCC encoded frames for tasks like mapping and modulation. Designed for high-performance environments, it incorporates baseband interpolation and gain adjustment functionalities, making it ideal for satellite communications and other demanding applications.
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