Chip Talk > Wafer-Level Innovation: The High-Stakes Race Between TSMC and Intel
Published May 02, 2025
In the ever-advancing world of semiconductor technology, packaging plays a pivotal role in enhancing chip efficiency and performance. TSMC and Intel, industry titans, are ramping up their efforts in wafer-level packaging—a battleground where innovations like CoWoS (Chip on Wafer on Substrate) and Foveros are being refined. Here's a closer look at how these giants are defining the future of this critical technology area as detailed by TrendForce.
Taiwan Semiconductor Manufacturing Company (TSMC) is a trailblazer in semiconductor production, continuously pushing the envelope of what's possible. At their recent North America Technology Symposium, TSMC's CoWoS roadmap revealed plans to scale up interposer sizes dramatically. As captured in Tom’s Hardware, they intend to push towards 9.5X reticle sizes by 2027, facilitating packages with 12 or more HBM (High Bandwidth Memory) stacks. Such advancements are crucial for meeting the computational demands of AI-driven applications.
On the other side of the spectral divide, Intel isn't resting. Their Foundry Direct Connect event highlighted expansions in Foveros, their advanced 3D packaging solution. Intel aims to bolster output at its New Mexico site by 30%, signaling an intention to challenge TSMC's CoWoS dominance. Commercial Times reports that Intel's advancement in this space will introduce variants like Foveros-R and Foveros-B, designed to align with their roadmap to double its capacity by implementing hybrid bonding and EMIB technology.
This competition between TSMC and Intel is more than a battle of wafer size. It represents a race to excel in integrating AI-enabled features seamlessly into commercial products. Companies like NVIDIA have already shown interest in TSMC’s 5nm CoWoS-L packaging for their B300 series, as per a mention in Commercial Times. This high-stakes technological chess game not only positions these companies at the forefront of semiconductor innovation but also sets the stage for next-generation devices expected in the consumer and enterprise markets.
In the world of semiconductors, where innovation arcs steeply upwards, TSMC and Intel are not just competitors but also critical enablers of technology that will drive the next phase of digital evolution. With CoWoS and Foveros at the heart of their respective arsenals, the coming decade will likely see these packaging technologies emerge as the linchpin for future innovations in computing hardware. To delve deeper into the strategic developments of these organizations, you can explore the detailed interviews and analyses available at Commercial Times.
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