In a significant stride toward advancing semiconductor technology, Synopsys, Inc. announced an enhanced collaboration with Samsung Foundry on June 16, 2025, aimed at accelerating AI and multi-die design innovation on Samsung’s advanced process nodes. This partnership leverages Synopsys’ cutting-edge AI-driven electronic design automation (EDA) tools and intellectual property (IP) portfolio alongside Samsung’s state-of-the-art manufacturing processes to empower the next generation of chip designs for edge AI, high-performance computing (HPC), and broader AI applications. This blog post delves into the details of this collaboration, its impacts, and why it matters in the rapidly evolving semiconductor landscape.

The Collaboration: Synopsys and Samsung Foundry

Synopsys, a leader in EDA software and IP solutions, and Samsung Foundry, a global powerhouse in semiconductor manufacturing, have a decades-long partnership that continues to push the boundaries of chip design. Their latest collaboration focuses on enabling mutual customers to achieve successful tape-outs—final design validations before manufacturing—of complex multi-die systems using Synopsys’ 3DIC Compiler and Samsung’s advanced packaging technologies, such as the SF2P and SF4X process nodes. A notable milestone is the successful tape-out of an HBM3 (High Bandwidth Memory) design on Samsung’s SF2 process, which reduced turnaround time by an impressive 10X.

The partnership integrates Synopsys’ AI-driven EDA suite, Synopsys.ai™, with Samsung’s advanced foundry processes to optimize power, performance, and area (PPA)—key metrics for chip efficiency. Certification of Synopsys’ digital and analog flows on Samsung’s SF2P process, enhanced by hypercells for more efficient standard cell space usage, enables designers to create differentiated system-on-chips (SoCs) with superior performance. Additionally, Synopsys has expanded its IP portfolio, including high-speed interfaces like 224G, UCIe, MIPI, and LPDDR6, tailored for Samsung’s SF2P and SF4X nodes, supporting applications from HPC to automotive markets.

Key Highlights of the Collaboration

1. AI-Driven Design Optimization: Synopsys’ AI-powered tools, such as the Synopsys.ai suite and PrimeSim™ (a GPU-accelerated SPICE simulator), enable faster and more efficient chip design. For instance, PrimeSim achieves up to a 15X speed-up with NVIDIA’s GH200 Superchips, projected to reach 30X with NVIDIA’s Grace Blackwell platform. This acceleration is critical for handling the complexity of advanced AI chips.
2. Multi-Die Design Innovation: The Synopsys 3DIC Compiler facilitates the integration of multiple dies into a single package, a critical approach for scaling performance in AI and HPC applications. The successful HBM3 tape-out on Samsung’s SF2 process demonstrates the capability to reduce design turnaround time significantly, enabling faster time-to-market.
3. Certified EDA Flows: Synopsys’ digital and analog flows are certified for Samsung’s SF2 and SF2P processes, incorporating AI-driven design technology co-optimization (DTCO). This ensures optimized PPA, reduced integration risks, and reliable performance for complex SoCs and chiplets.
4. Expanded IP Portfolio: Synopsys offers a comprehensive IP portfolio, including high-speed interfaces (224G, PCIe 7.0, USB4), embedded memories, logic libraries, and security IP, optimized for Samsung’s advanced nodes. This portfolio supports diverse applications, from mobile devices and IoT to automotive systems.
5. Analog In-Memory Computing: Synopsys’ advancements in analog in-memory computing (AIMC), recognized by the 2025 Frost & Sullivan Global Technology Innovation Leadership Award, position it as a leader in energy-efficient AI chip design. Tools like Synopsys ASO.ai™ enable rapid analog IP migration, while mixed-signal flows offer 5X to 10X faster verification.

Impacts of the Collaboration

The Synopsys-Samsung collaboration has far-reaching implications for the semiconductor industry and beyond:

1. Accelerated Time-to-Market: By reducing design turnaround time by up to 10X, as demonstrated with the HBM3 tape-out, this partnership enables chipmakers to bring products to market faster, a critical advantage in the competitive AI and HPC markets.
2. Enhanced Chip Performance and Efficiency: The integration of AI-driven EDA tools and advanced process nodes improves PPA, allowing for chips that are more powerful, energy-efficient, and compact. This is particularly vital for edge AI devices, where low power consumption is essential.
3. Support for Diverse Applications: The collaboration supports a wide range of industries, including consumer electronics, automotive, IoT, and HPC. For example, automotive applications benefit from reliable, high-performance chips for autonomous driving systems, while HPC applications power data centers and AI training platforms.
4. Geopolitical Resilience: The partnership helps mitigate risks from geopolitical tensions, such as U.S.-China trade restrictions. By diversifying supply chains and leveraging Samsung’s advanced foundry capabilities, Synopsys enables customers to navigate regulatory challenges. Notably, the U.S. Department of Commerce rescinded export restrictions on Synopsys on July 2, 2025, restoring access to previously restricted markets.
5. Financial Growth: Synopsys reported a 10% year-over-year revenue increase to $1.6 billion in Q2 FY 2025, with Design IP revenue surging 21%. This growth reflects the market’s demand for advanced EDA solutions and IP, underscoring the collaboration’s economic impact.

Why It Matters

The Synopsys-Samsung collaboration is a cornerstone of the semiconductor industry’s evolution in the AI era. Here’s why it matters:

1. Driving the AI Revolution: AI applications, from edge devices like smartphones to large-scale HPC systems, require chips with unprecedented performance and efficiency. This partnership enables the design of such chips, fueling advancements in AI-driven technologies like autonomous vehicles, smart cities, and generative AI models.
2. Enabling Multi-Die Architectures: As Moore’s Law slows, multi-die systems (chiplets) offer a path to scale performance by integrating multiple specialized dies. Synopsys’ 3DIC Compiler and Samsung’s advanced packaging technologies make this approach viable, addressing the growing complexity of modern chip designs.
3. Competitive Edge in a Crowded Market: The semiconductor industry is highly competitive, with players like TSMC, SK Hynix, and Micron vying for dominance. Samsung’s foundry business, despite challenges like a 39% profit drop in Q2 2025 due to AI chip delays and U.S. export curbs, stands to rebound with improved HBM shipments and partnerships like this one. Synopsys’ tools give Samsung’s customers a competitive edge by minimizing integration risks and optimizing performance.
4. Sustainability and Efficiency: AI-driven design tools optimize power consumption, aligning with global sustainability goals. Synopsys’ advancements in analog in-memory computing further enhance energy efficiency, critical for reducing the environmental footprint of data centers and edge devices.
5. Economic and Strategic Implications: The collaboration strengthens Synopsys’ market position, as evidenced by Goldman Sachs’ Buy rating with a $620 price target. It also reinforces Samsung’s role as a leading foundry, despite recent challenges, positioning both companies as key players in the global semiconductor supply chain.

Challenges and Considerations

While the collaboration is promising, it faces challenges:

1. Geopolitical Risks: Recent U.S. export restrictions related to China, though rescinded for Synopsys, highlight the volatility of global trade policies. These restrictions impacted Samsung’s foundry utilization and inventory, underscoring the need for diversified supply chains.
2. Competition: Competitors like Cadence, which also collaborates with Samsung on AI-driven SoC and chiplet designs, pose a challenge. Synopsys must continue innovating to maintain its leadership in EDA and IP solutions.
3. HBM Certification Delays: Samsung’s delay in HBM3E chip certification with NVIDIA until September 2025 has affected its competitiveness. Synopsys’ tools can help mitigate such delays by streamlining design processes, but market dynamics remain a factor.

Conclusion

The Synopsys-Samsung Foundry collaboration is a game-changer for the semiconductor industry, driving innovation in AI and multi-die designs. By combining Synopsys’ AI-driven EDA tools and expansive IP portfolio with Samsung’s advanced manufacturing processes, the partnership empowers chipmakers to create high-performance, energy-efficient chips for a wide range of applications. Its impacts—faster time-to-market, optimized PPA, and support for diverse industries—position it as a critical enabler of the AI revolution. Despite challenges like geopolitical risks and competition, the collaboration’s strategic importance and technological advancements make it a pivotal force in shaping the future of semiconductors. As Synopsys Senior Vice President John Koeter noted, the AI chip industry is only in its “second inning,” with vast potential yet to be realized.

Sources

1. Synopsys News Release: Synopsys Accelerates AI and Multi-Die Design Innovation on Advanced Samsung Foundry Processes
2. Synopsys: Samsung Foundry Collaboration
3. Samsung Electronics Q2 2025 Earnings
4. Synopsys Q2 FY 2025 Financial Results
5. U.S. Department of Commerce Export Restriction Updates