The semiconductor industry is undergoing a structural transformation—both literally and architecturally. As Moore’s Law slows and transistor scaling becomes more complex and costly, innovation is shifting toward advanced packaging, chiplet integration, and system-level optimization.

One such innovation just received a major boost: Keysight Technologies and Intel Foundry have announced a collaboration to accelerate the validation and deployment of Intel’s next-generation EMIB-T (Embedded Multi-Die Interconnect Bridge with Through-Silicon Vias) silicon bridge technology.

At Silicon Hub, we view this as more than a packaging breakthrough. It represents a strategic pivot in how high-performance chips—particularly those for AI and data centers—are going to be built, validated, and scaled.

🔍 What is EMIB-T and Why It Matters

EMIB-T combines the strengths of Intel’s EMIB (which uses a high-density bridge embedded in the substrate for die-to-die connectivity) with through-silicon vias (TSVs) for vertical signal and power delivery. The result is a high-bandwidth, low-latency interconnect solution that delivers near-monolithic performance—without the yield and cost risks of a large, monolithic die.

Key advantages of EMIB-T include:

1. High Density Die-to-Die Connectivity: Comparable to silicon interposers but more cost-effective
2. Scalability: Enables modular integration of multiple dies—logic, memory, accelerators, IO—into one package
3. Thermal Efficiency: TSVs allow for better heat dissipation and power distribution
4. Design Flexibility: Supports heterogeneous integration across different process nodes and foundries

🧪 Keysight’s Role: Fast-Tracking Validation and Simulation

Keysight brings its expertise in electromagnetic simulation, power integrity, and signal integrity modeling to the table. For EMIB-T to be widely adopted, packaging engineers and SoC architects need reliable tools to simulate complex 3D interconnects, optimize performance, and avoid late-stage failures.

Through this partnership, Keysight EDA tools will integrate with Intel Foundry’s EMIB-T design flow, enabling:

1. Faster time-to-validation through advanced 3D EM and SI/PI co-simulation
2. Improved design confidence in AI and high-speed computing systems
3. Accelerated ecosystem adoption of Intel Foundry packaging technologies

🧠 Strategic Impact on the Industry

From our vantage point at Silicon Hub, the Keysight–Intel Foundry collaboration on EMIB-T is pivotal for several reasons:

1. Lays the Foundation for Next-Gen AI and Data Center Chips

EMIB-T enables the assembly of massive compute engines from multiple chiplets—critical for training large language models, processing real-time inference, and handling memory-intensive workloads.

2. Strengthens Intel Foundry’s Position as a Full-Stack Competitor

By pushing innovation not only at the transistor level (RibbonFET, PowerVia) but also at the packaging level (EMIB, Foveros, and now EMIB-T), Intel is building a compelling value proposition for design customers seeking performance, flexibility, and ecosystem maturity.

3. Opens the Door for Multi-Vendor Collaboration

EMIB-T supports multi-die, multi-node packaging—making it ideal for systems built with IP from different vendors. This aligns well with Silicon Hub’s mission of enabling AI-powered discovery and integration of diverse IP blocks across complex design stacks.

4. Accelerates Time-to-Silicon

With simulation and co-design tools integrated into the flow early on, system architects can catch issues faster, reduce iterations, and bring differentiated products to market sooner.

🔄 What This Means for IP Providers and SoC Designers

The industry is entering a chiplet-driven era, and EMIB-T is poised to be a foundational technology.

For IP providers, this means:

1. The need to design IPs with packaging-aware constraints
2. A shift toward modular, die-level IP offerings
3. Higher demand for IP validation tools compatible with 3D and multi-die environments

For SoC designers, the collaboration enables:

1. Seamless integration of high-performance dies across different foundries
2. Better system optimization at the power, thermal, and signal levels
3. Greater innovation freedom in architectural design

🔍 Silicon Hub’s Perspective

At Silicon Hub, we are actively preparing for a multi-die future. Our AI-driven platform is designed to help buyers discover IPs that are packaging-aware, process-ready, and system-optimized. The type of modular integration enabled by EMIB-T underscores the need for smarter IP search, deeper metadata tagging, and compatibility checks—all of which our AI agents can handle.

We’re excited to see ecosystem players like Intel and Keysight leading the charge, not just in chip design, but in how chips are assembled, simulated, and delivered at scale.

🔚 Final Thoughts

The Keysight–Intel Foundry collaboration is a strategic inflection point. It reinforces the shift from monolithic scaling to system-level optimization through advanced packaging and simulation. EMIB-T will become a cornerstone for building modular, powerful, and efficient compute systems—especially in AI and high-performance computing domains.

As we move into the angstrom era and beyond, the ability to simulate, validate, and optimize at the system level is not just important—it’s essential. We commend Keysight and Intel for driving this future forward, and we’re excited to help the ecosystem connect the right IP blocks to the right platforms, faster than ever.