The semiconductor industry just crossed another significant milestone in advanced process enablement. Faraday Technology, a top-tier ASIC and IP service provider, has announced the successful tape-out of a test chip on Intel’s 18A process—marking one of the earliest known design houses to reach this stage on Intel’s most advanced node.

At Silicon Hub, we see this not only as a validation of Intel Foundry’s 18A readiness but also as a turning point for the broader chip design ecosystem. Let’s unpack what this means for the industry and why it matters.

🔍 What Happened?

Faraday’s successful tape-out on Intel 18A (angstrom-class node) demonstrates working design enablement for an external customer on what is arguably the most ambitious process technology on Intel’s roadmap. Key elements of this success include:

1. Integration of RibbonFET (Intel’s gate-all-around transistor) and PowerVia (backside power delivery) technologies
2. Deployment of custom test vehicle IP blocks, allowing for early PPA benchmarking
3. Robust collaboration between Faraday and Intel Foundry Services (IFS) under the IFS Accelerator program

💡 Why It Matters

1. Validation of Intel 18A for Real-World Designs

Until now, RibbonFET and PowerVia were largely associated with Intel’s internal products. Faraday’s tape-out proves that the toolchain, IP ecosystem, and PDKs are mature enough for third-party ASIC vendors to build and verify production-grade designs.

2. New Foundry Option for Advanced Node Customers

Faraday’s move highlights Intel Foundry’s growing appeal as a serious competitor to TSMC and Samsung at advanced nodes. For customers seeking geographic diversification, price-performance advantages, or closer ties with U.S.-based capacity, Intel 18A emerges as a viable alternative.

3. IP Ecosystem Growth for Angstrom Nodes

One of the biggest hurdles for foundries pushing to 2nm and beyond is the availability of silicon-proven IP. Faraday’s early design work helps seed the 18A IP ecosystem, especially in areas like high-speed interfaces, memory compilers, analog blocks, and power management.

🔧 Technical Implications

Intel’s 18A node is packed with architectural advances:

1. RibbonFET: Intel’s implementation of gate-all-around transistors, offering better control of short-channel effects, leading to higher drive current and lower leakage.
2. PowerVia: A backside power delivery method that separates signal and power routing layers, reducing IR drop and simplifying front-side routing.
3. Angstrom-Scale Precision: The node offers projected 10–15% performance gains or up to 30% power reduction over Intel 20A, along with higher transistor density.

By taping out on such a complex node, Faraday has demonstrated deep expertise in advanced physical design, signal and power integrity, and EDA flow customization.

🧠 Strategic Outcomes & Industry Impact

From our vantage point at Silicon Hub, this move by Faraday creates multiple ripple effects:

✅ For Intel Foundry:

1. Proof of maturity: Demonstrates that external design houses can execute on 18A—boosting credibility among prospective customers.
2. Strengthened IFS Accelerator: Reinforces the value of the IFS ecosystem and pre-validated IP/tool partners.

✅ For Faraday:

1. First-mover advantage: Faraday is now positioned as one of the most 18A-experienced ASIC service providers in the world.
2. Strategic growth lever: Ability to attract high-end customers looking for complex SoC designs on cutting-edge nodes.

✅ For Design Ecosystem:

1. IP enablement: Faraday’s test chip will likely accelerate the availability of reusable IP for others designing on Intel 18A.
2. Toolchain validation: Boosts confidence in Intel’s EDA stack integration and PDK robustness.

🧭 Silicon Hub’s Perspective

At Silicon Hub, we are building the AI-driven infrastructure that connects buyers with verified, process-ready IP—exactly the kind of capability that is needed as the ecosystem expands to new nodes like Intel 18A. Faraday’s work serves as a catalyst for onboarding new IPs optimized for Intel’s process stack, which we can help surface, validate, and deliver to SoC developers globally.

We see this as a defining moment for foundry competition and a key unlock for design innovation. As more design houses and IP providers follow Faraday’s lead, Intel Foundry will increasingly become part of the mainstream advanced-node design conversation.

🎯 Final Thoughts

Faraday’s tape-out on Intel 18A is not just a technical win—it’s a signal that the future of semiconductor manufacturing is increasingly multi-fab, multi-node, and deeply collaborative. It’s a sign of maturity for Intel Foundry and a validation of the growing momentum behind U.S.-led advanced manufacturing.

We applaud Faraday’s engineering excellence and strategic foresight, and we look forward to helping amplify access to the IP ecosystem that emerges from this milestone.

The angstrom era is no longer theoretical—it’s being taped out.

Details: https://www.faraday-tech.com/html/News/pressRelease/ENG_01_0416.jsp