In a strategic move that addresses the evolving needs of chiplet-based architectures and 5G infrastructure, EXTOLL has partnered with Eridan to deliver ultra-low-power, high-speed SerDes (serializer/deserializer) IP on GlobalFoundries’ 22FDX® platform. Here's a deeper dive into this collaboration—and how EXTOLL compares to the competition.

Collaboration Highlights

1. Strategic Integration
2. EXTOLL is the IP partner of choice for Eridan's next-gen 5G ASICs, targeting small-cell and massive MIMO applications. This highlights EXTOLL’s suitability for high-throughput, low-latency, and power-sensitive use cases.
3. Premium Fabrication Platform
4. Leveraging GF’s 22FDX® process through the GlobalShuttle multi-project wafer (MPW) program, the duo gains access to a process optimized for both radio-frequency performance and energy efficiency.
5. Best-in-Class PPA (Power, Performance, Area)
6. EXTOLL’s SerDes IP is meticulously engineered to minimize footprint and power consumption while still delivering robust data rates—up to 32 Gbps per lane—paired with JESD204 multi-lane support.
7. Modular, Ready-for-Chiplet Architectures
8. The IP is tailored to integrate smoothly in chiplet and multi-die designs, ensuring efficient die-to-die communication without compromising throughput or power budget.

Why It Matters Moving Forward

1. Energy-Conscious Innovation
2. With power budgets tightening, especially in edge and 5G infrastructure, EXTOLL’s ultra-efficient SerDes solutions meet the demand for greener, more sustainable designs.
3. Chiplet-First Design Language
4. As SoC reticle limits push architectures toward modularity, SerDes IP that links chiplets with minimal overhead becomes indispensable. EXTOLL is positioned right at this inflection point.
5. Accelerated Time-to-Market
6. The MPW program on GF’s 22FDX process accelerates validation cycles, lowering barriers for startups and engineering teams eager to bring new silicon to market.

Why It Matters Moving Forward

1. Energy-Conscious Innovation
2. With power budgets tightening, especially in edge and 5G infrastructure, EXTOLL’s ultra-efficient SerDes solutions meet the demand for greener, more sustainable designs.
3. Chiplet-First Design Language
4. As SoC reticle limits push architectures toward modularity, SerDes IP that links chiplets with minimal overhead becomes indispensable. EXTOLL is positioned right at this inflection point.
5. Accelerated Time-to-Market
6. The MPW program on GF’s 22FDX process accelerates validation cycles, lowering barriers for startups and engineering teams eager to bring new silicon to market.

Bottom Line

EXTOLL’s partnership with Eridan—built on GlobalFoundries’ advanced 22FDX process—cements its role as a standout provider of SerDes IP. By delivering unmatched power efficiency and performance for 5G and chiplet-based architectures, EXTOLL proves it can compete with industry giants while carving out its own unique leadership position.

Sources: EXTOLL, GlobalFoundries, Eridan, Design-Reuse, Market Research Future, Barron’s archives