Chip Talk > Arteris Revolutionizes SoC Design with Expanded Ncore Cache Coherent Interconnect IP
Published May 14, 2025
On March 13, 2024, Arteris, Inc., a leading provider of system IP for system-on-chip (SoC) development, announced the expansion of its Ncore cache coherent interconnect IP, a significant advancement designed to accelerate cutting-edge electronics designs. This update enhances the scalability, efficiency, and flexibility of SoC architectures, enabling design teams to integrate hardware accelerators seamlessly into coherent domains with low latency. In this blog post, we’ll explore the details of this announcement, the technical innovations behind Ncore, and its impact on the semiconductor industry.
The Ncore cache coherent interconnect IP is a cornerstone of Arteris’ portfolio, designed to optimize communication between various components in an SoC, such as processors, memory, and accelerators. Cache coherence ensures that multiple processing units accessing shared data maintain a consistent view of that data, which is critical for high-performance, multi-core systems. Ncore facilitates this by providing a scalable and configurable interconnect solution that supports complex SoC designs.
Unlike traditional interconnect solutions that require extensive manual configuration, Ncore streamlines the integration process, saving significant engineering effort. According to Arteris, deploying Ncore can save SoC design teams upwards of 50 years of engineering effort per project compared to manually generated interconnects, making it a game-changer for time-to-market and resource efficiency.
The latest expansion of Ncore introduces several enhancements that cater to the demands of modern electronics, including AI, machine learning, automotive, and 5G applications. Here are the key highlights:
Ncore ensures low-latency integration of hardware accelerators into a coherent domain, enabling the speed and efficiency required for cutting-edge applications. This is particularly crucial for AI and machine learning workloads, where accelerators like GPUs or neural processing units (NPUs) need to operate in sync with CPUs and memory systems. By minimizing latency, Ncore enhances the performance of data-intensive tasks, making it ideal for next-generation devices.
Modern SoCs often incorporate dozens or even hundreds of cores to handle parallel processing tasks. The expanded Ncore IP offers superior scalability, supporting the complex interconnect requirements of multi-core systems. This scalability is vital for applications like autonomous vehicles and data centers, where reliability and performance are non-negotiable. A recent post on X by @arteris_noc emphasized that hardware-based coherency, as provided by Ncore, delivers the scalability, reliability, and performance needed for today’s multi-core systems.
Ncore’s modular architecture allows design teams to customize the interconnect to meet specific project requirements. Whether it’s optimizing for power efficiency, performance, or area, Ncore provides the flexibility to balance these trade-offs. This configurability reduces design complexity and accelerates development cycles, enabling companies to bring innovative products to market faster.
Arteris has a longstanding partnership with Arm, and the expanded Ncore IP is optimized for integration with leading Arm processors. This collaboration ensures that SoC designers can leverage the combined strengths of Arteris’ interconnect solutions and Arm’s high-performance cores, creating optimized and efficient systems. This synergy is particularly valuable for industries like automotive and mobile, where Arm-based SoCs dominate.
The semiconductor industry is under constant pressure to deliver faster, more efficient, and more complex SoCs to meet the demands of emerging technologies. From AI-driven smart devices to autonomous vehicles, the need for robust and scalable interconnect solutions has never been greater. The expansion of Ncore addresses these challenges head-on by providing:
The impact of Ncore is already being felt in the industry. On March 18, 2025, Arteris announced that Nextchip, a leader in automotive vision technology, selected Arteris’ system IP, including Ncore, to accelerate chip designs for advanced driver-assistance systems (ADAS). This partnership highlights Ncore’s ability to meet the stringent performance and reliability requirements of automotive applications, where safety and real-time processing are paramount.
Beyond automotive, Ncore’s versatility makes it suitable for a wide range of applications, from data centers to consumer electronics. As more companies adopt Ncore, we can expect to see faster innovation cycles and more powerful devices hitting the market.
The expansion of Ncore is part of Arteris’ broader strategy to revolutionize SoC design through smart network-on-chip (NoC) interconnect IP. Another notable innovation is FlexGen, a solution that dramatically accelerates chip development by providing a flexible and automated approach to interconnect design. Together, Ncore and FlexGen position Arteris as a leader in addressing the complexities of modern SoC architectures.
A recent post on X by @DanielNenni highlighted how Arteris is revolutionizing SoC design with its smart NoC IP, including Ncore and FlexGen, underscoring the industry’s recognition of Arteris’ contributions.
The expansion of Arteris’ Ncore cache coherent interconnect IP marks a significant milestone in the evolution of SoC design. By addressing the challenges of scalability, latency, and flexibility, Ncore empowers design teams to create the next generation of electronic systems with unprecedented efficiency. As industries like AI, automotive, and 5G continue to push the boundaries of technology, solutions like Ncore will play a critical role in turning innovative ideas into reality.
For more information about Arteris’ Ncore and other system IP solutions, visit www.arteris.com. To learn more about the announcement, check out the official press release here.
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