All IPs > Wireless Communication > 3GPP-5G
The evolution of mobile communication technology has reached a pivotal stage with the introduction of 3GPP-5G, a standard that promises to transform wireless communications. In the realm of semiconductor IP, 3GPP-5G solutions encompass a wide range of technologies that are integral to developing and deploying next-generation communication networks. These semiconductor IPs provide the foundational architecture required for high-speed data transfer, ultra-reliable low latency, and massive connectivity, supporting the diverse and demanding use cases of modern mobile and IoT applications.
3GPP-5G semiconductor IP solutions are crucial for manufacturers and developers looking to design cutting-edge communication systems. These IPs enable the seamless integration of 5G capabilities into a variety of devices, from smartphones and smart home appliances to industrial IoT sensors and autonomous vehicles. They are designed to handle complex signal processing, support multiple frequency bands, and deliver enhanced performance metrics such as increased bandwidth and improved energy efficiency. By leveraging these semiconductor IPs, companies can significantly reduce time-to-market and development costs while ensuring that the end devices meet stringent 5G standards.
Within this category, you'll find a broad array of semiconductor IP products tailored to meet the specific challenges and opportunities posed by 5G networks. These include baseband processors, RF transceivers, and advanced modulation solutions, all of which are engineered to support the high demands of 5G technology. Furthermore, these IPs often come with software support and development kits that facilitate faster adoption and implementation into existing systems.
As the world moves towards more interconnected and intelligent systems, 3GPP-5G semiconductor IPs provide the essential building blocks for future innovations. By enabling the next generation of wireless communication, these IPs not only enhance current technologies but also pave the way for new applications and services that were previously unimaginable. Whether you are developing solutions for consumer electronics, automotive, healthcare, or smart cities, the 3GPP-5G semiconductor IP category offers the tools and technologies to bring your vision to life.
**Ceva-XC21** is the most efficient vector DSP core available today for communications applications. The Ceva-XC21 DSP is designed for low-power, cost- and size-optimized cellular IoT modems, NTN VSAT terminals, eMBB and uRLLC applications. Ceva-XC21 offers scalable architecture and dual thread design with support for AI, addressing growing demand for smarter, yet more cost and power efficient cellular devices. Targeted for 5G and 5G-Advanced workloads, the Ceva-XC21 has multiple products configurations enabling system designers to optimize the size and cost to their specific application needs. The Ceva-XC21, based on the advanced Ceva-XC20 architecture, features a product line of 3 vector DSP cores. Each of the cores offers a unique performance & area configuration with a SW compatibility between them. The different cores span across single thread or dual thread configurations, and 32 or 64 16bits x 16bits MACs. The Ceva-XC212, the highest performing variant of the Ceva-XC21 delivers up to 1.8x times the performance of Ceva’s previous-generation Ceva-XC4500 architecture, while reducing the core area. Ceva-XC210, the smallest configuration of the Ceva-XC21, enables system designers to reduce the core die size in 48% compared with the previous generation. Ceva-XC211 offers the same performance envelope compared with the previous generation at 63% of the area. [**Learn more about Ceva-XC21>**](https://www.ceva-ip.com/product/ceva-xc21/?utm_source=silicon_hub&utm_medium=ip_listing&utm_campaign=ceva_xc21_page)
EW6181 is an IP solution crafted for applications demanding extensive integration levels, offering flexibility by being licensable in various forms such as RTL, gate-level netlist, or GDS. Its design methodology focuses on delivering the lowest possible power consumption within the smallest footprint. The EW6181 effectively extends battery life for tags and modules due to its efficient component count and optimized Bill of Materials (BoM). Additionally, it is backed by robust firmware ensuring highly accurate and reliable location tracking while offering support and upgrades. The IP is particularly suitable for challenging application environments where precision and power efficiency are paramount, making it adaptable across different technology nodes given the availability of its RF frontend.
The ORC3990 SoC is a state-of-the-art solution designed for satellite IoT applications within Totum's DMSS™ network. This low-power sensor-to-satellite system integrates an RF transceiver, ARM CPUs, memories, and PA to offer seamless IoT connectivity via LEO satellite networks. It boasts an optimized link budget for effective indoor signal coverage, eliminating the need for additional GNSS components. This compact SoC supports industrial temperature ranges and is engineered for a 10+ year battery life using advanced power management.
The ntLDPC_5GNR Base Graph Encoder IP Core is defined in 3GPP TS 38.212 standard document and it is based on an implementation of QC-LDPC Quasi-Cyclic LDPC Codes. The specification defines two sets of LDPC Base Graphs and their respective derived Parity Check Matrices. Each Base Graph can be combined with 8 sets of lifting sizes (Zc) in a total of 51 different lifting sizes. This way by using the 2 Base Graphs, the 5G NR specification defines up to 102 possible distinct LDPC modes of operation to select from, for optimum decoding performance, depending on target application code block size and code rate (using the additional rate matching module features). For Base Graph 1 we have LDPC(N=66xZc,K=22xZc) sized code blocks, while for Base Graph 2 we have LDPC(N=50xZc,K=[6,8,9,10]xZc) sized code blocks. The ntLDPCE_5GNR Encoder IP implements a multi-parallel systematic LDPC encoder. Parallelism depends on the selected lifting sizes subsets chosen for implementation. Shortened blocks are supported with granularity at lifting size Zc-bit boundaries. Customizable modes generation is also supported beyond the scope of the 5G-NR specification with features such as: “flat parity bits puncturing instead of Rate Matching Bit Selection”, “maintaining the first 2xZc payload bits instead of eliminating it before transmission”, etc. The ntLDPCD_5GNR decoder IP implements a maximum lifting size of Zc_MAX-bit parallel systematic LDPC layered decoder. Each layer corresponds to Zc_MAX expanded rows of the original LDPC matrix. Each layer element corresponds to the active ZcxZc shifted identity sub-matrices within the layer. Each layer element is shifted accordingly and processed by the parallel decoding datapath unit, in order to update the layers LLR estimates and extrinsic information iteratively until the required number of decoding iterations has been run. The decoder IP also features a powerful optional early termination (ET) criterion, to maintain practically equivalent error correction performance, while significantly increasing its throughput rate and/or reducing hardware cost. Additionally it reports how many decoding iterations have been performed when ET is activated, for system performance observation and calibration purposes. Finally a simple, yet robust, flow control handshaking mechanism is included in both IPs, which is used to communicate the IPs availability to adjacent system components. This logic is easily portable into any communication protocol, like AXI4 stream IF.
The Dual-Drive™ Power Amplifier FCM1401 exemplifies advanced engineering in power amplification, designed specifically for extreme efficiency in wireless communication devices. Operating at a center frequency of 14 GHz, it boasts a sophisticated architecture that minimizes silicon area while enhancing performance metrics. One of the standout features of the FCM1401 is its impressive core drain efficiency, which reaches up to 62%, offering significant power savings and extended battery life for end users. Such efficiencies are particularly crucial in mobile devices, where power remains a critical resource. Moreover, this power amplifier features a dual-stage design to facilitate better signal strength and lower transmission losses. With an optimally configured supply voltage range, the FCM1401 performs without efficiency bottlenecking, crucial for systems with constrained power budgets. Its meticulous construction results in an efficiency at device output around 70%, allowing it to outperform competitors across various metrics. These enhancements not only make the FCM1401 ideal for mobile and satellite communications but also align perfectly with initiatives to lower telecommunication costs through energy-efficient technology. Supported by a drain efficiency that peaks even under full load conditions, Falcomm’s FCM1401 assures users of reliability under diverse operational scenarios. The assurance of minimal loss in complex QAM scenarios further underscores its potential for diverse communication applications. This exemplary power amplifier serves as a testament to Falcomm's commitment to innovation, combining unprecedented efficiency with practical applications in everyday technology.
Palma Ceia SemiDesign's 802.11ah HaLow Transceiver is developed to meet the critical requirements for next-generation IoT and mobile devices. This component caters to applications where extended battery life and long-range capabilities are imperative. Conforming to the IEEE 802.11ah standard, it effectively supports a range of modulation bandwidths while offering low-noise operation and superior receiver sensitivity. One of its significant advantages is its low current consumption, which greatly extends battery life, a crucial factor for IoT devices. The transceiver's robust design incorporates a balanced, low-noise receiver capable of processing a wide range of signal levels, ensuring reliability even in challenging environments. The inclusion of features like integrated DC offset correction and I/Q calibration further underscores its practical application for stable and precise signal processing. Easy interface compatibility and a host of modulation options position the 802.11ah HaLow Transceiver as an ideal choice for a multitude of IoT deployments, from asset management to building automation. Its adaptability to both standalone and SoC integration enhances its usability across various sectors, attesting to its comprehensive design and performance.
AccelerComm's High PHY Accelerators provide a suite of IP cores designed to boost signal processing capabilities for 5G New Radio applications. Integrating patented high-performance algorithms, this library of accelerators ensures peak throughput and efficiency, facilitating robust signal processing across ASIC, FPGA, and SoC platforms. These accelerators are characterized by their ability to significantly reduce latency and improve spectral efficiency, making them indispensable in high-demand environments. By supporting a wide array of features, including high-throughput modulation/demodulation and sophisticated error correction techniques, the accelerators empower systems to handle intricate data transmission with precision. Moreover, these accelerators seamlessly integrate with existing hardware platforms, offering a versatile solution for enhancing signal processing in diverse network scenarios. Their robust design and functionality reflect AccelerComm's commitment to driving innovation in communication technologies.
AccelerComm's LDPC solution stands out for its innovative design that marries block-parallel and row-parallel architectures to deliver peak performance and efficiency. Primarily designed for 5G NR use cases, this product supports both data and control channels, proving its versatility across different communication requirements. With a focus on maximizing throughput and minimizing latency, the LDPC decoder is optimized for various hardware formats, including ASIC, FPGA, and software implementations. It supports a wide range of configurations, allowing it to adapt to specific performance requirements across applications. This LDPC solution has been rigorously validated against IEEE standards and offers enhanced error correction capabilities within a compact design. By reducing resource demands while improving overall communication reliability, it exemplifies AccelerComm's commitment to leading-edge technological solutions.
Polar encoding and decoding for 5G NR leverages AccelerComm's expertise in creating sophisticated IP that reduces resource and memory demands while delivering superior BLER performance. This solution, selected for 5G NR control channels, utilizes PC- and CRC-aided SCL polar decoding techniques to achieve high error correction accuracy. The polar IP is fully compliant with 3GPP NR standards, encompassing the entire encoding and decoding chain required for seamless integration. It offers high levels of parallel processing and scalability, making it suitable for diverse applications, from simple to complex data transmission systems. With its configurable design, the Polar IP allows adjustments in decoder list size to best fit specific BLER and PPA requirements. This flexibility, combined with its efficient integration capabilities, underscores its role as a critical enabler of efficient, high-performance wireless communication solutions.
The eSi-Comms suite is a versatile toolset designed for enabling sophisticated communication functionalities in integrated circuits. Known for its high degree of parameterization, this communication IP adapts to various industry standards, effectively facilitating connectivity across a range of applications. Built to support modern wireless and wireline standards like Wi-Fi, Li-Fi, LTE, and DVB, eSi-Comms demonstrates a balance between adaptability and high performance, suiting dynamic communication environments. It facilitates robust network communications, ensuring seamless data exchange and reliable connectivity in demanding scenarios. EnSilica's focus on optimized resource usage allows eSi-Comms to deliver top-tier communication capabilities with minimized power consumption, a crucial feature in portable and battery-operated devices. Furthermore, its integration ability ensures that it aligns with diverse system architectures, enhancing interoperability across different technology ecosystems.
Ubi.cloud is a breakthrough geolocation solution designed to offload GPS and Wi-Fi computing tasks to the cloud effectively. This innovation results in significantly smaller, more efficient geolocation devices, ideal for IoT tracking applications. By reducing the size and energy consumption of the hardware, Ubi.cloud provides organizations with the ability to deploy diverse tracking solutions across their operations. It supports global GPS positioning for outdoor use and Wi-Fi for indoor urban tracking, making it versatile for various needs. Designed to minimize the inherent power and size issues of traditional GNSS modules, Ubi.cloud leverages advanced embedded technologies like UbiGNSS and UbiWIFI. These allow for remarkable on-time performance improvements compared to traditional setups, drastically cutting down receiver chipset consumption and boosting battery life. With Ubi.cloud, businesses can integrate cutting-edge geolocation capabilities into their devices using a pay-as-you-go model or life-time licenses, ensuring flexibility in application. This makes it ideal for asset tracking of unpowered devices, fitting into existing systems seamlessly or being part of new innovative designs.
The PCS2100 is Palma Ceia SemiDesign's innovative solution specifically engineered for IoT communication within Wi-Fi HaLow networks. This single modem chip is designed for client-side applications, essential for creating a robust IoT ecosystem as envisioned under the IEEE 802.11ah specification. The PCS2100 is integral in enhancing network span owing to its operational capability in sub-gigahertz frequencies, extending communication range up to a kilometer. Characterized by low power consumption and efficient data handling, the PCS2100 stands out in environments demanding scalable throughput and long-lasting operational life. Its architectural design supports advanced features like Target Wake Time (TWT) and Resource Allocation Windowing (RAW), allowing fine-tuned control of device activity to significantly conserve energy in demanding IoT applications. The PCS2100's support for narrow-band transmission, coupled with sophisticated modulation schemes, gives it a performance edge in sensor-intensive environments. This makes it ideal for applications that require continuous connectivity and efficient data streaming, such as surveillance systems or industrial monitoring. Its comprehensive interface options further enhance its integration and deployment flexibility in various IoT settings.
ArrayNav is a groundbreaking GNSS solution utilizing patented adaptive antenna technology, crafted to provide automotive Advanced Driver-Assistance Systems (ADAS) with unprecedented precision and capacity. By employing multiple antennas, ArrayNav substantially enhances sensitivity and coverage through increased antenna gain, mitigates multipath fading with antenna diversity, and offers superior interference and jamming rejection capabilities. This advancement leads to greater accuracy in open environments and markedly better functionality within urban settings, often challenging due to signal interference. It is designed to serve both standalone and cloud-dependent use cases, thereby granting broad application flexibility.
The mmWave PLL is a robust phase-locked loop designed specifically for millimeter-wave frequencies. This advanced PLL offers low phase noise and supports high-frequency bands crucial for various wireless communication and radar applications. Its compact design and broad frequency coverage make it a versatile component for next-generation wireless and communication hardware, including IoT devices and high-speed data links.
Dyumnin Semiconductors' RISCV SoC is a robust solution built around a 64-bit quad-core server-class RISC-V CPU, designed to meet advanced computing demands. This chip is modular, allowing for the inclusion of various subsystems tailored to specific applications. It integrates a sophisticated AI/ML subsystem that features an AI accelerator tightly coupled with a TensorFlow unit, streamlining AI operations and enhancing their efficiency. The SoC supports a multimedia subsystem equipped with IP for HDMI, Display Port, and MIPI, as well as camera and graphic accelerators for comprehensive multimedia processing capabilities. Additionally, the memory subsystem includes interfaces for DDR, MMC, ONFI, NorFlash, and SD/SDIO, ensuring compatibility with a wide range of memory technologies available in the market. This versatility makes it a suitable choice for devices requiring robust data storage and retrieval capabilities. To address automotive and communication needs, the chip's automotive subsystem provides connectivity through CAN, CAN-FD, and SafeSPI IPs, while the communication subsystem supports popular protocols like PCIe, Ethernet, USB, SPI, I2C, and UART. The configurable nature of this SoC allows for the adaptation of its capabilities to meet specific end-user requirements, making it a highly flexible tool for diverse applications.
Trion FPGAs by Efinix are engineered for the fast-paced edge and IoT markets. Built on a 40 nm process, these FPGAs offer a wide range of logic density from 4K to 120K logic elements. They bring power-performance-area advantages for general-purpose custom logic applications, including mobile and IoT markets, while also enhancing computing capabilities in emerging technologies such as deep learning and edge computing. The Trion family is known for its small packages, which enable its deployment in highly integrated systems. Features such as the DDR DRAM Controller and MIPI CSI-2 Controller are hardened into the architecture, ensuring smooth data management and transfer in applications that demand real-time processing. This makes Trion FPGAs an excellent choice for various industrial, medical, and consumer applications where space and power efficiency are critical. With a focus on longevity, Efinix supports Trion FPGAs with a stable product lifecycle, aligning with market requirements for dependable, production-ready solutions. These FPGAs are versatile enough to serve applications in edge computing, video processing, industrial automation, and more, offering a complete system solution with their embedded interfaces and soft processor systems.
The 802.11 LDPC core by Wasiela is engineered for high throughput applications in wireless communication systems. It excels in providing frame-to-frame on-the-fly configuration, allowing developers to balance throughput and error correction performance according to specific needs. This LDPC solution is compliant with relevant throughput and performance specifications, ensuring reliable bit-error-rate and packet-error-rate outcomes that meet industry standards. The core's adaptability in decoding iterations is key to maintaining high efficiency without compromising on quality.
The RWM6050 Baseband Modem is a cutting-edge component designed for high-efficiency wireless communications, ideally suited for dense data transmission environments. This modem acts as a fundamental building block within Blu Wireless's product portfolio, enabling seamless integration into various network architectures. Focusing on addressing the needs of complex wireless systems, the RWM6050 optimizes data flow and enhances connectivity capabilities within mmWave deployments. Technical proficiency is at the core of RWM6050's design, targeting high-speed data processing and signal integrity. It supports multiple communication standards, ensuring compatibility and flexibility in diverse operational settings. The modem's architecture is crafted to manage substantial data payloads effectively, fostering reliable, high-bandwidth communication across different sectors, including telecommunications and IoT applications. The RWM6050 is engineered to simplify the setup of communication networks and improve performance in crowded signal environments. Its robust design not only accommodates the challenges posed by demanding applications but also anticipates future advancements within wireless communication technologies. The modem provides a scalable yet efficient solution that meets the industry's evolving requirements.
Digital PreDistortion (DPD) technology is pivotal for enhancing the efficiency of RF power amplifiers. Systems4Silicon's DPD offering, known as FlexDPD, is a comprehensive adaptive linearization subsystem. This solution is vendor-independent, allowing for seamless compilation whether targeting ASICs, FPGAs, or SoC platforms. It is engineered to boost radio transmission efficiency dramatically.\n\nFlexDPD is adaptable to evolving market needs, supporting multi-standard, multi-carrier wireless systems like 5G and O-RAN networks. Its field-proven scalability ensures it can manage transmission bandwidths exceeding 1 GHz, making it apt for various applications with high data throughput demands. The technology has been crafted to align with the growing complexity and performance expectations of modern wireless networks.\n\nThe solution enhances the power efficiency by effectively linearizing amplifiers, thus mitigating distortions and optimizing output. It ensures systems run at optimal power levels, crucial for energy savings and overall operational efficiency within high-frequency communication environments. Systems4Silicon provides extensive support services, ensuring smooth implementation and ongoing optimization for FlexDPD users.
ntLDPC_SDAOCT IP implements a 5G-NR Base Graph 1 systematic Encoder/Decoder based on Quasi-Cyclic LDPC Codes (QC-LDPC), with lifting size Zc=384 and Information Block Size 8448 bits. The implementation is based on block-structured LDPC codes with circular block matrices. The entire parity check matrix can be partitioned into an array of block matrices; each block matrix is either a zero matrix or a right cyclic shift of an identity matrix. The parity check matrix designed in this way can be conveniently represented by a base matrix represented by cyclic shifts. The main advantage of this feature is that it offers high throughput at low implementation complexity. The ntLDPCE_SDAOCT Encoder IP implements a systematic LDPC Zc=384 encoder. Input and Output may be selected to be 32-bit or 128-bits per clock cycle prior to synthesis, while internal operations are 384-bits parallel per clock cycle. Depending on code rate, the respective amount of parity bits are generated and the first 2xZc=768 payload bits are discarded. There are 5 code rate modes of operation available (8448,8448)-bypass, (9984,8448)-0.8462, (11136,8448)-0.7586, (12672,8448)-0.6667 and (16896,8448)-0.5. The ntLDPCD_SDAOCT Base Graph Decoder IP may optionally implement one of two approximations of the log-domain LDPC iterative decoding algorithm (Belief propagation) known as either Layered Min-Sum Algorithm (MS) or Layered Lambda-min Algorithm (LMIN). Variations of Layered MS available are Offset Min-Sum (OMS), Normalized Min-Sum (NMS), and Normalized Offset Min-Sum (NOMS). Selecting between these algorithms presents a decoding performance vs. system resources utilization trade-off. The ntLDPCD_SDAOCT decoder IP implements a Zc=384 parallel systematic LDPC layered decoder. Each layer corresponds to Zc=384 expanded rows of the original LDPC matrix. Each layer element corresponds to the active ZcxZc shifted identity submatrices within the layer. Each layer element is shifted accordingly and processed by the parallel decoding datapath unit, in order to update the layers LLR estimates and extrinsic information iteratively until the required number of decoding iterations has been run. The decoder IP also features a powerful optional early termination (ET) criterion, to maintain practically equivalent error correction performance, while significantly increasing its throughput rate and/or reducing hardware cost. Additionally it reports how many decoding iterations have been performed when ET is activated, for system performance observation and calibration purposes. Finally a simple, yet robust, flow control handshaking mechanism is included in both IPs, which is used to communicate the IPs availability to adjacent system components. This logic is easily portable into any communication protocol, like AXI4 stream IF.
ParkerVision's Direct-to-Data (D2D) Technology marks a transformative development in RF communication, significantly enhancing the performance of modern smartphones and wireless devices. This innovative technology replaces the century-old super-heterodyne downconverter with a new RF downconverter that operates efficiently within CMOS architectures. D2D allows RF receivers to connect more seamlessly across global bands while processing high data rates essential for today's media and communication needs. D2D RF receivers built on ParkerVision technology minimize power usage while delivering fast data speeds, substantially contributing to the functionality and efficiency of modern smartphones. These receivers are capable of handling a wide spectrum of data rates from streaming video to large data transfers, thanks to their high-performance design capable of managing a range of signal strengths from various distances with cellular towers. This patented technology plays a crucial role in the smartphone revolution, with its incorporation leading to smarter, faster devices. These developments are enabled by a precise downconversion mechanism that transforms high-frequency RF signals into data-efficient formats. The D2D technology reduces the traditional noise and signal loss, making it a cornerstone in the advancement of mobile and IoT device communication strategies.
The Digital Radio (GDR) from GIRD Systems is an advanced software-defined radio (SDR) platform that offers extensive flexibility and adaptability. It is characterized by its multi-channel capabilities and high-speed signal processing resources, allowing it to meet a diverse range of system requirements. Built on a core single board module, this radio can be configured for both embedded and standalone operations, supporting a wide frequency range. The GDR can operate with either one or two independent transceivers, with options for full or half duplex configurations. It supports single channel setups as well as multiple-input multiple-output (MIMO) configurations, providing significant adaptability in communication scenarios. This flexibility makes it an ideal choice for systems that require rapid reconfiguration or scalability. Known for its robust construction, the GDR is designed to address challenging signal processing needs in congested environments, making it suitable for a variety of applications. Whether used in defense, communications, or electronic warfare, the GDR's ability to seamlessly switch configurations ensures it meets the evolving demands of modern communications technology.
The Software-Defined High PHY offered by AccelerComm is a flexible solution designed for ARM processor architectures. This IP enables high performance across various platforms, optimizing capacity and power utilization based on application demands. By embodying a software-defined approach, it affords users the versatility to either integrate it with hardware acceleration or operate it as a standalone solution, depending on specific project needs. This IP underscores AccelerComm's focus on platform independence while ensuring seamless integration across diverse systems. The Software-Defined High PHY is equipped to handle high throughput and low latency requirements, making it ideal for applications that demand dynamic performance adjustments. It allows for seamless blending of hardware and software, delivering a balance between performance and resource consumption. This makes the Software-Defined High PHY an ideal choice for companies looking to implement scalable, adaptable wireless communication solutions with efficiency at their core.
The LTE Lite offering by Wasiela is a highly versatile physical layer component tailored for Long-Term Evolution (LTE) applications. This core is designed to support user equipment compliant with CAT 0/1 specifications, ensuring compatibility across a wide spectrum of bandwidths. Its flexible design allows modulation formats up to 64QAM, with capabilities for significant timing and frequency offset corrections. Delivered as synthesizable Verilog, LTE Lite is ready for integration with standard RF tuners in communication systems looking to leverage LTE technology efficiently.
CLOP Technologies' 60GHz Wireless Solution offers businesses an impressive alternative to traditional networking systems. Leveraging the IEEE 802.11ad WiFi standard and Wireless Gigabit Alliance MAC/PHY specifications, this solution achieves a peak data rate of up to 4.6Gbps. This makes it particularly suited for applications that require significant bandwidth, such as real-time, uncompressed HD video streaming and high-speed data transfers — operations that are notably quicker compared to current WiFi systems. The solution is engineered to support 802.11ad IP networking, providing a platform for IP-based applications like peer-to-peer data transfer and serving as a router or access point. Its architecture includes a USB 3.0 host interface and mechanisms for RF impairment compensation, ensuring both ease of access for host compatibility and robust performance even under high data rate operations. Operating on a frequency band ranging from 57GHz to 66GHz, the wireless solution utilizes modulation modes such as BPSK, QPSK, and 16QAM. It incorporates forward error correction (FEC) with LDPC codes, providing various coding rates for enhanced data integrity. Furthermore, the system boasts AES-128 hardware security, with quality of service maintained through IEEE 802.11e standards.
LightningBlu is a sophisticated mmWave connectivity solution explicitly designed for high-speed rail environments. This advanced system offers continuous, on-the-move multi-gigabit connectivity between trackside infrastructure and trains, ensuring seamless internet access, entertainment services, and real-time updates for passengers. Operating within the 60 GHz spectrum and compliant with IEEE 802.11 ad and ay standards, LightningBlu provides robust and efficient wireless communication for the rail industry. The LightningBlu system's standout feature is its ability to maintain reliable service even at speeds of over 300 km/h, enhancing the passengers' travel experience with fast and dependable connectivity. Its architecture allows for dynamic interaction between train-mounted and trackside units, facilitating uninterrupted data transfer essential for modern transport needs. This product not only addresses current connectivity requirements but also positions itself as a future-proof solution adaptable to evolving technological landscapes. Adopting a highly functional design, LightningBlu effectively eliminates the dependency on cabled infrastructure, making it an ideal choice for upgrading existing rail systems or deploying in new corridors. By supporting innovative services and enhancing passenger contentment, LightningBlu contributes significantly to modernizing the rail sector, aligning with the increasing push towards digital transformation in mass transit.
**Ceva-PentaG2** is a complete IP platform for implementing a wide range of user-equipment and IoT cellular modems. The platform includes a variety of DSPs, modem hardware modules, software libraries, and simulation tools. Capabilities of the Ceva-PentaG2 include New Radio (NR) physical layer design ranging across all 3GPP profiles from RedCap IoT and mMTC, through eMBB up to ultra-reliable low-latency communications (URLLC). The platform has two base configurations. Ceva-PentaG2 Max emphasizes performance and scalability for enhanced mobile broadband (eMBB) and future proofing design for next generation 5G-Advanced releases. Ceva-PentaG2 Lite emphasizes extreme energy and area efficiency for lower-throughput applications such as LTE Cat 1, RedCap, and optimized cellular IoT applications. The PentaG2 platform comprises a set of Ceva DSP cores, optimized fixed-function hardware accelerators, and proven, optimized software modules. By using this platform, designers can implement optimized, hardware-accelerated processing chains for all main modem functions. In the selection process, designers can tune their design for any point across a huge space of area, power consumption, latency, throughput, and channel counts. Solutions can fit applications ranging from powerful eMBB for mobile and Fixed Wireless Access (FWA) devices to connected vehicles, cellular IoT modules, and even smart watches. System-C models in Ceva’s Virtual Platform Simulator (VPS) aid architectural exploration and system tuning, while an FPGA-based emulation kit speeds SoC integration. [**Learn more about Ceva-PentaG2 solution>**](https://www.ceva-ip.com/product/ceva-pentag2/?utm_source=silicon_hub&utm_medium=ip_listing&utm_campaign=ceva_pentag2_page)
The FCM3801-BD extends Falcomm’s exceptional legacy in dual-drive™ power amplification, offering unparalleled efficiency and performance at a center frequency of 38 GHz. This power amplifier is engineered to deliver unprecedented amplification capabilities with a focus on reducing energy wastage. As part of Falcomm's suite of next-generation amplifiers, the FCM3801-BD empowers telecommunications with its precise and reliable performance metrics, engineered for the most sophisticated communication systems. Thanks to its unique integration of GaAs and CMOS technologies, the FCM3801-BD offers outstanding energy performance, making it an ideal choice for resource-intensive applications. Its high modularity and ease of integration allow it to seamlessly fit into existing systems while offering robust improvements in both output and operational efficiency. These characteristic enhancements are crucial for developers and engineers focused on achieving best-in-class performance in signal-intensive applications. The FCM3801-BD is engineered with an eye towards the future, accommodating the evolving demands of telecommunications, and space communication technologies. This power amplifier helps to minimize operational costs through effective energy utilization and is well-poised to meet the efficiency challenges of tomorrow's wireless devices. Falcomm’s commitment to developing such products ensures they remain at the forefront of innovation, setting new standards in power amplification across a variety of platforms.
UWB Technology & IP features advanced ultra-wideband solutions designed for precision connectivity in short-range communications. Offering high data efficiency and robust interference resistance, UWB is ideal for applications such as indoor positioning and short-range radar. TES's UWB technology is designed to seamlessly integrate into various systems, enhancing connectivity and interaction in complex network environments.
hellaPHY Positioning Solution is an advanced edge-based software that significantly enhances cellular positioning capabilities by leveraging 5G and existing LTE networks. This revolutionary solution provides accurate indoor and outdoor location services with remarkable efficiency, outperforming GNSS in scenarios such as indoor environments or dense urban areas. By using the sparsest PRS standards from 3GPP, it achieves high precision while maintaining extremely low power and data utilization, making it ideal for massive IoT deployments. The hellaPHY technology allows devices to calculate their location autonomously without relying on external servers, which safeguards the privacy of the users. The software's lightweight design ensures it can be integrated into the baseband MCU or application processors, offering seamless compatibility with existing hardware ecosystems. It supports rapid deployment through an API that facilitates easy integration, as well as Over-The-Air updates, which enable continuous performance improvements. With its capability to operate efficiently on the cutting edge of cellular standards, hellaPHY provides a compelling cost-effective alternative to traditional GPS and similar technologies. Additionally, its design ensures high spectral efficiency, reducing strain on network resources by utilizing minimal data transmission, thus supporting a wide range of emerging applications from industrial to consumer IoT solutions.
Designed for modern communication standards, the WiFi6, LTE, and 5G Front-End Module enhances connectivity in cellular and wireless networks. This sophisticated module operates across multiple frequency bands, specifically between 2.4 and 5-7 GHz, catering to a diverse range of communication protocols including WiFi6, LTE, and emerging 5G technology. Featuring integrated components such as low-noise amplifiers (LNAs), power amplifiers (PAs), and RF switches, this module significantly boosts signal reception and transmission efficiency while maintaining low power consumption. Aimed at improving data throughput and connectivity reliability, it supports seamless transitioning between different network types, which is crucial for devices like smartphones and IoT gadgets. Engineers have crafted this module to address the next-generation requirements of wireless communication by ensuring compatibility with global network specifications. Its deployment is essential in paving the way for devices that demand high-speed data, stable connections, and reduced latency, thus making it ideal for consumer electronics, telecommunication infrastructure, and advanced wireless applications.
The Dual-Drive™ Power Amplifier FCM2801-BD represents another leap forward in Falcomm's quest to redefine power efficiency in mmWave-based devices. Centered at 28 GHz, this power amplifier emerges as a pivotal component for next-generation wireless communication technology. The architecture of the FCM2801-BD is engineered to deliver industry-leading drain efficiencies, optimizing both power consumption and performance. It is notably characterized by its robust reliability and exceptional energy management capabilities, tailored for applications where performance excellence is paramount. With a core design that exploits the potentials of GaN and SiGe technologies, the FCM2801-BD ensures superior amplification with minimized energy wastage. Its sophisticated signal processing enhances device output without significant power blowouts. The advanced manufacturing processes adopted promise reduced manufacturing footprint, making it an ideal choice for highly compact and low-footprint technology designs. Engineered for space communications, wearables, and innovative telecommunication systems, the FCM2801-BD champions Falcomm’s vision of marrying exceptional performance with eco-friendly designs. This model’s dependability in high-demand scenarios complements its capability to lower operational expenses across communication systems internationally. In conclusion, the FCM2801-BD is not only a technological marvel from Falcomm but also a commitment to the ethos of sustainability and resource efficiency.
AccelerComm offers a comprehensive physical layer solution for 5G New Radio (NR), tailored to high-performance satellite and O-RAN applications. This solution seamlessly integrates with existing systems and optimizes power, performance, and area considerations. The product's inherent flexibility allows it to adapt to a variety of platforms, including ARM processors, FPGAs, and ASICs, ensuring broad applicability across different hardware environments. The Complete 5G NR Physical Layer makes use of patented signal processing algorithms to deliver high link performance, aiding in the reduction of latency and enhancement of spectral efficiency. Designed with 3GPP compliance in mind, the solution supports the entire processing chain, ensuring that users benefit from reduced errors and maximized throughput. Furthermore, this physical layer solution is enhanced by its support for cutting-edge features like rate matching and HARQ protocols. Highly configurable, it allows for integration with various platforms, which underscores AccelerComm's commitment to providing versatile and efficient solutions tailored for modern 5G networks.
ParkerVision's Energy Sampling Technology has revolutionized the paradigm of RF signal processing with an inventive approach for frequency down-conversion. Traditionally dominated by super-heterodyne techniques, which used high L.O. power to achieve sensitivity and linearity, these were not suited for low-power CMOS applications as well as modern integrated transceivers. Energy Sampling Technology provides the highest sensitivity and dynamic range required for modern receivers while enhancing selectivity and interference rejection. By eliminating RF signal division between I and Q paths, ParkerVision's technology helps in reducing power consumption and improving demodulation accuracy. It offers a compact and cost-effective solution feasible with CMOS technologies, allowing for the development of multimode receivers compatible with advancing CMOS geometries and power levels. The benefits span various transmission standards like GSM, EDGE, CDMA, UMTS, and LTE, making it relevant for devices such as handsets and embedded modems. This technology fundamentally shifts RF signal processing by using matched-filter correlators, enhancing the overall performance capabilities of direct conversion receivers. The elimination of redundant components reduces silicon area, and improved dynamic range lessens the need for external filters. This technology paves the way for a wide array of innovative applications across contemporary wireless ecosystems, thereby facilitating rapid technological leaps in the communication field.
The PUSCH Equalizer by AccelerComm is designed to enhance spectral efficiency by effectively managing noise and interference, especially in systems utilizing multiple antennas. Built with advanced equalization algorithms, this product is tailored to be implemented as a hardware solution, thereby offering high performance beyond what a standard CPU can achieve. This equalizer is fully compliant with 3GPP NR specifications and integrates seamlessly with demodulation, LDPC, and polar decoding processes. This synergy ensures not only significant improvements in spectral efficiency but also reductions in cost per bit and system power consumption. Offering both FPGA and ASIC compatibility, the PUSCH Equalizer is engineered to minimize time to market and deliver robust performance in modern telecommunications environments. Its advanced features make it a vital component for improving overall network performance and user experience in advanced 5G NR deployments.
The Turbo Encoder and Decoder cores by Creonic are engineered to deliver high efficiency in error correction, catering to standards like DVB-RCS2 and 4G LTE. These cores are vital in systems where low latency and high throughput are crucial, such as mobile communications and satellite transponders. Turbo coding technology is renowned for its capacity to approach the Shannon limit, offering near-optimal performance. Creonic's Turbo solutions are meticulously designed to support a wide gamut of applications from space communications to terrestrial wireless networks. Their enhanced algorithms allow for simplified integration and operational efficiency, drastically reducing the error rate in data transmission. The cores are particularly beneficial in environments that encounter significant noise and interference. By using these Turbo Cores, businesses can optimize their communication systems, thereby minimizing the engineering challenges related to complex transmission environments. These products are a testament to Creonic’s expertise in providing robust, versatile solutions that can be tailored to meet very specific customer needs.
The 5G Polar encoding and decoding solutions provided by TurboConcept deliver state-of-the-art error correction for 5G networks. These solutions are crafted to efficiently handle polar code challenges, ensuring high data throughput with minimal latency. Designed for both FPGA and ASIC implementations, the cores enhance the performance of 5G systems by providing robust error correction, essential for reliable communication in varying conditions. TurboConcept's 5G Polar solutions are instrumental in facilitating the sophisticated demands of modern communication networks, supporting a wide range of applications from mobile data to critical IoT infrastructures.
The PCS2500 by Palma Ceia SemiDesign serves as the central hub in Wi-Fi HaLow network setups, operating efficiently as a highly integrated access point chip. It provides the backbone for seamless IoT device management across vast distances, as stipulated under the IEEE 802.11ah standard. This component is pivotal for forming comprehensive IoT networks, supporting extensive device connectivity benefits and enhanced network management. This access point effectively communicates with numerous client devices over an extended frequency range, highlighted by its sub-gigahertz operation extending up to a kilometer. It supports features like Resource Allocation Windowing (RAW) and Target Wake Time (TWT), which are vital in maintaining operational efficiency and reducing device contention in densely populated IoT deployments. The PCS2500 is designed to offer resilient and flexible connectivity, supporting a wide array of modulation techniques and interface options. It enables high-density IoT environments to function optimally by offering reliable coverage and efficient data routing, significantly boosting network throughput and resource management.
This IP focuses on advancing encryption methods to counteract threats posed by quantum computing. By using algorithms robust enough to withstand the computational power of quantum machines, the Post-Quantum Cryptography IP ensures the continued confidentiality of sensitive data long into the future. Collaboration with industry and academia allows Secure-IC to be at the cutting edge of this technological evolution.
Tower Semiconductor's RF-SOI and RF-CMOS platforms are crafted for the augmentation and efficiency of wireless communication systems. These platforms are pivotal in creating devices that require minimal power consumption while maximizing bandwidth and coverage. By integrating Silicon On Insulator (SOI) technology with conventional CMOS processes, these platforms ensure high performance in a spectrum of RF applications. The RF-SOI technology offers outstanding linearity and minimal signal loss, essential for advanced wireless communication systems, including 5G networks and IoT devices. Pairing this with RF-CMOS facilitates the production of integrated transceivers and other RF modules that demand precise control and low phase noise. Additionally, these platforms enable breakthrough advances in mmWave communications, positioning Tower Semiconductor as a key player in next-generation wireless technologies. Clients in various sectors, from telecommunications to consumer electronics, benefit from their customized designs to optimize wireless system architecture and performance.
The PCS1100 transceiver is an advanced component in Palma Ceia SemiDesign’s portfolio designed to cater to the burgeoning demand for Wi-Fi 6 networks. It seamlessly integrates with Wi-Fi 6/6E systems, operating efficiently as the RF module within access points or stations. This transceiver supports multiple frequency bands, offering tri-band operations that cover 2.4 GHz, 5 GHz, and the newly allocated 6 GHz range. It is expertly designed for high-capacity environments like public venues and smart cities, aiming to enhance network efficiency and signal reliability. Equipped with MU-MIMO and OFDMA technologies, the PCS1100 ensures high data throughput and reduced latency, accommodating the needs of modern applications such as streaming and IoT devices. The transceiver excels in both transmitting and receiving capacities through advanced modulation schemes up to 1024 QAM, achieving peak throughput around 4.2 Gbps across four spatial streams. This enables simultaneous data communication with multiple devices, improving network capacity and speed. Furthermore, the transceiver is built with robust RF architecture that accounts for rigorous operational specifications, providing long-range and efficient connectivity. It incorporates a variety of design optimizations, including digital calibration and compensation features, which ensure consistent performance across varying conditions. This component serves as the RF backbone, particularly in systems requiring high reliability and swift data handling.
The Cobalt GNSS Receiver is a state-of-the-art ultra-low-power GNSS receiver that significantly enhances IoT system-on-chip designs. It provides a compact yet powerful solution for integrating navigation capabilities into mobile and compact IoT devices. By sharing resources between GNSS and other modem functions, Cobalt offers cost and size efficiency to extend the market potential of products. Cobalt excels in mass-market applications, particularly those constrained by size and cost, such as logistics, agriculture, and animal tracking. It employs a software-defined approach, making it versatile across different satellite constellations including Galileo and GPS, and is designed to be supported with cloud assistance for enhanced positioning accuracy and energy optimization. Developed in collaboration with CEVA DSP and supported by the European Space Agency, this GNSS receiver delivers improved resistance to multi-path interference and an increased modulation rate for optimal accuracy. The inclusion of integrated resources ensures a seamless continuation of GNSS-enabled services, reducing power demands in comparison to conventional receivers.
This RF transceiver supports the 433, 868, and 915 MHz frequency bands, aligning with IEEE 802.15.4–2015 standards. It is designed for Sub-GHz communication, offering efficient performance in wireless applications. Its design is fully integrated, including PLL based RF transmitter and receiver modules, all silicon-proven across multiple process nodes. This robust design ensures reliable functionality for a wide range of wireless applications.
The NB-IoT (LTE Cat NB1) Transceiver from Palma Ceia SemiDesign stands as a pivotal component for low-power, wide-area (LPWA) network solutions, explicitly tailored for the growing IoT domain. Designed to align with the 3GPP Release 13 specifications, this transceiver facilitates efficient cellular communication within IoT networks, providing essential connectivity for devices in energy-sensitive applications. This transceiver is distinguished by its compliance with broader LTE standards, offering extensive programmability through simple SPI interfaces. It is built with integral calibration features to manage DC offset and IQ mismatches, ensuring high fidelity in data transmission. These design attributes make it versatile across a range of cellular network bands, accommodating various operational environments. Optimized for power efficiency, the NB-IoT transceiver's compact frame supports numerous applications including smart metering, wearable technology, and surveillance systems. It offers seamless integration with existing networks, significantly improving data throughput and extending operational range while maintaining minimal power consumption, all pivotal in sustaining IoT growth across global infrastructures.
The Convolutional Encoder and Viterbi Decoder IP is a versatile digital signal processing module that offers error correction capabilities essential for maintaining data integrity in communication channels. It employs convolutional encoding coupled with Viterbi decoding, aiming to correct errors that occur during data transmission over noisy channels. This IP core is adaptable, able to work with any polynomial used for encoding, ensuring that it can be tailored specifically to the user's diverse application demands. It finds extensive use in environments where reliability and accuracy of data transmission are of paramount importance, such as in telecommunications and networking sectors. By providing robust error detection and correction functionalities, it helps mitigate the adverse effects of channel noise, thereby bolstering the efficiency of data communications. This enhances user experience by supporting uninterrupted communication with fewer errors. Designed with flexibility in mind, this module supports various standards and can be deployed across multiple platforms. Its architecture is optimized for resource utilization, adapting to the specific needs of different technological environments without unnecessary complexity or cost. This adaptability ensures that the IP core can seamlessly integrate into existing systems, providing a substantial technological advantage in competitive markets.
The J1 core cell is a remarkably small and efficient audio decoder that manages Dolby Digital, AC-3, and MPEG audio decompression. With a design that occupies only 1.0 sqmm of silicon area using 0.18u CMOS technology, it delivers a robust solution for decoding 5.1 channel dolby bitstreams and supports data rates up to 640kb/s. The J1 produces high-quality stereo outputs, both normal and Pro-Logic compatible, from Dolby Digital and MPEG-encoded audio, ideal for set-top boxes and DVD applications.
PhantomBlu represents Blu Wireless's advanced mmWave solution tailored for military and defense applications. It is engineered to deliver secure, high-performance tactical communications in diverse and challenging environments. The system's low-SWAP (size, weight, and power) design is versatile, featuring configurations capable of acting as both PCP (hub) and STA (client), thereby ensuring reliable communication in dynamic and fast-moving scenarios. PhantomBlu operates without the need for traditional fiber optics or wired networks, leveraging available mmWave spectrum to facilitate seamless interoperability across legacy and new defense systems. This flexibility makes it an essential asset in modern warfare, providing data-rich, mission-critical connectivity that adapts swiftly to operational requirements. PhantomBlu's design supports stealthy, gigabit-speed communications crucial for mission efficacy and situational awareness. Emphasizing ease of integration and deployment, PhantomBlu contributes to transforming tactical communication landscapes by improving throughput and reducing latency. Its robust architecture ensures optimal performance even under demanding conditions, catering to the defense sector's growing reliance on rapid data exchange and real-time information sharing.
This suite offers flexible and powerful error correction capabilities through LDPC and Turbo coding. Aimed at enhancing communication systems, the cores are designed for seamless integration with broadband and broadcast environments. They are particularly beneficial in applications requiring high data integrity and error correction, such as satellite and terrestrial communications. The TurboConcept designs support various architectures, catering to the unique demands of both high-capacity networks and specialized communication systems. These cores are built to ensure efficient and effective data error management, enabling optimal performance in various digital transmissions.
TurboConcept's 4G multi-mode CTC decoder is engineered for modern broadband wireless communications, ensuring efficient and error-free data exchange. Designed to handle the complexity of decoding convolutional turbo codes, this core offers flexibility and high performance across various 4G applications. It seamlessly integrates with existing systems to enhance data transmission quality, effectively managing multiple modes to cater to diverse network requirements. By providing robust error correction, this decoder enhances network reliability and supports high-speed data operations, making it essential for competitive 4G LTE platforms.
Creonic offers a comprehensive range of LDPC Encoder and Decoder cores, expertly engineered for high-speed data throughput. These cores cater to numerous standards such as DVB-S2X and CCSDS, providing flexible, robust solutions for error correction in digital communication systems. They are designed to maximize performance in demanding environments, supporting varied applications from satellite communications to next-generation mobile networks. Key products like the 5G-NR LDPC and DVB-S2X LDPC/BCH cores exemplify sophisticated designs that deliver exceptional data integrity and throughput. Each specific LDPC product aligns with industry-standard protocols, ensuring compatibility and ease of integration into existing infrastructures. The modular design provides adaptability to different use cases, particularly in the rapidly evolving 5G infrastructure landscape. LDPC technology is critical for high-efficiency error correction, and Creonic's offerings are designed to minimize latency while maximizing reliability. These cores play an integral role in maintaining the integrity and performance standards of modern communication systems, ensuring that data is transmitted accurately over various channels.
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