All IPs > Security IP > Platform Security
In today's digital world, the importance of platform security cannot be overstated. Platform security semiconductor IPs are essential for protecting electronic systems from an increasing array of threats. These IPs play a critical role in ensuring that systems remain secure by safeguarding data, communications, and applications from unauthorized access or malicious attacks.
Platform security IPs include a variety of solutions such as encryption engines, secure boot mechanisms, and trusted execution environments. These technologies work in harmony to validate the authenticity of hardware and software components, providing a comprehensive security framework for electronic devices. By integrating these security measures at a fundamental level, semiconductor IPs ensure that systems are resilient to tampering and meet stringent security standards.
The applications of platform security semiconductor IPs span across a multitude of industries. From consumer electronics like smartphones and smart home devices to critical infrastructure systems and automotive applications, robust security is imperative. These IPs are designed to address the security needs of both edge devices and cloud-based platforms, preserving the integrity and confidentiality of sensitive data as it is processed and transmitted.
In our Silicon Hub, you will find a diverse array of platform security semiconductor IPs tailored to meet varied security requirements. Whether you're looking to protect consumer devices or safeguard enterprise data centers, our cutting-edge IP solutions provide the reliability and flexibility needed to counteract evolving security threats. Explore our category to enhance your products with state-of-the-art security technologies.
BrainChip's Akida Neural Processor IP is a groundbreaking development in neuromorphic processing, designed to mimic the human brain in interpreting sensory inputs. By implementing an event-based architecture, it processes only the critical data at the point of acquisition, achieving unparalleled performance with significantly reduced power consumption. This architecture enables on-chip learning, reducing dependency on cloud processing, thus enhancing privacy and security.\n\nThe Akida Neural Processor IP supports incremental learning and high-speed inference across a vast range of applications, making it highly versatile. It is structured to handle data sparsity effectively, which cuts down on operations substantially, leading to considerable improvements in efficiency and responsiveness. The processor's scalability and compact design allow for wide deployment, from minimal-node setups for ultra-low power operations to more extensive configurations for handling complex tasks.\n\nImportantly, the Akida processor uses a fully customizable AI neural processor that leverages event-based processing and an on-chip mesh network for seamless communication. The technology also features support for hybrid quantized weights and provides robust tools for integration, including fully synthesizable RTL IP packages, hardware-based event processing, and on-chip learning capabilities.
Overview: The Secure Enclave IPs are Common Criteria (CC) EAL5+PP0084/PP0117 and EAL5+PP0117 certification-ready Secure Enclaves, respectively. They are available as hard macros for seamless integration into SoCs. These Secure Enclave IPs provide the highest level of security for an SoC, incorporating patented design techniques and countermeasures against side-channel and perturbation attacks to ensure robust security while minimizing power consumption. Key Features: Cryptographic Hardware Accelerators: Efficiently support standard cryptography and security operations to increase throughput while adhering to power constraints and security requirements. BootROM and Secondary Boot Loader: Manage the certified life cycle of the Secure Enclave, enforcing and assuring security from manufacturing to deployment. Proprietary IP: Based on proprietary IP that is free of 3rd party rights and royalties. Benefits: The Secure Enclave IPs offer robust security measures, efficient cryptographic support, and secure life cycle management, making them ideal for applications that require the highest levels of security and reliability. Applications: The Secure Enclave IP is versatile and suitable for a wide range of applications, including but not limited to: Secured and Certified iSIM & iUICC EMVco Payment Hardware Cryptocurrency Wallets FIDO2 Web Authentication V2X HSM Protocols Smart Car Access Secured Boot Secure OTA Firmware Updates Secure Debug Any design requiring a Secure Enclave, Secure Element, or Hardware Root of Trust protected against side-channel and perturbation fault attacks. Compliance and Support: The Secure Enclave is compliant with and ready for CC EAL5+ and EMVCo certification. It is delivered with an SDK and pre-certified CryptoLibrary and secure Boot Loader for seamless integration and enhanced security.
The Polar ID Biometric Security System by Metalenz revolutionizes smartphone biometric security with its advanced imaging capabilities that capture the full polarization state of light. This system detects unique facial polarization signatures, enabling high-precision face authentication that even sophisticated 3D masks cannot deceive. Unlike traditional systems requiring multiple optical modules, Polar ID achieves secure recognition with a single image, ideal for secure digital payments and more. Operating efficiently across various lighting conditions, from bright daylight to complete darkness, Polar ID ensures robust security without compromising user convenience. By leveraging meta-optic technology, it offers a compact, cost-effective alternative to structured light solutions, suitable for widespread deployment across millions of mobile devices.
aiWare represents aiMotive's advanced hardware intellectual property core for automotive neural network acceleration, pushing boundaries in efficiency and scalability. This neural processing unit (NPU) is tailored to meet the rigorous demands of automotive AI inference, providing robust support for various AI workloads, including CNNs, LSTMs, and RNNs. By achieving up to 256 Effective TOPS and remarkable scalability, aiWare caters to a wide array of applications, from edge processors in sensors to centralized high-performance modules.\n\nThe design of aiWare is particularly focused on enhancing efficiency in neural network operations, achieving up to 98% efficiency across diverse automotive applications. It features an innovative dataflow architecture, ensuring minimal external memory bandwidth usage while maximizing in-chip data processing. This reduces power consumption and enhances performance, making it highly adaptable for deployment in resource-critical environments.\n\nAdditionally, aiWare is embedded with comprehensive tools like the aiWare Studio SDK, which streamlines the neural network optimization and iteration process without requiring extensive NPU code adjustments. This ensures that aiWare can deliver optimal performance while minimizing development timelines by allowing for early performance estimations even before target hardware testing. Its integration into ASIL-B or higher certified solutions underscores aiWare's capability to power the most demanding safety applications in the automotive domain.
PUFrt is a sophisticated Hardware Root of Trust (HRoT) solution that focuses on generating and storing root keys that never leave the chip, ensuring a secure environment for sensitive operations. This IP incorporates a 1024-bit Physical Unclonable Function (PUF) along with a true random number generator (TRNG) compliant with NIST standards. PUFrt's architecture is fortified with secure storage capabilities that protect key information from potential physical attacks, providing a robust security layer against future threats in the IoT landscape. Its design allows seamless integration across different systems and design architectures, making it versatile for applications ranging from lightweight hardware security keys to full-fledged Security Coprocessors. With built-in anti-tamper features and customization options, PUFrt is a prime choice for those looking to secure their semiconductor supply chain against threats like counterfeiting and reverse engineering. Certified by Riscure, PUFrt sets a high benchmark for reliable security practices in semiconductor design. Its comprehensive security framework makes it indispensable for modern chip designs that necessitate high levels of trust and integrity.
Trilinear Technologies' HDCP Encryption-Decryption Engine is a sophisticated solution designed to safeguard digital content as it traverses various transmission channels. This engine is compliant with the HDCP standards 1.4 and 2.3, offering robust protection mechanisms to ensure that digital media investments are secure from unauthorized access and piracy. The engine’s hardware acceleration capabilities represent a crucial advantage, significantly reducing the load on the system processor while maintaining real-time encryption and decryption functions. This not only enhances performance but also extends the operational life of the hardware involved, making it suitable for high-demand media applications across sectors such as broadcast, entertainment, and corporate environments. Trilinear’s HDCP Encryption-Decryption Engine ensures compatibility with a wide array of consumer and professional-grade video equipment, providing seamless protection without interference in media quality or transmission speed. Its flexible integration options allow it to be smoothly incorporated into existing infrastructures, whether in standalone media devices or complex SoC architectures. Supported by comprehensive software resources, the HDCP Encryption-Decryption Engine provides an all-encompassing solution that includes necessary software stacks for managing device authentication and link maintenance. Its ability to safeguard high-definition content effectively makes it an invaluable asset for entities focused on secure content delivery and rights management.
Secure OTP is a cutting-edge non-volatile memory solution designed to safeguard key, data, and secret storage with enhanced protection against hardware attacks. It features a combination of physical macros and digital RTL, offering robust anti-tamper and integrated protection mechanisms. This solution is specifically architected for integration in CMOS technologies and is compatible across numerous IC and ASIC applications. By incorporating a 1024-bit PUF for scrambling and I/O shuffling, Secure OTP significantly elevates stored data security, effectively making it tamperproof. As digital security challenges mount, Secure OTP provides a modernized answer, ensuring the safekeeping of critical information across its lifecycle. Its adoption addresses prevalent security gaps in legacy e-fuse solutions and is instrumental in extending robust defense systems within SoC environments, acting as a cornerstone for comprehensive hardware security strategies.
The eSi-Crypto solution provides an advanced encryption and authentication framework, ensuring robust security for digital data. Its sophisticated algorithms cover a wide array of cryptographic needs, from basic encryption to complex data protection mechanisms. This solution is designed to offer high performance with low resource consumption, making it ideal for various embedded systems where security and efficiency are paramount. EnSilica has integrated various cryptographic components, including True Random Number Generators (TRNGs), to support extensive security protocols. These components are critical in applications such as secure communications, financial transactions, and personal data protection, where unauthorized access prevention is crucial. The streamlined architecture of eSi-Crypto ensures it can be efficiently implemented across diverse system architectures, offering scalable security solutions for emerging digital threats. Its flexibility allows customization and integration with other IPs, providing a seamless security shield for both legacy and new systems.
The Flash Protection Series is a sophisticated suite of security solutions designed to extend the secure boundaries of SoC architectures into flash storage realms. By utilizing PUF technology, this series offers three primary solutions: PUFef for embedded flash, PUFenc for external NAND flash, and PUFxip for external NOR flash. Each solution provides unique protection capabilities such as encryption, real-time decryption, and execution to maintain data integrity and confidentiality. With these protections in place, SoCs achieve a higher level of security, preventing unauthorized access and ensuring that sensitive data remains protected throughout its lifecycle. This series is compatible with a wide range of foundries, making it a flexible choice for designers aiming to implement robust security measures without compromising on performance or compatibility.
Securyzr iSSP is an advanced integrated Security Service Platform that manages the security lifecycle of connected devices from chip to cloud. It provides a seamless solution for provisioning, firmware updates, security monitoring, and device identity management. This platform ensures reliability with zero-touch security services and is built to adapt to various lifecycle stages of embedded systems.
ParkerVision's Direct-to-Data (D2D) Technology marks a transformative development in RF communication, significantly enhancing the performance of modern smartphones and wireless devices. This innovative technology replaces the century-old super-heterodyne downconverter with a new RF downconverter that operates efficiently within CMOS architectures. D2D allows RF receivers to connect more seamlessly across global bands while processing high data rates essential for today's media and communication needs. D2D RF receivers built on ParkerVision technology minimize power usage while delivering fast data speeds, substantially contributing to the functionality and efficiency of modern smartphones. These receivers are capable of handling a wide spectrum of data rates from streaming video to large data transfers, thanks to their high-performance design capable of managing a range of signal strengths from various distances with cellular towers. This patented technology plays a crucial role in the smartphone revolution, with its incorporation leading to smarter, faster devices. These developments are enabled by a precise downconversion mechanism that transforms high-frequency RF signals into data-efficient formats. The D2D technology reduces the traditional noise and signal loss, making it a cornerstone in the advancement of mobile and IoT device communication strategies.
The AES Core from Green IP Core provides robust encryption capabilities crucial for maintaining data security across a variety of platforms. It employs advanced encryption standards to safeguard sensitive information, thereby serving as a foundation for secure communication and data storage solutions. This IP is versatile enough to be implemented in both consumer electronics and large-scale enterprise systems where data protection is paramount. Designed with efficiency in mind, this core optimizes hardware resource usage, delivering high-speed encryption while minimizing impact on performance. Its architecture is specifically tailored to offer seamless integration into existing systems, requiring minimal reconfiguration of current operations. This adaptability makes it an ideal choice for companies looking to bolster their security measures without significant infrastructure changes. The AES Core stands out due to its fault-tolerant design, ensuring that it remains operable even under conditions that may induce errors in traditional systems. This reliability factor is key for industries where data integrity and security are of utmost importance, including finance, telecommunications, and government sectors.
The Aeonic Integrated Droop Response System introduces a revolutionary approach to managing voltage droop in intricate circuitry. By pairing droop mitigation with detection, it achieves unprecedented adaptability, responding within high-speed clock cycles, thus aiding in significant power savings. Equipped with multi-threshold detection and supported by standard interfaces like APB & JTAG, it facilitates remote and local droop management, providing a wealth of actionable insights for silicon lifecycle analytics. Design architects benefit from these insights, allowing precision-driven power management decisions. This tightly integrated system adopts a standard cell design, making it process portable across varying technological nodes. Its features ensure reliability and adaptability, aiding design teams to efficiently migrate solutions across evolving production landscapes.
The Securyzr Key Management System is pivotal in safeguarding cryptographic keys within various systems. By facilitating key lifecycle management, this system ensures that keys remain secure from creation through destruction. It offers an intuitive interface for administrators to oversee and manage keys across their network, providing peace of mind with enhanced access controls and auditing capabilities.
The RISC-V CPU IP NS Class is crafted explicitly for applications requiring heightened security and robustness, such as fintech payment systems and IoT security solutions. This processor class is equipped to support secure operations, incorporating features essential for protecting data and ensuring secure communications within devices. This processor integrates security protocols aligned with the RISC-V open standard, offering developers the ability to embed reliable security measures directly at the hardware level. Its architecture provides the foundation for developing systems where data integrity and secure processing are non-negotiable, ensuring that sensitive applications run safely and efficiently. The RISC-V CPU IP NS Class is supported by a strong ecosystem offering tools and resources to facilitate the secure application development process. With its ability to integrate seamlessly with other embedded systems, the NS Class empowers designers to create solutions that prioritize and enhance security in modern digital environments, where threats are constantly evolving.
FIPS 140-3 CAVP-compliant, compact PQC hardware acceleration for subsystems PQPlatform-CoPro combines hash-based and lattice-based post-quantum cryptography that can be added to an existing security subsystem. It can be optimized for minimum area, maintaining high-performance, and is designed to be run by an existing CPU using PQShield-supplied firmware, meaning it involves low integration effort and flexible configurations to support a wide variety of use cases, including quantum-safe secure boot. Solutions are available for hardware acceleration of SHA-3, SHAKE, ML-KEM, ML-DSA, alongside traditional cryptography. In addition, PQPlatform-CoPro can be configured with side-channel protection. PQPlatform-CoPro is covered by multiple PQShield implementation patents.
Tower Semiconductor showcases its advanced CMOS Image Sensor technology, designed for high-performance optical applications. This technology is crafted to meet the diversified needs of industrial, medical, consumer, and automotive sectors, providing unparalleled imaging quality and customizable pixel designs. It supports a sophisticated range of applications from DSLR cameras to high-end smartphones and security systems. The platform offers Back-Side and Front-Side Illumination capabilities, ensuring superior light sensitivity and efficiency. Coupled with Tower's extensive expertise in pixel technology, the CMOS image sensors promise high resolution and low noise, key components in delivering exceptional image quality. Committed to pushing the boundaries of sensor resolution and capability, Tower Semiconductor supports 8” and 12” wafer platforms, accommodating large sensor designs needed for professional photography and scientific applications. This level of adaptability and performance solidifies their position as experts in imaging technology, constantly evolving to keep pace with the demands for more sophisticated, high-performance imaging devices.
Integrated Secure Element (iSE) acts as the root of trust within a system on chip (SoC) design, offering services such as secure boot, key storage, and tamper protection. iSE is engineered to guard against unauthorized access by housing sensitive operations in a highly secure environment, making it indispensable for applications requiring a fortified security framework.
NeoPUF by eMemory Technology is a pioneering hardware security solution utilizing Physical Unclonable Function (PUF) technology. Designed to provide robust protection against unauthorized access and duplication, NeoPUF offers a unique security feature by exploiting the natural variability in silicon characteristics. This randomness is used to generate device-specific keys that are virtually impossible to replicate, ensuring a high level of security for sensitive data and cryptographic processes. NeoPUF's architecture supports a variety of security applications, including secure key storage and identity authentication. Its scalability and flexibility allow it to be integrated across different process nodes, making it an essential security element in IoT devices, automotive security systems, and other critical sectors requiring stringent cybersecurity measures.
FIPS 140-3 CAVP compliant ultra-fast, compact, and power efficient secure hash acceleration PQPlatform-Hash is a power side-channel accelerator, supporting a wide range of Hash-Based Signature Schemes (HBSS). PQPlatform-Hash deploys tried-and-tested HBSS including quantum-safe LMS and XMSS (not hybrid). It provides acceleration of HBSS in embedded devices, especially where high throughput is required, or resource constraints necessitate minimal additional area. For example, PQPlatform-Hash is a solution for secure first-stage boot loading with hash-based signature schemes. HBSS offer different trade-offs of memory/area to lattice-based schemes, and as a result, PQPlatform-Hash is ideally suited for smaller key sizes, larger signature sizes, and processing times for key generation, signature generation and verification.
The QDID PUF provides a unique identity based directly on quantum effects observed in standard CMOS processes. These identities are inherently secure due to the randomness that originates from variations in device oxide thickness and defect distribution. By leveraging such inherent unpredictability, QDID PUFs form a robust basis for hardware root-of-trust. This IP simplifies secure provisioning by avoiding traditional factory-based key injections, thereby reducing reliance on external secure manufacturing processes. QDID PUFs also ensure that identities are not stored in memory, instead being generated dynamically. This characteristic defends against side-channel attacks exploiting memory vulnerabilities. Additionally, the high entropy of the quantum effects they harness offers robust resistance to machine learning-based entropy source attacks, generating customizable security seeds up to 256 bits. Boosting its security, the QDID PUF integrates strategic countermeasures against side-channel attacks and has been certified to comply with stringent standards like PSA Level 2 and CC EAL4+. It supports wide-ranging environmental conditions and boasts extensive process node compatibility with major fabrication technologies. Typically used for key generation and device authentication, it represents the vanguard of cryptographic consistency for post-quantum applications.
Digital Systems and Security Solutions offer cutting-edge digital IP solutions that encompass security features vital for modern applications. These systems are designed to enhance encryption and data protection capabilities, ensuring a high level of security for sensitive information. By integrating advanced digital logic and security protocols, they are adept at handling complex computational processes while maintaining optimum performance. These solutions are integral for applications requiring stringent security standards, facilitating safe and efficient data handling and processing, thereby aligning with the industry's best practices for digital reliability and safety.
FortiPKA-RISC-V is a high-speed public key accelerator that enhances the efficiency of cryptographic tasks by offloading complex operations from the main CPU. It is particularly effective for tasks involving large integer arithmetic typical in asymmetric cryptography. The design eliminates the need for data transformations linked to Montgomery domain conversion, boosting performance significantly. The RISC-V core allows flexible integration using interfaces such as AMBA AXI4, APB, and others. It supports a wide range of cryptographic algorithms including RSA, ECDSA, and SM2, maintaining resilience against side-channel attacks through robust technological methodologies. This solution proves ideal for embedded systems in IoT, automotive, and payment systems, offering high configurability to align with specific performance and area requirements.
This IP focuses on advancing encryption methods to counteract threats posed by quantum computing. By using algorithms robust enough to withstand the computational power of quantum machines, the Post-Quantum Cryptography IP ensures the continued confidentiality of sensitive data long into the future. Collaboration with industry and academia allows Secure-IC to be at the cutting edge of this technological evolution.
Green IP Core's Fault Resistant AES Core elevates data encryption by combining robust cryptographic standards with enhanced fault tolerance. This technology is engineered to offer both security and reliability, addressing vulnerabilities that can arise from potential soft errors in cryptographic operations. This core is ideal for deployment in environments where faults can interfere with traditional AES implementations, such as in extreme environmental conditions or where high electromagnetic interference is present. It leverages intelligent error management, which preemptively identifies and corrects any anomalies, ensuring that encryption processes remain intact and reliable. Fault resistance in this core does not compromise its speed or efficiency. It continues to provide high-throughput encryption capabilities while ensuring that all security procedures are maintained under varying operational stresses. This makes it a valuable asset for sectors that require uncompromised data security, particularly where regulatory compliance is a factor, such as in healthcare, defense, and financial services.
PUFhsm is an advanced Hardware Security Module (HSM) developed specifically for automotive and other high-security applications. It serves as an 'Embedded Security Enclave', freeing the main CPU from handling secure tasks while ensuring comprehensive protection through EVITA-Full compliance. With capabilities such as secure boot, updates, provisioning, and lifecycle management, PUFhsm stands as a robust solution for fulfilling stringent security requirements. The module integrates cryptographic engines and a dedicated CPU, and offers extensive features for managing cryptographic keys and securing communications. By adopting PUFhsm, designers can enhance security architectures, minimizing tampering risks and improving the overall reliability of systems in mission-critical environments.
VisualSim Technology IP offers a comprehensive library of over 150 pre-designed blocks that facilitate rapid system design and verification. These blocks cover a wide array of domains from hardware interfaces and processors to resource management systems and network models, each defined with precise functionality, timing, and power attributes. Each IP block is modeled according to standards or vendor datasheets and validated against timing diagrams ensuring accurate implementation in system-level models. The blocks include a variety of specifications that users can manipulate, such as buffer sizes, scheduler settings, and arbitration schemes, making them highly customizable to specific design requirements. The technology IP also supports polymorphic behavior and standard connectivity across different hardware and interfaces, eliminating the need for custom converters. Designed to maintain adherence to the latest industry standards, VisualSim Technology IP provides backward compatibility and regular updates to support evolving project needs. Users are given the ability to delve into the internals of these models, modify them as required, and conduct extensive analysis through a suite of reporting tools that provide insights on utilization, delays, and effectiveness of arbitration schemes.
NeoFuse is an anti-fuse OTP silicon IP developed by eMemory Technology, designed to offer robust security and reliability in data storage. Unlike traditional fuse-based systems, NeoFuse utilizes an anti-fuse mechanism that creates a permanent connection when programmed, ensuring that stored data is impervious to accidental erasure or tampering. This advanced design supports a broad range of applications, including secure key storage, code protection, and parameter settings within semiconductor devices. NeoFuse's adaptability allows it to be implemented across various process nodes, making it a versatile solution for the latest technological innovations. It stands as an essential component in security-critical applications, ensuring that sensitive data remains secure and tamper-proof throughout the product's lifecycle.
The Security Protocol Accelerator is engineered to enhance cryptographic processes within digital systems by offloading computationally intensive operations. By integrating this solution, systems benefit from accelerated security protocols while maintaining a low power footprint and efficient resource usage. Designed specifically for secure data transactions, this accelerator manages both symmetric and asymmetric cryptography. It enables seamless encryption processes for secure communications channels, ensuring data privacy and integrity across various platforms. As systems evolve to address ever-growing security challenges, the Security Protocol Accelerator provides the necessary infrastructure for enhancing real-time data protection protocols. This product not only ensures compliance with contemporary security standards but also prepares systems for future technology advancements, laying a foundation for post-quantum cryptographic frameworks.
Suite-Q SW consists of a versatile cryptographic software library designed for optimizing code size, stack usage, and performance across various embedded processors and microcontrollers. Available in portable C code and high-speed assembly, Suite-Q SW can be tailored to fit the specific needs of diverse development environments. This library provides extensive support for symmetric and asymmetric cryptographic functions, catering to systems ranging from high-end processors to memory-constrained embedded devices. By facilitating efficient cryptographic computations, Suite-Q SW ensures minimal impact on system performance while maximizing data security. Its adaptability is marked by simple integration modules that work seamlessly with hardware accelerators, enabling enhanced cryptography for both standard and custom specifications. This reliability makes Suite-Q SW an indispensable tool for ensuring secure communication channels while maintaining an optimal balance between speed and resource utilization.
For applications requiring ISO26262 functional safety standards, the RISC-V CPU IP NA Class caters to the automotive industry's safety-critical demands. This processor is tailored to support the development of automotive systems that demand rigorous safety protocols and are utilized in high-assurance environments, where failures are not an option. By adhering to functional safety standards like ASIL-B and ASIL-D, the NA Class processors lay the groundwork for developing safe automotive solutions. Its architecture is crafted to manage safety requirements effectively, enabling automotive manufacturers to integrate reliable safety mechanisms directly into their products, ensuring compliance with industry standards. The RISC-V CPU IP NA Class is integrated into an ecosystem that includes support for development tools necessary to leverage the processor's capabilities fully. From simulation environments to safety-focused development kits, these resources help streamline the process of creating and validating automotive solutions, ultimately ensuring that vehicles equipped with NA Class processors operate safely under all conditions.
The SHA-3 Crypto Engine is a hardware accelerator designed for cryptographic hashing functions, featuring high throughput and area efficiency. Compliant with NIST's FIPS 202 standard, it supports the full suite of SHA-3 hash functions, including SHA-3-224, SHA-3-256, SHA-3-384, and SHA-3-512. The engine also handles extendable output functions (XOF) like SHAKE-128 and SHAKE-256. Designed for security-critical applications, it offers full protection against timing-based side-channel attacks and operates within a single clock domain. This IP core is ideal for tasks requiring data integrity and secure authentication, such as blockchain, IPsec, and e-commerce. The SHA-3 IP core excels in various applications, from cryptographic hashing for Message Authentication Codes (MAC) and secure boot engines to encrypted data storage solutions and financial transaction systems. Its synchronous design and extensive verification make it highly reliable for maintaining data integrity across diverse protocols including TLS/SSL. Designed to integrate seamlessly into any FPGA or ASIC, it ensures maximal security and performance. Noteworthy features include automatic byte padding and an AMBA AXI4-Stream interface, facilitating easy implementation. With its proven resource efficiency, it serves a multitude of industries seeking robust cryptographic solutions. The SHA-3 engine is versatile enough for numerous security applications, maintaining performance efficiency even under demanding conditions.
The iShield Key by Swissbit is a state-of-the-art security device designed to safeguard both digital and physical access. Engineered to offer advanced protection, this device enables users to securely access websites, services, and corporate networks, while also providing secure physical entry control. By integrating easily into daily workflows, the iShield Key supports a comprehensive, hybrid security approach, making it ideal for use in diverse environments, from IT systems to secure printing solutions.
The Keccak Hash Engine IP Core serves as a flexible and versatile cryptographic function suitable for a variety of applications beyond hashing, including encryption, authentication, and pseudo-random number generation (PRNG). The core uses the innovative sponge construction, particularly the Keccak-f cryptographic permutation, providing excellent security and adaptability. Standardized by NIST and utilized in 3GPP TS 35.231 for mobile telephony, Keccak is adaptable to different output lengths and security levels, making it ideal for diverse industrial applications like blockchain and secure communications. Its design simplifies integration and coding practices, featuring a single clock domain for seamless deployment. The IP core ensures flexibility and robust security, allowing easy configuration to meet specific security requirements. It is extensively verified for secure use in various protocols, offering consistent and reliable performance in maintaining data integrity and encryption tasks.
The DSHA2-512 core specializes in the SHA2-512 hashing algorithm, providing a highly efficient means to process hashing functions in data-intensive environments. It is designed to comply with FIPS PUB 180-4 standards, ensuring that it meets established guidelines for secure hashing operations necessary in a variety of industry settings. With interfaces that include APB, AHB, and AXI, the DSHA2-512 exhibits broad compatibility with existing digital infrastructures, enabling it to be deployed across a wide array of technology solutions. This core is ideal for sectors where ensuring data integrity and authenticity is critical, such as finance, governmental, and secure communications sectors. Its enhanced technical capabilities mean that the DSHA2-512 core supports extensive data processing requirements while maintaining the security integrity of hashes, making it an essential component for applications that demand reliable hash computation and data security.
The DSHA2-256 core is a dedicated solution for hashing functions, specifically designed to excel in processing the SHA2-256 algorithm. Compliant with the FIPS PUB 180-4 standards, this universal core accelerates the hash operation, providing efficient and secure data processing options for diverse digital systems. Its architecture supports both APB, AHB, and AXI bus interfaces, allowing for easy integration into numerous applications that require robust hashing mechanisms. The core enhances processing capabilities, facilitating the rapid execution of secure hash functions that protect data integrity and authenticity. This IP core is invaluable in fields where data security and integrity are critical, such as banking, digital communication, and any networked environment where information verification is necessary. By providing dedicated hardware for hashing tasks, it ensures high levels of data protection and performance, making it an ideal choice for developers looking to implement reliable security solutions.
Rambus provides comprehensive Root of Trust (RoT) solutions designed to elevate the security capabilities of SoC hardware platforms. This security IP is integrally linked with programmable secure co-processors and supports features like Quantum Safe Cryptography. The Root of Trust is based on the latest security protocols providing FIPS 140 CMVP and ISO 26262 options suitable for government and automotive sectors. With an emphasis on flexibility, these solutions secure data throughout its lifecycle, offering robust protections against hardware and software threats.
The iShield HSM by Swissbit is an innovative hardware security module designed to protect IoT devices by storing security keys securely, thus providing robust device authentication and registration. This plug-and-play security anchor can seamlessly retrofit existing AWS IoT Greengrass devices, offering an essential upgrade for field-deployed systems. The iShield HSM ensures that device encryption keys are stored securely, preventing unauthorized duplication and enhancing overall system security through reliable hardware-based protection.
Comcores' MACsec solution addresses the needs for secure communication on Ethernet links by implementing the IEEE 802.1AE standard for MAC Security. It provides comprehensive protection against eavesdropping and manipulation, making it suitable for applications demanding high security over public and private networks. Built to support various data rates, the MACsec IP core integrates robust cryptographic suites like AES-GCM to encrypt and authenticate network traffic. Its deployment ensures data confidentiality and integrity, fostering a secure environment for transmitting sensitive information such as in military communication systems and data centers.
The DSHA2-384 core is optimized for executing the SHA2-384 hash function, ensuring secure and efficient handling of hashing operations within digital systems. It fully complies with FIPS PUB 180-4 standards, ensuring adherence to widely recognized security protocols and making it ideal for industries that demand high standards of data protection. This IP core supports a variety of bus interfaces including APB, AHB, and AXI, providing compatibility with a broad range of system architectures. Its advanced security features enhance hashing processes, enabling rapid and secure management of data in applications that range from financial transactions to complex data security implementations. For security-focused applications, the DSHA2-384 core offers unmatched reliability and performance. It suits environments where data integrity is paramount, supporting industries that need robust digital security measures. The core facilitates secure communications and encrypted storage, making it a vital tool for safeguarding sensitive information in a digital-first world.
The UniqueID PUF Core utilizes microscopic variations inherent in manufacturing to create a distinct fingerprint, enabling robust security features through physically unclonable functions (PUFs). This technology is pivotal for creating secure cryptographic keys, key to safeguarding data through processes like encryption and decryption. By leveraging these intrinsic variations found in each chip, the UniqueID PUF Core offers an unmatched security method, ensuring each device has a unique identity that is nearly impossible to replicate. This translates to enhanced security measures that adapt to the growing demand for secure communication and data protection. In an era where cybersecurity is increasingly critical, this core is tasked with providing inherent security to devices by facilitating secure operations inherently tied to the uniqueness of each FPGA. Its application spans across secure communications, safe data transfer systems, and reducing potential breaches by enforcing a robust layer of hardware security.
The KiviPQC-KEM is a cutting-edge cryptographic IP Core tailored for post-quantum security requirements, offering robustness against quantum attacks. It supports ML-KEM Key Encapsulation, enabling secure key exchanges over public channels, fully compliant with NIST's FIPS 203 standards. This IP Core provides essential hardware acceleration for ML-KEM operations, optimizing key generation, encapsulation, and decapsulation processes. Designed to ensure minimal logical footprint, it operates with high efficiency and flexibility, integrating seamlessly into existing ASIC and FPGA systems without compromising performance. KiviPQC-KEM's features make it indispensable for developing quantum-resistant networks, enhancing public key infrastructures, and securing electronic transactions. The core is particularly noted for its cost-efficiency and resource optimization, presenting a versatile solution for future-proofing embedded systems against evolving cryptographic threats.
The ChevinID™ Silicon Security Solution is an innovative approach to securing the integrity of silicon devices throughout their lifecycle. This unique solution intelligently detects and authorizes changes during silicon chip production, offering robust protection against malicious activities such as hacking and cloning. ChevinID™ ensures that each step in the production process is verified, maintaining the security and authenticity of the silicon. Capable of being implemented in FPGAs, ASICs, or SiP designs, ChevinID™ is vendor-agnostic, making it versatile across platforms and compatible with various manufacturing technologies. It features flexible management and upgrade paths, allowing users to control features and maximize potential revenue streams. Organizations focused on defense, cybersecurity, and any sector reliant on secure silicon products will find ChevinID™ particularly valuable. This solution effectively addresses today's critical security challenges, providing a trusted framework for secure silicon production and ensuring compliance with stringent industry standards.
Roa Logic's Platform-Level Interrupt Controller (PLIC) is a fully compliant RISC-V peripheral designed to manage multiple interrupt sources within a system. Its highly parameterized nature allows for extensive customization to suit specific application requirements. The PLIC is integral to maintaining efficient interrupt handling, an essential aspect of modern digital systems where managing concurrent tasks is critical. As a RISC-V compliant component, the PLIC is designed to integrate seamlessly with systems that use the RISC-V instruction set, enhancing their capability to manage interrupts in a structured and scalable manner. The controller supports a broad range of configurations, ensuring it can handle diverse applications, from simple to complex systems with multiple processing elements. Roa Logic provides comprehensive support for the PLIC, including detailed documentation and test benches to facilitate its integration and deployment. This ensures that developers can leverage its full potential in their projects, optimizing system performance and responsiveness. The PLIC's adaptability and compliance with industry standards make it an essential component for any RISC-V based architecture aiming for efficient interrupt management.
Fault Injection Detection technology offers a defensive layer against physical manipulation attempts on semiconductor devices. It includes modular detectors to identify anomalies in clock, power, and thermal profiles, crucial for maintaining the integrity of secure embedded systems. This IP is particularly relevant for applications in highly regulated fields like automotive, medical, and industrial electronics. The IP can be customized for sensitivity levels and pulse durations to match specific threat models of a given SoC design. By incorporating such defenses alongside existing cryptographic measures, it significantly enhances the security profile and resilience of a system against real-world attack vectors. Features like glitch detection, thermal anomaly sensors, and voltage monitoring work cohesively to shield cryptographic cores and trusted modules from physical tampering. Together they form a certified-ready design solution that aligns with stringent industry standards, simplifying the process of achieving necessary hardware security certifications.
QRoot Lite is a versatile, lightweight root-of-trust designed to bring essential security functionalities directly into resource-limited silicon designs. It is particularly beneficial for MCUs and IoT devices, offering features such as secure boot, device attestation, and sealed storage. Conforming to the TCG MARS specification, it simplifies the process of integrating robust security capabilities into embedded systems, supporting ASIC and SoC frameworks. Targeted at applications with stringent size and power constraints, QRoot Lite minimizes the silicon footprint while delivering high-impact security features. Its integration supports compliance with industry security standards, simplifying adherence to regulatory mandates. By eliminating the need for external TPMs and optimizing for constrained environments, it significantly cuts costs and complexity for manufacturers. QRoot Lite's adaptable architecture supports various cryptographic algorithms and is equipped to handle future security evolution, thus assuring long-term product reliability. Its optimized gate count, paired with standard industry interface support, enables developers to integrate sophisticated security measures without significant changes to their existing workflows. This adaptability and pre-certified compliance make QRoot Lite a strategic choice for secure, future-forward embedded designs.
The Agile Secure Element offers customizable, high-security solutions for SoCs, focusing on embedding trust despite area limitations. It integrates a secure processor, hardware-engineered cryptographic functionalities, and capabilities allowing for secure boot, key storage, and trusted execution to fortify your silicon designs. Equipped with an optional RISC-V core, the subsystem ensures secure management of key functions and efficiently controls lifecycle management, making it an excellent support for compliance with various security standards. Agile Secure Element’s efficient modular design simplifies certification processes and enhances product scalability. It supports a comprehensive range of cryptographic processes, including cutting-edge post-quantum algorithms. The secure microprocessor subsystem, combined with versatile interface compatibility, makes integrating it into heterogeneous and subsystem-based SoCs straightforward and fast. This flexible security structure aids in swift market entry without the cost and delay of custom solutions.
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