All IPs > Security IP > Platform Security
In today's digital world, the importance of platform security cannot be overstated. Platform security semiconductor IPs are essential for protecting electronic systems from an increasing array of threats. These IPs play a critical role in ensuring that systems remain secure by safeguarding data, communications, and applications from unauthorized access or malicious attacks.
Platform security IPs include a variety of solutions such as encryption engines, secure boot mechanisms, and trusted execution environments. These technologies work in harmony to validate the authenticity of hardware and software components, providing a comprehensive security framework for electronic devices. By integrating these security measures at a fundamental level, semiconductor IPs ensure that systems are resilient to tampering and meet stringent security standards.
The applications of platform security semiconductor IPs span across a multitude of industries. From consumer electronics like smartphones and smart home devices to critical infrastructure systems and automotive applications, robust security is imperative. These IPs are designed to address the security needs of both edge devices and cloud-based platforms, preserving the integrity and confidentiality of sensitive data as it is processed and transmitted.
In our Silicon Hub, you will find a diverse array of platform security semiconductor IPs tailored to meet varied security requirements. Whether you're looking to protect consumer devices or safeguard enterprise data centers, our cutting-edge IP solutions provide the reliability and flexibility needed to counteract evolving security threats. Explore our category to enhance your products with state-of-the-art security technologies.
The Akida IP is an advanced processor core designed to mimic the efficient processing characteristics of the human brain. Inspired by neuromorphic engineering principles, it delivers real-time AI performance while maintaining a low power profile. The architecture of the Akida IP is sophisticated, allowing seamless integration into existing systems without the need for continuous external computation. Equipped with capabilities for processing vision, audio, and sensor data, the Akida IP stands out by being able to handle complex AI tasks directly on the device. This is done by utilizing a flexible mesh of nodes that efficiently distribute cognitive computing tasks, enabling a scalable approach to machine learning applications. Each node supports hundreds of MAC operations and can be configured to adapt to various computational requirements, making it a versatile choice for AI-centric endeavors. Moreover, the Akida IP is particularly beneficial for edge applications where low latency, high efficiency, and security are paramount. With capabilities for event-based processing and on-chip learning, it enhances response times and reduces data transfer needs, thereby bolstering device autonomy. This solidifies its position as a leading solution for embedding AI into devices across multiple industries.
aiWare is a high-performance NPU designed to meet the rigorous demands of automotive AI inference, providing a scalable solution for ADAS and AD applications. This hardware IP core is engineered to handle a wide array of AI workloads, including the most advanced neural network structures like CNNs, LSTMs, and RNNs. By integrating cutting-edge efficiency and scalability, aiWare delivers industry-leading neural processing power tailored to automobile-grade specifications.\n\nThe NPU's architecture emphasizes hardware determinism and offers ISO 26262 ASIL-B certification, ensuring that aiWare meets stringent automotive safety standards. Its efficient design also supports up to 256 effective TOPS per core, and can scale to handle thousands of TOPS through multicore integration, minimizing power consumption effectively. The aiWare's system-level optimizations reduce reliance on external memory by leveraging local memory for data management, boosting performance efficiency across varied input data sizes and complexities.\n\naiWare’s development toolkit, aiWare Studio, is distinguished by its innovative ability to optimize neural network execution without the need for manual intervention by software engineers. This empowers ai engineers to focus on refining NNs for production, significantly accelerating iteration cycles. Coupled with aiMotive's aiDrive software suite, aiWare provides an integrated environment for creating highly efficient automotive AI applications, ensuring seamless integration and rapid deployment across multiple vehicle platforms.
Overview: The Secure Enclave IPs are Common Criteria (CC) EAL5+PP0084/PP0117 and EAL5+PP0117 certification-ready Secure Enclaves, respectively. They are available as hard macros for seamless integration into SoCs. These Secure Enclave IPs provide the highest level of security for an SoC, incorporating patented design techniques and countermeasures against side-channel and perturbation attacks to ensure robust security while minimizing power consumption. Key Features: Cryptographic Hardware Accelerators: Efficiently support standard cryptography and security operations to increase throughput while adhering to power constraints and security requirements. BootROM and Secondary Boot Loader: Manage the certified life cycle of the Secure Enclave, enforcing and assuring security from manufacturing to deployment. Proprietary IP: Based on proprietary IP that is free of 3rd party rights and royalties. Benefits: The Secure Enclave IPs offer robust security measures, efficient cryptographic support, and secure life cycle management, making them ideal for applications that require the highest levels of security and reliability. Applications: The Secure Enclave IP is versatile and suitable for a wide range of applications, including but not limited to: Secured and Certified iSIM & iUICC EMVco Payment Hardware Cryptocurrency Wallets FIDO2 Web Authentication V2X HSM Protocols Smart Car Access Secured Boot Secure OTA Firmware Updates Secure Debug Any design requiring a Secure Enclave, Secure Element, or Hardware Root of Trust protected against side-channel and perturbation fault attacks. Compliance and Support: The Secure Enclave is compliant with and ready for CC EAL5+ and EMVCo certification. It is delivered with an SDK and pre-certified CryptoLibrary and secure Boot Loader for seamless integration and enhanced security.
Secure OTP from PUFsecurity is the next evolution in data protection, utilizing a secure anti-fuse OTP memory for storing keys and sensitive information. It enhances traditional OTP by providing a comprehensive protection mechanism against hardware attacks. The solution features digital and physical macros along with a resilient anti-tamper shell, supporting multiple interfaces for smooth integration into diverse IC applications.
D2D® Technology, developed by ParkerVision, is a revolutionary approach to RF conversion that transforms how wireless communication operates. This technology eliminates traditional intermediary stages, directly converting RF signals to digital data. The result is a more streamlined and efficient communication process that reduces complexity and power consumption. By bypassing conventional analog-to-digital conversion steps, D2D® achieves higher data accuracy and reliability. Its direct conversion approach not only enhances data processing speeds but also minimizes energy usage, making it an ideal solution for modern wireless devices that demand both performance and efficiency. ParkerVision's D2D® technology continues to influence a broad spectrum of wireless applications. From improving the connectivity in smartphones and wearable devices to optimizing signal processing in telecommunication networks, D2D® is a cornerstone of ParkerVision's technological offerings, illustrating their commitment to advancing communication technology through innovative RF solutions.
The Polar ID is an innovative biometric security system that elevates facial recognition technology through its use of sophisticated meta-optics. By capturing and analyzing the unique polarization signature of a face, Polar ID delivers a new standard in security. This system can detect spoofing attempts that incorporate 3D masks or other similar deceptive tactics, ensuring high security through accurate human authentication. Polar ID minimizes the complexity typically associated with face recognition systems by integrating essential optical functions into a single optic. Its compact design results in cost savings and reduces the space required for optical modules in devices like smartphones. Operating in near-infrared light, Polar ID can consistently deliver secure face unlock capabilities even under challenging lighting conditions, dramatically outperforming traditional systems that may fail in bright or dark environments. The platform does not rely on time-of-flight sensors or structured light projectors, which are costly and complex. Instead, Polar ID leverages the simplicity and efficiency of its single-shot identification process to deliver immediate authentication results. This makes it a potent tool for securing mobile transactions and providing safer user experiences in consumer technology.
Specially engineered for the automotive industry, the NA Class IP by Nuclei complies with the stringent ISO26262 functional safety standards. This processor is crafted to handle complex automotive applications, offering flexibility and rigorous safety protocols necessary for mission-critical transportation technologies. Incorporating a range of functional safety features, the NA Class IP is equipped to ensure not only performance but also reliability and safety in high-stakes vehicular environments.
FIPS 140-3 CAVP compliant ultra-fast, compact, and power efficient secure hash acceleration PQPlatform-Hash is a power side-channel accelerator, supporting a wide range of Hash-Based Signature Schemes (HBSS). PQPlatform-Hash deploys tried-and-tested HBSS including quantum-safe LMS and XMSS (not hybrid). It provides acceleration of HBSS in embedded devices, especially where high throughput is required, or resource constraints necessitate minimal additional area. For example, PQPlatform-Hash is a solution for secure first-stage boot loading with hash-based signature schemes. HBSS offer different trade-offs of memory/area to lattice-based schemes, and as a result, PQPlatform-Hash is ideally suited for smaller key sizes, larger signature sizes, and processing times for key generation, signature generation and verification.
FIPS 140-3 CAVP-compliant, compact PQC hardware acceleration for subsystems PQPlatform-CoPro combines hash-based and lattice-based post-quantum cryptography that can be added to an existing security subsystem. It can be optimized for minimum area, maintaining high-performance, and is designed to be run by an existing CPU using PQShield-supplied firmware, meaning it involves low integration effort and flexible configurations to support a wide variety of use cases, including quantum-safe secure boot. Solutions are available for hardware acceleration of SHA-3, SHAKE, ML-KEM, ML-DSA, alongside traditional cryptography. In addition, PQPlatform-CoPro can be configured with side-channel protection. PQPlatform-CoPro is covered by multiple PQShield implementation patents.
The Aeonic Integrated Droop Response System sets a new standard in addressing voltage droop issues within integrated circuits through its advanced droop detection and response capabilities. It is uniquely engineered to provide rapid, fine-grained DVFS capabilities, allowing significant reductions in system power requirements. With multi-threshold detection features and support for remote/local droop detection, this system effectively facilitates monitoring and management of critical silicon health metrics. The robust observability and programmability features make it an indispensable asset for adapting to silicon aging and optimizing lifecycle analytics.
eSi-Crypto provides advanced encryption and authentication capabilities crucial for safeguarding modern electronic systems. The IP includes features such as True Random Number Generators (TRNGs), cryptographic processing, and Public Key Acceleration. By optimizing resource usage while ensuring high throughput, this technology aids in protecting device data against cyber threats.
The NS Class is Nuclei's crucial offering for applications prioritizing security and fintech solutions. This RISC-V CPU IP securely manages IoT environments with its highly customizable and secure architecture. Equipped to support advanced security protocols and functional safety features, the NS Class is particularly suited for payment systems and other fintech applications, ensuring robust protection and reliable operations. Its design follows the RISC-V standards and is accompanied by customizable configuration options tailored to meet specific security requirements.
Trilinear Technologies' HDCP Encryption-Decryption Engine is a sophisticated solution designed to safeguard digital content as it traverses various transmission channels. This engine is compliant with the HDCP standards 1.4 and 2.3, offering robust protection mechanisms to ensure that digital media investments are secure from unauthorized access and piracy. The engine’s hardware acceleration capabilities represent a crucial advantage, significantly reducing the load on the system processor while maintaining real-time encryption and decryption functions. This not only enhances performance but also extends the operational life of the hardware involved, making it suitable for high-demand media applications across sectors such as broadcast, entertainment, and corporate environments. Trilinear’s HDCP Encryption-Decryption Engine ensures compatibility with a wide array of consumer and professional-grade video equipment, providing seamless protection without interference in media quality or transmission speed. Its flexible integration options allow it to be smoothly incorporated into existing infrastructures, whether in standalone media devices or complex SoC architectures. Supported by comprehensive software resources, the HDCP Encryption-Decryption Engine provides an all-encompassing solution that includes necessary software stacks for managing device authentication and link maintenance. Its ability to safeguard high-definition content effectively makes it an invaluable asset for entities focused on secure content delivery and rights management.
The patented QDID PUF by Crypto Quantique utilizes quantum tunneling current variations to produce a unique identity in standard CMOS processes. This solution leverages oxide thickness variations and trap distributions in the gate oxide to create an unpredictable and unclonable physically unclonable function (PUF). As a hardware root-of-trust, it simplifies secure provisioning and emits high-entropy seeds resistant to side-channel attacks, supporting up to 256-bit security strength. The QDID PUF's robustness is confirmed through extensive testing, including adherence to NIST standards, making it an ideal choice for secure device identity and post-quantum cryptographic applications.
The SHA-3 Crypto Engine is designed as a versatile and high-performance hardware accelerator for cryptographic hashing tasks. It supports all SHA-3 hash functions including SHA-3-224, SHA-3-256, SHA-3-384, and SHA-3-512 along with extendable output functions like SHAKE-128 and SHAKE-256. Its design ensures robust security, featuring full protection against timing-based side channel attacks, and includes automatic byte padding for convenience. Operating efficiently in a single clock domain, this engine is extensively verified to maintain data integrity across numerous applications, including blockchain, financial systems, and secure boot engines.
The DSHA2-512 core specializes in the SHA2-512 hashing algorithm, providing a highly efficient means to process hashing functions in data-intensive environments. It is designed to comply with FIPS PUB 180-4 standards, ensuring that it meets established guidelines for secure hashing operations necessary in a variety of industry settings. With interfaces that include APB, AHB, and AXI, the DSHA2-512 exhibits broad compatibility with existing digital infrastructures, enabling it to be deployed across a wide array of technology solutions. This core is ideal for sectors where ensuring data integrity and authenticity is critical, such as finance, governmental, and secure communications sectors. Its enhanced technical capabilities mean that the DSHA2-512 core supports extensive data processing requirements while maintaining the security integrity of hashes, making it an essential component for applications that demand reliable hash computation and data security.
Suite-Q HW is a comprehensive system-on-chip (SoC) design crafted to provide a complete suite of standardized cryptographic operations essential for securing communication protocols. Targeting both high-end servers and low-end embedded systems, this design leverages the same hardware accelerators but differs in processor core choices and connectivity solutions to cater to varied application needs. By offloading symmetric and asymmetric cryptographic operations, Suite-Q HW enhances execution efficiency while integrating features such as the NIST 800-90-compliant True Random Number Generator. Classical and post-quantum public key cryptographic support is provided, encompassing a range of protocols such as ECDSA, Ed25519, and Curve25519, alongside emerging post-quantum methodologies like isogeny-based and lattice-based cryptography. Furthermore, it supports hash-based signature protocols including XMSS and LMS, and integrates the Advanced Encryption Standard for versatile encryption needs. This SoC design is crafted to simplify integration into SoC and FPGA architectures while offering various performance grades to balance silicon footprint and overall performance. Beyond its seamless integration capability, Suite-Q HW demonstrates substantial power reductions compared to software implementations, making it a suitable choice for power-sensitive applications. Comprehensive validation tests, including known answer test vectors and simulation scripts, ensure reliability and integration efficiency.
Comcores' MACsec solution addresses the needs for secure communication on Ethernet links by implementing the IEEE 802.1AE standard for MAC Security. It provides comprehensive protection against eavesdropping and manipulation, making it suitable for applications demanding high security over public and private networks. Built to support various data rates, the MACsec IP core integrates robust cryptographic suites like AES-GCM to encrypt and authenticate network traffic. Its deployment ensures data confidentiality and integrity, fostering a secure environment for transmitting sensitive information such as in military communication systems and data centers.
PUFrt represents the pinnacle of hardware-based security, generating a unique and unclonable UID and key directly inside the chip. This security IP is fortified with features like OTP secure storage, TRNG, and a robust anti-tamper shell, forming a strong Root of Trust. Ideal for different environments, it can be seamlessly integrated with various security systems, including Crypto Engines and HSM modules, ensuring protection for IoT devices, automotive platforms, and edge AI applications.
NeoFuse introduces an anti-fuse OTP technology that enhances data security and reliability in semiconductors. This silicon IP is optimized for environments where security of stored data is paramount, offering a robust solution for secure memory applications. NeoFuse's architecture is distinguished by its ability to keep data intact without the possibility of being altered, making it ideal for applications involving encryption keys and digital rights management. Engineered for environments with high demands for data security, NeoFuse integrates seamlessly into SoCs, enhancing the security infrastructure. Its anti-fuse mechanism is a significant leap forward, providing unparalleled assurance against data tampering and unauthorized access. NeoFuse ensures that sensitive data is safeguarded throughout the device's operational life, proving indispensable for applications in sectors like finance and defense. The flexibility of NeoFuse makes it compatible with a wide range of technologies and platforms, aiding in the design of secure systems where data confidentiality and integrity are non-negotiable. By integrating NeoFuse, manufacturers can assure users of heightened security measures, making it a strategic component in the secure semiconductor landscape.
NeoPUF stands out in the realm of semiconductor security by redefining the parameters of protection with its superior capability to generate random numbers. This IP, characterized by extraordinary speed, is engineered to enhance the robustness of next-generation secure chips substantially. NeoPUF's architecture is meticulously designed to deliver hardware-based security that ensures data remains protected from unauthorized access. What sets NeoPUF apart is its innovative approach to integrating security at the chip level, providing an unparalleled foundation of trust. It integrates seamlessly into a broad spectrum of applications, ensuring that data integrity is maintained throughout the lifecycle of semiconductor products. NeoPUF's versatility makes it a preferred choice for sectors where data security is of paramount importance, such as banking and government communications. This IP serves as a critical component in the design of secure systems, providing the necessary infrastructure for safe data exchange and transaction authentication. By delivering multi-layered security mechanisms, NeoPUF safeguards sensitive information against emerging threats, thereby future-proofing semiconductor devices.
The Cramium PHSM by CrossBar is designed to secure digital assets with state-of-the-art multi-party computation technology. It provides a critical layer of security for devices by enabling MPC computations on a secure element. This integration ensures enhanced safeguarding of digital keys and assets, fostering trust in decentralized system setups. Key innovations of the Cramium include its zero-knowledge proof mechanism, which ensures that cryptographic keys are never fully reconstructed at any point, significantly reducing the risk of asset compromise. The device supports FIDO2 authentication, providing secure, phishing-resistant login capability over multiple accounts without compromising usability. Offering a robust infrastructure for the protection of digital assets, the PHSM aids in managing crypto assets securely even in scenarios of potential device loss. With modular architecture, it is tailored to fit diverse security policies and risk models, extending personalized key management and thresholds over a network of users and devices.
The DSHA2-256 core is a dedicated solution for hashing functions, specifically designed to excel in processing the SHA2-256 algorithm. Compliant with the FIPS PUB 180-4 standards, this universal core accelerates the hash operation, providing efficient and secure data processing options for diverse digital systems. Its architecture supports both APB, AHB, and AXI bus interfaces, allowing for easy integration into numerous applications that require robust hashing mechanisms. The core enhances processing capabilities, facilitating the rapid execution of secure hash functions that protect data integrity and authenticity. This IP core is invaluable in fields where data security and integrity are critical, such as banking, digital communication, and any networked environment where information verification is necessary. By providing dedicated hardware for hashing tasks, it ensures high levels of data protection and performance, making it an ideal choice for developers looking to implement reliable security solutions.
The Platform-Level Interrupt Controller (PLIC) by Roa Logic is a comprehensive solution for managing interrupt signals in sophisticated and large-scale computing environments. Compatible with RISC-V platforms, it is fully parameterised and offers an efficient means to handle and prioritize multiple interrupt sources. The PLIC's design emphasizes scalability and flexibility, allowing developers to adapt the module for a wide range of system requirements. The PLIC supports a configurable number of interrupt sources, each with customizable priority levels. This enables a tailored approach to the handling of critical interrupts, ensuring that high-priority tasks receive immediate attention. It serves as an essential building block for systems that demand precise and reliable interrupt management, making it indispensable in complex processor environments. With its easy integration into existing RISC-V platforms, the PLIC provides a seamless upgrade to traditional interrupt controllers. Its high level of adaptability ensures that it can be calibrated to complement specific system architectures, enhancing performance in varied operational scenarios.
The Column A/D Converter for Image Sensors is a specialized IP designed to facilitate high-performance analog-to-digital conversion within CMOS image sensors. Utilizing techniques like Single-Slope and "Warp & Walk" algorithms, this converter achieves precise digitization of analog input, ensuring high-resolution and high-speed performance. It is particularly useful in applications demanding rapid imaging such as digital cameras and surveillance systems. This IP supports up to 12-bit conversion accuracy, allowing it to handle high-frequency analog signals with exceptional fidelity. Its design incorporates innovative approaches to error minimization and noise reduction, such as the Fine Calibration Technique, which helps maintain integrity in signal processing. The converter's sophisticated architecture enables it to perform at low power, making it highly suitable for battery-powered imaging devices. Engineered with scalability in mind, the Column A/D Converter IP can be easily integrated into manufacturing processes, supporting various process nodes for maximum flexibility. The ability to maintain high-speed operation without compromising performance is essential in modern imaging applications, where fast and accurate data conversion is a prerequisite. By enhancing the imaging chain in electronics, the Column A/D Converter IP contributes significantly to improving image sensor capabilities, offering superior image quality and efficiency. Its adaptability ensures it meets the needs of complex imaging systems, providing a crucial component in the advancement of high-definition and high-speed imaging technologies.
The Securyzr Key Management System is a robust infrastructure for managing cryptographic keys efficiently across various applications and devices. This system provides essential functions such as key generation, storage, distribution, and lifecycle management, all while maintaining high security standards. It supports integration into existing systems, enabling seamless and secure management of cryptographic assets, which is vital for maintaining overall cybersecurity and integrity in device communication.
The Low Power Security Engine is a compact yet complete solution designed to safeguard resource-constrained embedded devices by providing low-power, high-efficiency security services. It supports ECDHE (Elliptic-curve Diffie-Hellman) and ECDSA (Elliptic Curve Digital Signature Algorithm), enabling robust cryptographic operations and secure data handling. This security engine is engineered to resist timing and side channel attacks, which are critical for maintaining data integrity and confidentiality. Optimized for power and area, it suits embedded systems requiring enhanced security features without compromising on resource usage. Applications extend from smart sensors and embedded SIMs to secure RFID systems, underscoring its versatility in IoT applications. Its AMBA standard interface ensures smooth integration into various platforms, making it a reliable addition to secure IoT deployments.
The DSHA2-384 core is optimized for executing the SHA2-384 hash function, ensuring secure and efficient handling of hashing operations within digital systems. It fully complies with FIPS PUB 180-4 standards, ensuring adherence to widely recognized security protocols and making it ideal for industries that demand high standards of data protection. This IP core supports a variety of bus interfaces including APB, AHB, and AXI, providing compatibility with a broad range of system architectures. Its advanced security features enhance hashing processes, enabling rapid and secure management of data in applications that range from financial transactions to complex data security implementations. For security-focused applications, the DSHA2-384 core offers unmatched reliability and performance. It suits environments where data integrity is paramount, supporting industries that need robust digital security measures. The core facilitates secure communications and encrypted storage, making it a vital tool for safeguarding sensitive information in a digital-first world.
The DES/3DES Core offers an extensive design that implements both the Data Encryption Standard (DES) and Triple DES (3DES) encryption and decryption, following the NIST FIPS 46-3 specification. It features the ability to process 64-bit data blocks using one, two, or three 56-bit keys across several cipher modes including ECB, CBC, and OFB. Because of its compact design, utilizing only 3,000 ASIC gates, it ensures high-speed operations reaching up to 3 Gbps at 90nm technology. This IP core is delivered as synthesizable Verilog or netlist format, featuring a completely self-contained design without the need for external memory.
CrossBar's ReRAM Secure Keys offer advanced security for cryptographic key storage by leveraging its inherent resistance to tampering and its non-volatile nature. This technology is strategically designed to fortify security protocols within systems requiring stringent data protection standards. The secure key storage leverages ReRAM's unique structure to impede unauthorized extraction, ensuring cryptographic keys are held with utmost confidentiality. Its robust security features make it a critical component for applications in financial transactions, secure communications, and the protection of personal and corporate data. Manufacturers can integrate these ReRAM Secure Keys seamlessly into a variety of devices, offering scalability and flexibility alongside top-tier security. This solution not only enhances device security but also provides a resilient defense against potential cyber threats.
PUFhsm provides a sophisticated hardware security module solution tailored for automotive chips and advanced applications. Acting as an Embedded Security Enclave, it isolates vital security operations from the main system. The module integrates a processor, cryptographic engines, and software to manage secure boot, deployment, key management, and secure monitoring. With EVITA-Full compliance, PUFhsm promises robust protection against complex threats and optimizes system efficiency for rapid market deployment.
Secure-IC's Integrated Secure Element (iSE) serves as a trusted platform embedded within the main SoC, offering vital security services like secure boot, key isolation, and anti-tampering protection. It is designed to serve as the cornerstone of a secured environment by providing a fundamental root of trust. The iSE enhances security by ensuring that sensitive operations are shielded from potential threats, making it an integral component for safeguarding sensitive data and ensuring the integrity of connected systems.
The AES IP Core is an ultra-compact implementation of the Advanced Encryption Standard (AES), utilizing the Rijndael block cipher algorithm. It is capable of processing 128-bit data blocks using either 128-bit, 192-bit, or 256-bit keys, and is compliant with NIST FIPS-197 standards. Offering a spectrum of encryption and decryption modes such as ECB, CBC, and CTR, this core supports various data paths, allowing for an efficient trade-off between size and performance. Designed for both ASIC and FPGA implementations, the AES core is self-contained, requiring no external memory, thus providing robustness against differential power attacks through optional data masking and cycle hiding features.
The Keccak Hash Engine provides a flexible and efficient platform for implementing cryptographic functions such as hashing, authentication, and encryption. Based on the revolutionary sponge construction, Keccak is known for its configurability and wide range of applications, from pseudo-random number generation to blockchain solutions. Standardized both in NIST's FIPS 202 and 3GPP TS 35.231, this engine has undergone extensive validation and analysis. Keccak's ability to adapt to various security levels and output lengths makes it a robust choice for developers focusing on high-security digital applications.
QRoot Lite is a lightweight and configurable root-of-trust IP tailored for resource-constrained microcontrollers and IoT devices. The solution provides comprehensive security features such as secure boot, device attestation, and sealed storage, all in alignment with the TCG MARS specification. Designed to minimize silicon footprint, QRoot Lite integrates seamlessly via standard industry interfaces, ensuring a rapid and cost-effective implementation conducive to meeting regulatory compliance standards. This IP is ideal for integrating secure elements in low-power and cost-sensitive environments, offering a secure solution for modern connected devices.
The Agile Secure Element IP is a versatile security enclave designed for straightforward integration into SoCs, providing essential elements for secure operations. This customizable IP includes a secure processor, cryptographic engines, and mechanisms for key storage and trusted execution, tailored to fit a wide range of system architectures. It supports a variety of cryptographic standards, including symmetric and asymmetric algorithms, while offering configuration options for post-quantum cryptography. Its modularity and compliance-readiness position it as an optimal solution for enhancing the security posture of complex multi-core systems and embedded applications.
Cologne Chip's UniqueID PUF (Physically Unclonable Function) Core utilizes inherent manufacturing variances to create unique digital fingerprints for FPGAs, enhancing security. This feature allows the generation of robust cryptographic keys, which can be used for secure operations such as bitstream encryption and decryption, thus ensuring data integrity and confidentiality. The PUF technology addresses the critical need for security in an increasingly interconnected world, providing a reliable foundation for encryption solutions. By using device-specific variations, this core offers an innovative approach to security that eliminates the need for non-volatile memory to store encryption keys externally. This core is ideally positioned for use in environments requiring high-security standards, including military communications and secure wireless networks. Its integration into various systems can significantly enhance their security architecture, making it an essential feature for any design prioritizing privacy and data protection.
TicoRAW FPGA/ASIC IP cores offer a groundbreaking approach to RAW Bayer CFA sensor compression, providing a balance of power efficiency and high-performance data handling. Primarily designed for cameras and imaging systems, TicoRAW enables low-latency transmission and compression of high-quality RAW image data, which is critical for modern visual applications such as automotive sensing, machine vision, and high-resolution camera systems.\n\nThis IP core is distinguished by its ability to process and compress RAW data without sacrificing image quality. It achieves significant bandwidth reduction, lowering power consumption and extending device battery life while preserving the integrity and richness of the sensor's original data. The low complexity of TicoRAW makes it particularly suitable for real-time applications where speed and accuracy are essential.\n\nTicoRAW supports a wide array of sensor resolutions, bit depths, and frame rates, adapting to various operational demands while maintaining consistency in quality output. It allows seamless integration with FPGA and ASIC systems, ensuring that the data flow from the sensor to the host processor remains uninterrupted and efficient. Moreover, embedded proxy support enhances the speed of data processing, enabling quick access for editing, analysis, and live streaming.\n\nThrough its advanced coding techniques, TicoRAW significantly reduces the storage footprint, enables faster data transfer, and enhances video analytics capabilities while avoiding the typical trade-offs associated with traditional compression methods. These features make TicoRAW a superior choice for industries relying on RAW image transmission, offering an ideal solution for high-performance and energy-conscious imaging tasks.
The iShield Key stands out as a universal security tool designed to enhance both digital and physical access controls for users. Integrating seamlessly into existing IT infrastructures, this device facilitates secured logins and system accesses, ensuring that both online accounts and physical premises remain protected. The iShield Key is built to provide dual authentication capabilities, combining USB and NFC technologies to support a variety of security protocols and standards. What sets the iShield Key apart is its hybrid functionality, enabling it to function effectively in diverse operational environments, ranging from company networks to secure printing solutions and beyond. Its robust build and advanced security features have made it a favorable choice for both individuals and organizations looking to bolster their security infrastructure. Additionally, this security solution offers a streamlined, plug-and-play approach, which simplifies integration into existing systems and supports a wide array of devices. Swissbit's focus on ease of use and adaptability ensures that the iShield Key can meet the varying needs of different industries, all while maintaining high levels of security assurance.
The ChevinID™ Silicon Security Solution is designed to enhance the security framework within FPGA and ASIC projects, providing robust protection against cyber threats and unauthorized access. Chevin Technology has crafted this solution to ensure silicon product integrity through comprehensive authentication and verification processes. This makes it essential for sensitive applications where data security is paramount. ChevinID™ delivers a layered security approach, integrating seamlessly with silicon supply chains to protect against risks such as hacking, cloning, and insertion of malicious code. By safeguarding each stage of the silicon lifecycle, from design through to deployment, this solution fortifies the reliability and security of silicon products. Industries that benefit from ChevinID™ include those involved in defense, healthcare, and industrial processing, where maintaining integrity and security of sensitive information is crucial. This solution enhances the overall security infrastructure, supporting Chevin Technology's mission to deliver cutting-edge protection technologies for silicon-based designs.
The iShield HSM is a high-performance hardware security module designed to store security keys and enable device authentication. With a unique plug-and-play capability, it allows system integrators to complement existing AWS IoT Greengrass devices with enhanced security features. This approach makes it an ideal solution for systems requiring robust authentication without exposing sensitive keys in software layers. This module offers a secure vault for private keys and certificates, pivotal in maintaining data security across connected devices. It provides users with a straightforward yet reliable method to enhance the security framework of their IT environments by incorporating hardware-backed security measures. Swissbit has tailored the iShield HSM for seamless integration into pre-existing hardware designs, adding a layer of security without necessitating extensive system overhauls. With its focus on delivering reliable security solutions, iShield HSM finds its use across various applications, from IoT devices to in-field machinery that demands rigorous data protection mechanisms. System designers and IT professionals often choose this module to secure communications and safeguard sensitive data against breaches.
The Physically Unclonable Function (PUF) is a pivotal addition to security architectures, leveraging unique physical characteristics to generate unpredictable responses. This uniqueness ensures that each PUF implementation is inherently tamper-resistant, ideal for securing devices against cloning and counterfeiting. By utilizing intrinsic production variances, the PUF provides a hardware foundation for secure key storage and device authentication. Applicable in diverse environments, the PUF is integral to embedded system security, offering a robust layer of protection against unauthorized duplication. Enterprises across industries such as financial technology, telecommunications, and defense can benefit from enhanced security measures afforded by PUFs. As an emerging technology in device protection, PUFs present an opportunistic approach to achieving high-security assurance without the need for traditional storage methods, thereby reducing the risk of physical breaches. The PUF is indispensable for developers focusing on the next generation of secure hardware solutions, offering both peace of mind and future-proofing in security applications.
KiviPQC-KEM is designed to empower secure communication in an era of quantum threats by leveraging the ML-KEM algorithm. This IP core facilitates key generation, encapsulation, and decapsulation operations essential for establishing shared secret keys over untrusted channels. As part of KiviCore's post-quantum cryptographic initiatives, it complies with NIST's FIPS 203 standards, ensuring robust resistance against quantum computing threats. It is available in "Fast" and "Tiny" variants, allowing developers to fine-tune security implementation based on available resources and required processing speed.
The True Random Number Generator (TRNG) offers an essential component for secure systems requiring high levels of randomness. Designed to generate unpredictable sequences, it ensures that cryptographic processes remain robust and secure against intrusion attempts. This TRNG leverages noise sources to produce true randomness, differentiating it from pseudo-random generators, making it indispensable in applications where data privacy is paramount. Utilized within secure computing environments, this generator thrives in scenarios demanding quick, reliable random number production. It's engineered to meet stringent security standards, making it suitable for financial, governmental, and communication sectors where data security cannot be compromised. The TRNG contributes significantly to security protocols, supporting encryption schemes and fortifying security systems against unauthorized access. With its reliable random output, it is a key component in maintaining the integrity of secure systems, offering peace of mind in data-sensitive operations.
The Digital PUF IP by Crypto Quantique provides a minimal-area, logic-based solution for generating unclonable seeds and establishing device identity. It supports integration into any SoC, offering secure boot and cryptographic key generation with a remarkably low silicon footprint. The Digital PUF works by leveraging static mismatches in logic cells to create high-entropy bitstrings unique to each device, complete with built-in error correction for dependable seed regeneration. This IP is particularly suited for applications requiring compliance with NIST standards for entropy and randomness, making it an ideal fit for secure device authentication and cryptography.
Swissbit's Security Upgrade Kit is an integrated solution designed to enhance the security of embedded Linux systems. It incorporates a Level 2 secure microSD card, providing robust data protection through state-of-the-art encryption techniques. The kit is an ideal retrofit solution, ensuring the highest protection for sensitive data such as configuration credentials, licenses, and externally stored data. The Security Upgrade Kit supports secure boot and offers strong data integrity controls, protecting crucial firmware and applications from unauthorized access. It presents a hardware-based access control mechanism, helping companies bolster their security infrastructure efficiently. This solution is particularly suited for environments where security is paramount, providing companies with the tools necessary to update or enhance existing systems seamlessly. Its capacity for integrating into diverse technological architectures makes it a versatile choice for companies looking to safeguard their digital assets.
Secure-IC's Post-Quantum Cryptography solutions are designed to prepare and protect systems against the next generation of quantum-enabled cyber threats. These solutions incorporate advanced cryptographic algorithms that are resistant to attacks by quantum computers, ensuring that data remains secure even as technology evolves. By integrating these algorithms into their systems, companies can future-proof their cryptographic infrastructure against the computational advances anticipated with quantum computing.
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