All IPs > Security IP > Embedded Security Modules
In today's interconnected technological landscape, the security of embedded systems has emerged as a crucial challenge. This is where Embedded Security Modules (ESMs) in semiconductor IPs play a pivotal role. These modules are specialized components integrated into chips, offering enhanced protection against a variety of threats including unauthorized access, data breaches, and malicious attacks. By embedding security at the silicon level, these IPs provide a hardware root of trust, ensuring that the integrity, confidentiality, and authenticity of data and communications are uncompromised.
Embedded Security Modules are used across a spectrum of applications, catering to industries such as IoT, automotive, telecommunications, and consumer electronics. In the IoT realm, these modules protect smart devices from vulnerabilities and ensure secure data transmission between interconnected gadgets. In the automotive sector, ESMs safeguard vehicular communication systems and onboard diagnostics from hacking attempts. Similarly, telecommunications networks utilize these modules to establish secure channels and prevent espionage, maintaining the privacy of sensitive communications.
The products found within this category include a range of security-enhancing solutions such as secure boot processors, cryptographic accelerators, hardware random number generators, and secure element IPs. These products are designed to address specific security needs, offering flexibility and scalability to developers and manufacturers. For instance, secure boot processors ensure that only authenticated software runs on a device, while cryptographic accelerators speed up data encryption and decryption processes, vital for real-time secure communications.
Moreover, as digital threats evolve, Embedded Security Modules semiconductor IPs continue to advance, incorporating cutting-edge technologies like quantum encryption readiness and machine learning-led anomaly detection. This ongoing innovation not only fortifies existing systems but also prepares them for future challenges, making Embedded Security Modules a cornerstone of secure electronic design for years to come. Whether you are developing chips for personal gadgets or intricate industrial systems, integrating these security IPs ensures robust protection and compliance with stringent security standards, enhancing consumer trust and product reliability.
The aiWare NPU (Neural Processing Unit) by aiMotive is a high-performance hardware solution tailored specifically for automotive AI applications. It is engineered to accelerate inference tasks for autonomous driving systems, ensuring excellent performance across a variety of neural network workloads. aiWare delivers significant flexibility and efficiency, capable of scaling from basic Level 2 applications to complex multi-sensor Level 3+ systems. Achieving up to 98% efficiency, aiWare's design focuses on minimizing power utilization while maximizing core performance. It supports a broad spectrum of neural network architectures, including convolutional neural networks, transformers, and recurrent networks, making it suitable for diverse AI tasks in the automotive sphere. The NPU's architecture allows for minimal external memory access, thanks to its highly efficient dataflow design that capitalizes on on-chip memory caching. With a robust toolkit known as aiWare Studio, engineers can efficiently optimize neural networks without in-depth knowledge of low-level programming, streamlining development and integration efforts. The aiWare hardware is also compatible with V2X communication and advanced driver assistance systems, adapting to various operational needs with great dexterity. Its comprehensive support for automotive safety standards further cements its reputation as a reliable choice for integrating artificial intelligence into next-generation vehicles.
The AHB-Lite APB4 Bridge acts as a seamless interconnect solution between AMBA's AHB-Lite and APB protocols, specifically version 3 and version 2 respectively. It is a parameterized soft IP which is crucial for accompanying designs where a synchronization between different bus protocols is needed. This ensures the smooth transfer and processing of data within microcontroller-based systems and larger ASIC architectures. Engineered to be low latency, this bridge allows high-performance communication between AHB-based, high-speed interfaces and slower peripheral APB devices. Its flexibility enables easy adaptation to different configuration demands, essential for developers aiming to optimize the dialogue between different parts of a chip. By providing detailed user guides and testbenches, integration is made simple, reducing deployment times and the likelihood of integration issues.
Specially designed for high-performance systems, the AHB-Lite Multilayer Switch provides a powerful interconnect fabric supporting a virtually unlimited number of bus masters and slaves. This allows the consolidation of multiple high-speed devices within a single architecture, enhancing the bandwidth and efficiency of data transfer. Ideal for complex system designs, the switch ensures low latency and high throughput, essential for data-intensive applications. Its multilayer architecture provides the flexibility needed to manage numerous concurrent data paths, optimizing overall system performance. The switch comes with comprehensive support documentation and a full-featured testbench, streamlining the integration process and enabling developers to harness its capabilities effectively within their designs.
CrossBar's ReRAM Memory is setting benchmarks in next-generation storage solutions, providing a multifaceted approach to memory architecture with high-performance metrics. It is recognized for its minimal energy usage, extraordinary endurance, and is designed to deliver rapid read and write speeds. Its ability to integrate seamlessly with logic circuits in the same foundry makes it highly scalable and efficient for various applications, including data centers, mobile computing, and security. ReRAM technology can be scaled below 10nm, support 3D stacking, and provides on-chip storage of terabytes, making it a potent solution for diverse computing needs.
Polar ID from Metalenz offers a cutting-edge face unlock solution, using advanced meta-optic technology to provide secure, high-resolution facial recognition capabilities. It captures the unique "polarization signature" of a human face, making it resistant to both 2D photos and sophisticated 3D masks. Polar ID operates efficiently in a variety of lighting conditions, from bright daylight to dark environments, ensuring its utility extends across all smartphone models without sacrificing security or user experience. This technology replaces complex structured light modules, incorporating a single near-infrared polarization camera and active illumination source. It significantly reduces costs and footprint, supporting a broad adoption across hundreds of millions of mobile devices. With its low price point and high performance, Polar ID elevates smartphone security, offering robust protection for digital transactions and identity verification. By enabling this on an embedded platform with compatibility for Qualcomm's Snapdragon processors, Metalenz ensures widespread applicability. The key advantage of Polar ID is its affordability and ease of integration, as it eliminates the need for larger, more intrusive notches in phone designs. Its sophisticated polarization sensing means secure authentication is possible even if the user wears sunglasses or masks. Polar ID sets a new benchmark in smartphone security by delivering convenience and enhanced protection, marking it as the first polarization sensor available for smartphones.
PUFrt is a formidable security solution designed to create a robust hardware root of trust for various semiconductor applications. Built using patented NeoPUF technology, it generates a unique and unclonable 1024-bit identification code and root key directly within the chip. This feature ensures that the secret keys never leave the hardware, significantly minimizing the risk of extraction or duplication. The architecture of PUFrt encompasses a comprehensive security framework with components such as secure OTP storage for safeguarding sensitive data, a true random number generator complying with NIST standards, and an anti-tamper shell designed to protect against physical attacks. These elements contribute to a secure environment that can seamlessly integrate with other Crypto Engines and Security Coprocessors, ensuring wide application across IoT, automotive, and edge AI systems. With PUFrt, users can deploy a secure boot mechanism and ensure the integrity and confidentiality of digital communications. Its resilience to tampering and high integration capabilities make it a cornerstone in securing the semiconductor supply chain while enhancing device authentication and protection against reverse engineering.
Secure OTP offers state-of-the-art data protection through its combination of Physical Macro and Digital RTL technology. It is a highly efficient solution for storing critical data such as keys and boot codes in a tamper-resistant environment. This OTP mechanism is integrated with a secure PUF architecture to enhance encryption, providing unrivaled physical defense against unauthorized access. The Secure OTP's design includes a versatile AMBA control interface, catering to diverse IC applications. By embedding a 1024-bit PUF, the Secure OTP ensures that sensitive data remains protected under various attack vectors and requires no external helper data for error correction, allowing rapid access times and maintaining high entropy levels. Through comprehensive anti-tampering measures and built-in instant hardware encryption, Secure OTP emerges as a leading solution in managing data lifecycle protection across IoT, storage controllers, and smart TV sectors. Its rapid integration capability across different platforms facilitates a more secure and efficient data management solution.
The ReRAM IP Cores tailored for embedded NVM in MCUs and SOCs by CrossBar provide an effective platform for multiple-time programmable (MTP) NVM applications. Ideal for IoT, wearables, and consumer electronics, these cores offer high performance with low latency and energy consumption, integrating seamlessly onto the same process nodes as MCUs and SoCs. They support densities from 256K Bytes to 32M Bytes, making them versatile for use in myriad applications where secure, reliable memory is essential.
AON1100 marks a significant leap in edge AI processing for voice and sensor operations. Meticulously engineered for energy efficiency, this chip operates on less than 260µW while achieving over 90% accuracy even in low signal-to-noise environments. It is perfect for always-on gadgets demanding constant reliability and precision, especially under challenging conditions.
Up to 1M KeyEnc/sec with improved power efficiency PQPerform-Lattice is a powerful hardware-based product designed for high throughput, high-performance, and high speed. It adds post-quantum cryptography for applications that typically handle a large number of transactions, such as high-capacity network hardware applications and secure key management HSMs. Optimizable for secure boot, as well as other use-cases, PQPerform-Lattice supports FIPS 204 ML-DSA for quantum-secure digital signature verification, as well as FIPS 203 ML-KEM for quantum key exchange. PQPerform-Lattice supports AXI4, PCIe, and is deployable in multiple instances, making it a powerful solution for existing systems and infrastructure requirements.
The ultra-low-power human body detector from Microdul is engineered to provide efficient, static detection capabilities essential for wearable technology. This detector helps significantly reduce energy consumption in devices when not actively in use. Its advanced design allows it to recognize the presence or absence of a human, making it ideal for applications requiring power-saving features, such as smart devices and IoT equipment. The precise nature of its operation ensures long battery life, thereby enhancing the user experience in battery-dependent gadgets. Moreover, its application in static detection means it can operate seamlessly without requiring constant recalibration or complex interfacing. Its implementation is particularly valuable in the wearables market where minimizing power draw while maintaining functionality is a critical competitive factor. With its ability to integrate smoothly into existing systems, this detector forms an indispensable part of power-efficient device design strategies focused on long-term effectiveness in changing environments. Its versatility extends to various industries, ensuring compatibility with diverse technological ecosystems while emphasizing seamless operation and reliability. As a result, it paves the way for new possibilities in the design of cutting-edge consumer electronics.
The eSi-Crypto suite from EnSilica offers a comprehensive range of cryptographic cores for ASIC and FPGA applications, focusing on low resource utilization and high throughput performance. A key component is the True Random Number Generator (TRNG), which meets NIST 800-22 standards, ensuring robust randomness and security for cryptographic processes. These cores support various interfaces including AMBA APB/AHB/AXI bus, making them versatile for multiple system architectures. The cryptographic algorithms within eSi-Crypto cover a broad spectrum, including CRYSTALS Kyber for secure key encapsulation, Dilithium for digital signatures, as well as established standards like ECC/ECDSA, RSA, and AES. These are vital for secure communications and data protection in modern digital environments. ChaCha20, Poly1305, and TDES/DES are also supported, offering a wide choice of encryption and authentication methods. Particularly noteworthy is eSi-Crypto's post-quantum readiness, thanks to the PQC-HT library designed to handle future challenges posed by quantum computing. This makes it an ideal solution for forward-thinking applications requiring top-tier security across wired and wireless networks.
FIPS 140-3 CAVP-compliant, compact PQC hardware acceleration for subsystems PQPlatform-CoPro combines hash-based and lattice-based post-quantum cryptography that can be added to an existing security subsystem. It can be optimized for minimum area, maintaining high-performance, and is designed to be run by an existing CPU using PQShield-supplied firmware, meaning it involves low integration effort and flexible configurations to support a wide variety of use cases, including quantum-safe secure boot. Solutions are available for hardware acceleration of SHA-3, SHAKE, ML-KEM, ML-DSA, alongside traditional cryptography. In addition, PQPlatform-CoPro can be configured with side-channel protection. PQPlatform-CoPro is covered by multiple PQShield implementation patents.
FIPS 140-3 CAVP-compliant, compact lattice-based hardware PQC engine PQPlatform-Lattice is a compact FIPS 140-3 CAVP-compliant, PQC engine that adds post-quantum support for hardware components and embedded devices, using lattice-based cryptographic algorithms such as ML-KEM (FIPS 203) for post-quantum key exchange, and ML-DSA (FIPS 204) – post-quantum digital signature verification. It provides secure acceleration of lattice-based PQC alongside support for traditional cryptography. Its use cases include strong user authentication, protecting hardware keys, and small-footprint, configurable side-channel protection. PQPlatform-Lattice is designed for minimal area as well as maximum compatibility and can be deployed with optional firmware-backed side-channel countermeasures. It is covered by multiple PQShield implementation patents.
The NS Class is Nuclei's crucial offering for applications prioritizing security and fintech solutions. This RISC-V CPU IP securely manages IoT environments with its highly customizable and secure architecture. Equipped to support advanced security protocols and functional safety features, the NS Class is particularly suited for payment systems and other fintech applications, ensuring robust protection and reliable operations. Its design follows the RISC-V standards and is accompanied by customizable configuration options tailored to meet specific security requirements.
Trilinear Technologies' HDCP Encryption-Decryption Engine is a sophisticated solution designed to safeguard digital content as it traverses various transmission channels. This engine is compliant with the HDCP standards 1.4 and 2.3, offering robust protection mechanisms to ensure that digital media investments are secure from unauthorized access and piracy. The engine’s hardware acceleration capabilities represent a crucial advantage, significantly reducing the load on the system processor while maintaining real-time encryption and decryption functions. This not only enhances performance but also extends the operational life of the hardware involved, making it suitable for high-demand media applications across sectors such as broadcast, entertainment, and corporate environments. Trilinear’s HDCP Encryption-Decryption Engine ensures compatibility with a wide array of consumer and professional-grade video equipment, providing seamless protection without interference in media quality or transmission speed. Its flexible integration options allow it to be smoothly incorporated into existing infrastructures, whether in standalone media devices or complex SoC architectures. Supported by comprehensive software resources, the HDCP Encryption-Decryption Engine provides an all-encompassing solution that includes necessary software stacks for managing device authentication and link maintenance. Its ability to safeguard high-definition content effectively makes it an invaluable asset for entities focused on secure content delivery and rights management.
The FPGA Lock Core is an innovative FPGA solution designed to secure FPGAs and hardware against unauthorized access and counterfeiting, leveraging a Microchip ATSHA204A crypto authentication IC. It reads a unique ID, generates a 256-bit challenge, and uses secure hashing to verify the hardware's authenticity, ensuring hardware integrity in sensitive applications like military and medical fields. This solution allows hardware protection against IP theft by enforcing authentication and disables FPGA functionality if unauthorized access is detected. The core utilizes minimal logic resources and one FPGA pin, communicating through a bidirectional open drain link. The clarity of this system is enhanced by providing the core in VHDL, allowing users to thoroughly understand its functionality, supported by example designs on Cyclone10 and Artix 7 boards, catering to both Intel and Xilinx FPGA platforms. Complementing this security measure is the Key Writer Core, which allows programming of custom secret keys into the ATSHA204A in situ on assembled boards, ensuring a seamless integration with the FPGA Lock system. Available for various FPGA platforms, the Efinix version, distributed with TRS Star, expands its applicability, with webinars and user guides offering in-depth implementation insights.
Suite-Q SW is a versatile cryptographic software library designed to offer flexibility in code size, performance, and memory usage, making it an essential tool for developers working on resource-limited devices. Engineered for high adaptability, this software package provides a robust framework for implementing secure cryptographic operations across diverse platforms, including 8-bit to 64-bit processors. The library is meticulously crafted to support various configuration options that balance speed with memory efficiency, ensuring it meets custom specifications while preserving system integrity. Portable C code and high-speed, hand-optimized assembly variants are available to provide the ideal blend of compatibility and performance required in modern applications. Key features of Suite-Q SW include seamless integration as plug-in modules, support for a wide range of hardware offloads, and extensive compatibility with general-purpose and embedded CPUs. Validated through rigorous testing and performance measurements, it provides a reliable basis for secure software development, ensuring rapid deployment with minimized risk. As such, Suite-Q SW remains an indispensable part of PQSecure's comprehensive cryptographic offerings, perfect for adapting to the ever-changing landscape of digital security.
Designed for high-resolution brain recordings, the Neuropixels Probe is an advanced tool for neuroscience research, offering direct insight into brain activity with unprecedented precision. It enables large-scale data collection across numerous brain regions simultaneously, which is vital for mapping and understanding complex neural circuits. This probe features an array of dense electrodes, making it possible to record from hundreds of neurons at once. Its compact, lightweight design allows for chronic implantation, facilitating long-term brain studies without compromising subject mobility. With its exceptional signal processing capabilities, the probe supports detailed neural data analysis, proving indispensable for neuroscientists aiming to explore new frontiers in brain functionality and disorders. The probe’s integration with CMOS technology ensures high-density data capture with reduced interference and improved accuracy.
The Individual IP Core Modules by ResQuant are comprehensive components engineered to support diverse post-quantum cryptographic standards, including Dilithium, Kyber, XMSS, SPHINCS+, AES, and the SHA-2 family. These modules offer organizations the flexibility to select specific cryptographic functionalities tailored to their security needs, without the necessity of entire systems or hardware changes. Each module is designed to integrate easily into existing infrastructure, ensuring minimal disruption while enhancing security measures against potential future quantum threats. This approach allows industries to gradually implement PQC standards, ensuring a seamless transition to quantum-resistant cryptographic measures. Tailored for flexibility, the ResQuant Individual IP Core Modules can be used across a wide array of applications, from IoT devices to complex military and IT systems. By offering component-level integration, these modules empower companies to future-proof their offerings incrementally while maintaining robust security practices in their operations.
Suite-Q HW is a robust system-on-chip (SoC) solution that envelops all the necessary cryptography required for secure protocols within compact and efficient hardware. Targeted at both high-end servers and low-end embedded systems, this solution emphasizes the dual benefits of scalability and adaptability. Suite-Q HW efficiently offloads demanding symmetric and asymmetric cryptographic processes by leveraging specialized accelerators, offering enhanced execution speeds that cater to different application requirements. A key component of its utility lies in its support for a wide array of cryptographic operations. This includes classical public key methods, such as ECDSA and ECDH, alongside emerging post-quantum techniques within isogeny and lattice frameworks. The hardware is further augmented by secure hash algorithms and diverse AES encryption modes, delivering comprehensive protection across a variable security landscape. Incorporating optional Differential Power Analysis (DPA) countermeasures and validated security standards, Suite-Q HW ensures security for sensitive data against contemporary and emerging threats. It facilitates integration with existing development flows across SoCs and FPGAs, optimizing power and silicon footprint according to specific needs. Furthermore, the hardware package provides comprehensive resources for integration, from testbench data to simulation scripts, enhancing its adaptability and effectiveness in today's digital security paradigm.
Highly-optimized PQC implementations, capable of running PQC in < 15kb RAM PQCryptoLib-Emebedded is a versatile, CAVP-compliant version of PQCryptoLib, PQShield’s CMVP-certified library of post-quantum cryptographic algorithms. With its design focused on ultra-small area efficiency, PQCryptoLib-Embedded has been specifically designed for embedded systems, microcontrollers and memory-constrained devices. It could be the first step towards a hardware solution for providing PQC integration to devices already in the field.
The patented QDID PUF by Crypto Quantique utilizes quantum tunneling current variations to produce a unique identity in standard CMOS processes. This solution leverages oxide thickness variations and trap distributions in the gate oxide to create an unpredictable and unclonable physically unclonable function (PUF). As a hardware root-of-trust, it simplifies secure provisioning and emits high-entropy seeds resistant to side-channel attacks, supporting up to 256-bit security strength. The QDID PUF's robustness is confirmed through extensive testing, including adherence to NIST standards, making it an ideal choice for secure device identity and post-quantum cryptographic applications.
Secure Protocol Engines are high-performance modules developed to significantly enhance network and security processing capabilities within System-on-Chip designs. These engines offload critical security tasks from the main processor, thereby streamlining operations and boosting overall system efficiency. These protocol engines ensure secure data transmission and transaction validation, pivotal for maintaining the confidentiality and integrity of information across varied network infrastructures. With enhanced support for cryptographic operations, these engines are crucial for facilitating secure communication in numerous domains, particularly where heavy data processing is involved.
NeoPUF is revolutionizing hardware security by providing up to 100 times faster random number generation. This advanced security technology plays a critical role in safeguarding semiconductor devices against emerging threats. It incorporates a hardware-based random number generator which powers the development of the next generation of secure chips, ensuring robust protection from unauthorized access. Positioned as a critical component in the development of secure semiconductors, NeoPUF integrates seamlessly into existing systems, offering a quantum-resilient solution. This capability is vital in defense against potential quantum-era threats, providing security that remains effective even as technology landscapes shift. NeoPUF supports operations across diverse applications, particularly in sensitive environments where data integrity is paramount. As part of PUFsecurity's comprehensive lineup, NeoPUF not only enhances secure storage options but also facilitates reliable identification and anti-cloning features. It is a key enabler of trusted computing across numerous industries, underlining its importance in the modern era where security is indispensable.
Fully autonomous, FIPS 140-3 CAVP compliant PQC subsystem PQPlatform-SubSys is a cryptographic subsystem, designed to provide offloaded cryptographic services with minimal integration effort and full autonomy from an existing security subsystem, as well as configurable side-channel protection. These services include post-quantum signature generation, verification, and secure key establishment. It’s built with optimal performance in mind, as well as crypto agility with its provision of traditional, PQ/T hybrid and fully post-quantum algorithms. PQPlatform-SubSys uses its built-in RISC-V CPU independently from the surrounding system, allowing cryptographic services to be offloaded efficiently from the system processor.
The C3-CODEC-G712-4 audio codec from Cologne Chip is revolutionizing traditional audio processing with its fully digital design. Leveraging DIGICC technology, this codec bypasses the constraints of analog systems by offering a digital alternative that enhances both cost-effectiveness and design flexibility. It plays a crucial role in telecommunication systems, ensuring high-quality audio signal processing and conversion. Known for its exceptional adaptability, the C3-CODEC-G712-4 is designed to seamlessly integrate into diverse telecommunication environments. This codec supports various audio encoding and decoding tasks with precision, making it an optimal choice for systems requiring high fidelity and reliability. Its digital nature reduces complexity and energy consumption, allowing for a smoother and more efficient audio processing experience. The codec’s architecture enables rapid design cycles and easier testing and deployment, significantly cutting down the time from concept to market. It is an ideal solution for engineers looking to integrate advanced audio functionalities into communication devices without incurring high costs or extensive design time. The C3-CODEC-G712-4 thereby stands as a pivotal component in modern digital audio systems, reflecting Cologne Chip’s commitment to innovation and quality in semiconductor design.
VeriSyno Microelectronics offers Digital Systems and Security Solutions designed to enhance the robustness and efficiency of modern digital applications. This comprehensive suite includes IPs for PSRAM interfaces, network protocols like vMAC, and security mechanisms, addressing the critical needs for secure and efficient digital communications. The digital solutions are engineered to meet stringent security protocols, ensuring data integrity and protection in various applications. VeriSyno's expertise in digital system design enables the development of reliable solutions that integrate seamlessly into existing infrastructures, enhancing both system performance and security. These solutions are suitable for a broad spectrum of digital applications, including consumer electronics, automotive, and industrial systems, where efficient data handling and security are paramount. With ongoing innovation, VeriSyno maintains its competitive edge by adapting to emerging industry requirements and introducing forward-thinking digital solutions.
PUFhsm is an advanced embedded hardware security module aimed at automotive and other complex applications. It functions as a security enclave, isolating sensitive operations and securing communications within the chip. By embedding a dedicated CPU along with cryptographic engines within its architecture, PUFhsm ensures that security processes are handled efficiently without burdening the main system CPU. This module excels in meeting the stringent requirements of EVITA-Full compliance, a gold standard for automotive security, by offering robust secure boot, secure updates, and key management functionalities. The architecture further supports the safeguarding of in-vehicle communication against sophisticated cybersecurity threats. Designed to offset the security management workload from the primary system CPU, PUFhsm features a comprehensive set of APIs and reference codes for seamless integration into chip designs, boosting security capabilities across the ecosystem. Its modular design and scalability offer flexibility for designers to incorporate advanced security protocols tailored to specific application needs.
The SHA-3 Crypto Engine is a hardware accelerator designed for cryptographic hashing, offering high throughput and area efficiency. It adheres to the NIST FIPS 202 standard, supporting all variants of the SHA-3 family, including SHA-3-224, SHA-3-256, SHA-3-384, and SHA-3-512, along with extendable output functions SHAKE-128 and SHAKE-256. Designed to resist time-based side-channel attacks, this IP core is integrated as a fully synchronous design supporting AMBA AXI4-Stream interfaces, making it versatile for various secure applications. Applications for the SHA-3 Crypto Engine span from secure message authentication to encryption protocols within IPsec and TLS/SSL engines, secure boot processes, and decentralized blockchain technologies. It is particularly suitable for e-commerce platforms and financial transaction processing, where data integrity and authenticity are paramount. Its ease of integration and robust performance ensure it is a preferred choice for next-generation security solutions. Offering resource-optimized performance, the SHA-3 engine is available with a range of deliverables, including Verilog RTL, testbenches, and comprehensive documentation. Its resource utilization across different FPGA and ASIC platforms demonstrates compatibility and efficiency, ensuring developers can implement secure hashing functions seamlessly within their devices.
The Customizable Cryptography Accelerator offered by ResQuant is designed to meet varied client needs with an extensive array of configurable options. It integrates seamlessly with all NIST PQC standards like Dilithium, Kyber, XMSS, and SPHINCS+, and is extendible with additional algorithms, including customer-specific implementations. The accelerator is built to be DPA, timing, and SCA resistant, and is AXI 4 ready, ensuring robust protection in a variety of applications. This innovation allows for customizable tuning in performance and size, addressing the specific security requirements of customers from various industries. The accelerator demonstrates ResQuant's commitment to flexibility and adaptability, enabling clients to implement cutting-edge encryption with ease. With ongoing enhancements to extend its capabilities, the accelerator stands as a critical component in defenses against future computational threats posed by quantum technologies. In addition to its technical capabilities, the ResQuant Customizable Cryptography Accelerator is engineered for efficient power use and minimized physical footprint, making it suitable for integration into a wide range of hardware setups. This solution underscores ResQuant's dedication to delivering high-security standards and unmatched versatility in cryptographic processing solutions.
The CANsec Controller Core is engineered to provide enhanced security features for automotive CAN networks. Traditional CAN networks are not inherently secure, posing challenges in protecting against unauthorized access and data tampering. This controller core integrates security protocols directly into the CAN framework, offering an encryption-enabled solution tailored for modern automotive needs. This controller core implements standardized security measures, ensuring confidentiality, integrity, and authenticity of CAN messages. By incorporating advanced cryptographic algorithms, the CANsec Controller Core meets stringent security requirements without compromising the performance that automotive applications demand. Its design focuses on minimizing resource consumption while providing robust security enhancements. Ideal for vehicles requiring secure communication between various electronic control units (ECUs), the core upholds the automotive industry’s increasing emphasis on cybersecurity. The CANsec Controller Core is versatile in its implementation, suitable for both new vehicle architectures and as an upgrade to existing systems, making it a vital component of future-proof automotive design.
Engineered for energy-sensitive applications, Microdul’s capacitive proximity switch combines precision with ultra-low-power consumption, making it ideal for modern technological needs. This switch is designed to detect touch reliably without direct physical contact, thereby facilitating advanced user interfaces, particularly in devices where minimizing energy usage is critical. The switch’s lightweight design and responsive detection capability allow it to support numerous applications such as touchpads and sliders commonly used in consumer electronics. Its capacitive nature ensures swift response times, making it suitable for dynamic environments where instant feedback is necessary, such as in user interface control panels. Applications extend to smart technology fields, where energy savings can be maximized. The capacitive proximity switch continues to function effectively across various climates and conditions, promising versatility and adaptability. By enhancing system efficiency through minimal power demands, it impressively complements design strategies that focus on sustainability and long-term operational economy.
Post-Quantum Cryptography IPs are designed to safeguard systems against future quantum-computing threats, providing robust cryptographic measures that withstand the computational power expected from quantum computers. These IPs offer algorithms that secure data and communications much beyond the capabilities of traditional public-key cryptography. Their implementation is crucial for forward-looking industries that require enhanced security measures to protect sensitive information, ensuring a seamless transition into a quantum-secure future. Secure-IC actively contributes to the development and implementation of these algorithms, ensuring their clients are equipped for forthcoming cybersecurity challenges.
CrossBar's ReRAM IP Cores for High-Density Data Storage are designed to revolutionize storage solutions, offering exceptional density and low-latency memory performance. These IP cores are perfect for data centers, mobile computing, and AI applications, providing persistent memory capabilities that exceed conventional storage technologies. The ReRAM technology enables high-density memory configurations up to 128GB per NV-DIMM, ensuring rapid data access and secure data management with enhanced endurance.
PUFcc serves as an advanced crypto coprocessor that provides a complete security foundation by integrating a hardware root of trust with a comprehensive suite of cryptographic engines. This solution excels in delivering secure key generation, storage, and full-scale encryption capabilities across diverse applications in the IoT, AI, and automotive sectors. Featuring NIST CAVP-certified and OSCCA standards-compliant engines, PUFcc is adaptable to various security requirements and performs rapid cryptographic operations with exceptional security. The architecture incorporates APB and AXI interfaces to enable swift access to system memory, optimizing the security infrastructure with its modular design. The latest iteration, PUFcc7, further enhances the design with upgrades to public key cryptography and hashing algorithms, aligning with TLS 1.3 standards to ensure robust security for evolving digital communication needs. The PUFcc series stands as a superior crypto engine heavily relied upon for securing high-value data and devices in complex digital ecosystems.
ReRAM as FTP/OTP Memory by CrossBar provides flexible, non-volatile memory solutions suitable for few-time and one-time programmable memory applications. Its integration into CMOS processes makes it a versatile choice for secure computing environments where PUF keys are necessary. The technology's shared architecture allows FTP, OTP, and MTP configurations within a common monolithic design, optimizing chip space and costs.
PhantomBlu is a sophisticated mmWave communication solution specifically designed for the defense sector, empowering military operations with robust, high-performance connectivity. Leveraging advanced mmWave technology, it supports tactical connections between land, sea, and air platforms, enabling seamless IP networking over a secure, anti-jam resistant mesh network. PhantomBlu’s design is optimized for rapid deployment and versatile use across various challenging military and defense environments. The PhantomBlu system offers unprecedented connectivity and integration capabilities, supporting high-bandwidth, low-latency communications essential for defense operations. It features LPI (Low Probability of Interception) and LPD (Low Probability of Detection), ensuring stealth and operational security. Its adaptive networking solutions significantly enhance situational awareness and interoperability amongst varied defense assets, assuring seamless transfer of C4ISR data. Whether deployed across large terrains or in mobile units, PhantomBlu's resilience and scalability ensure that defense teams operate with confidence. Its advanced capabilities are critical in mitigating risks and enhancing strategic emission, making it an invaluable asset for modern military communications needs.
SEMIFIVE’s HPC Platform is crafted to cater to the demanding requirements of high-performance computing (HPC) applications. It leverages top-tier silicon technologies and comprehensive design solutions to ensure optimal performance and scalability for complex computations across various domains. The platform integrates powerful processing cores, advanced memory interfaces, and high-speed connectivity options. These technical attributes make it particularly suitable for data centers, cloud computing environments, and network processing applications where high throughput and low latency are critical. With the HPC Platform, users gain access to a customizable and scalable architecture that supports rapid prototyping and efficient verification processes. This is supported by SEMIFIVE’s dedication to silicon validation and extensive test scenarios, ensuring reliability and performance excellence in high-demand computing tasks.
PQSecure's Cryptographic Core serves as a comprehensive solution for implementing standardized cryptographic algorithms within system-on-chip (SoC) designs. This product is tailored for diverse applications, ranging from high-end servers to low-end embedded systems, ensuring broad compatibility. It effectively offloads both symmetric and asymmetric cryptographic operations, boosting execution efficiency. The core includes hardware accelerators capable of performing various cryptographic functions, such as true random number generation and classical public key cryptographic algorithms like ECDSA and ECDH. Incorporating next-generation post-quantum cryptographic methods, this core tackles the imminent threats posed by quantum computing. By supporting isogeny-based, lattice-based, and code-based cryptographies, it prepares systems for the quantum evolution. Furthermore, this Cryptographic Core supports secure hashing algorithms and a variety of advanced encryption standards, ensuring robust protection across different security levels recommended by standardization bodies. As an embodiment of both agility and security, it integrates seamlessly into various SoC and FPGA architectures, providing substantial power reductions compared to traditional software implementations. Designed with future-proofing in mind, PQSecure's Cryptographic Core features optional side-channel protection mechanisms validated by standard techniques, delivering DPA countermeasures without significant overhead. It boasts a comprehensive suite of verification tools, including test benches and simulation scripts, making integration into existing systems both easy and efficient. With customizable performance profiles, the Cryptographic Core is engineered to meet the demanding security requirements of tomorrow's digital environments.
Chuangfeixin Technologies' OTP (One-Time Programmable) solutions provide a unique approach to secure data storage. Once programmed, the data within these OTP devices is immutable, providing a robust layer of security ideal for protecting intellectual property and sensitive information within integrated circuits or logic gates. These solutions are particularly advantageous in embedded applications, where they can safeguard firmware and configuration data against unauthorized access or alteration. The company offers versatile OTP products compatible with various CMOS processes, ensuring easy integration without additional processing steps, thus reducing development costs. The long data retention of over 100 years under extreme conditions further underscores the reliability of these OTP modules in demanding applications.
CoMira Solutions offers a Media Access Control Security (MACSec) solution adhering to IEEE standards aimed at safeguarding communication within 802.1 LAN environments. MACSec ensures data confidentiality and integrity, preventing unauthorized access and disruptions. It employs advanced encryption standards and supports flexible traffic management through various port configurations. The MACSec IP's time-division multiplexed architecture aligns seamlessly with CoMira's UMAC, ensuring synchronous operation despite differing link speeds. This implementation includes FIPS-compliant encryption methods such as GCM-AES-128 and GCM-AES-256, supporting robust security needs. Furthermore, CoMira's MACSec supports multiple secure channels and security associations per port, adding layers of protection to client systems. The configurability of Secure Channels and the ability to strip security tags enhances its adaptability in varied networking scenarios, reflecting CoMira's commitment to delivering tailor-fit security solutions.
The Security Protocol Accelerator from PQSecure is a pivotal component in enhancing the performance of cryptographic operations within embedded systems and processors. This accelerator facilitates the efficient execution of security protocols, such as post-quantum cryptographic algorithms, providing hardware-accelerated computation to offload intensive tasks from the main CPU. PQSecure's accelerator design focuses on optimizing the speed and efficiency of complex cryptographic tasks, including key exchange operations, digital signatures, and hashing. It is engineered to support a broad spectrum of cryptographic standards while maintaining configurability for various security and performance levels. This product stands out due to its ability to integrate seamlessly into various processor architectures and its compatibility with existing SoC and FPGA platforms. Key features of the Security Protocol Accelerator include customizable performance settings and support for both classical and post-quantum cryptographic operations. It provides significant improvements in power efficiency and computational speed, ensuring systems are prepared for future quantum challenges. With available side-channel attack countermeasures, this accelerator not only secures data but also mitigates potential vulnerabilities common in cryptographic implementations.
NVM Defender is crafted to bolster the protection of non-volatile memory on integrated circuits against unauthorized access and data breaches. With a cutting-edge architecture, this product secures sensitive information stored within ICs, employing robust measures to counter invasive and non-invasive attack vectors. NVM Defender is pivotal in environments where data integrity and confidentiality are paramount, ensuring that sensitive data remains shielded from potential threats. The technology integrates seamlessly with various IC designs, providing a comprehensive security layer without affecting the performance of the primary device functions. It is engineered to withstand sophisticated threats, capturing and neutralizing attempts to access or alter stored data illicitly. Industries reliant on secure data transfer and storage leverage this product to maintain high levels of security across their hardware. Designed with adaptability in mind, NVM Defender can be implemented across different industries, offering scalable security solutions tailored to the specific demands of various fields such as automotive, aerospace, and consumer electronics.
ALINT-PRO embodies a robust design verification tool focused on RTL code analysis. It identifies potential simulation mismatches, synthesis issues, and design portability concerns, helping engineers address these problems early in the design stage. ALINT-PRO is essential for ensuring coding standard adherence and optimizing designs for both portability and reuse, thereby minimizing the risk of downstream verification challenges.
MIFARE Certification Technologies provide a comprehensive suite for certification related to mobile and IoT platforms. This technology is at the forefront of ensuring compliance and reliability in embedded systems used within public transportation and personal devices. It focuses on ensuring that devices meet rigorous global standards for communication and data transfer security. Utilizing robust protocols, these technologies facilitate seamless integration with existing infrastructures, promoting enhanced accessibility and user experience. The certification process involves extensive validation checks to ensure system integrity, sustainability, and efficient operation within diverse environments. By certifying embedded software, it supports manufacturers in achieving compliance with regulatory requirements, empowering them with a market advantage. This technology is essential for companies looking to maintain competitive status by ensuring their products meet necessary communication standards. It demonstrates a commitment to quality and security in data handling, solidifying a product's credibility and operational reliability. MIFARE Certification Technologies pave the way for future-ready solutions, blending technological prowess with market needs.
Spec-TRACER is a dedicated requirements lifecycle management tool that caters to FPGA and ASIC designs. It allows engineers to efficiently manage, trace, and report on design requirements, facilitating compliance with industry standards such as DO-254. By enabling thorough requirement analysis and enhancing traceability across the design lifecycle, Spec-TRACER supports stringent verification demands, particularly in the aerospace sector where compliance and comprehensive documentation are crucial.
The AES Crypto IP provides robust encryption and decryption functionalities, adhering to the Advanced Encryption Standard (AES) specifications. This core, developed using Dillon Engineering’s versatile ParaCore Architect, can be easily configured and re-targeted between FPGA and ASIC technologies, offering a flexible solution for secure data handling. Key features of the AES Crypto IP include compliance with FIPS-197 and support for various operation modes such as ECB, CBC, CFB, OFB, and CTR. Its performance reaches data throughputs of up to 12.8 Gb/s, making it a powerful choice for applications requiring high-speed secure data transactions. This IP supports dynamic key changes without impacting throughput, providing significant flexibility for real-time secure communications. Additionally, the core can be customized to balance between throughput and area, catering to diverse operational needs across industries that prioritize data security.
Comcores' MACsec solution addresses the needs for secure communication on Ethernet links by implementing the IEEE 802.1AE standard for MAC Security. It provides comprehensive protection against eavesdropping and manipulation, making it suitable for applications demanding high security over public and private networks. Built to support various data rates, the MACsec IP core integrates robust cryptographic suites like AES-GCM to encrypt and authenticate network traffic. Its deployment ensures data confidentiality and integrity, fostering a secure environment for transmitting sensitive information such as in military communication systems and data centers.
Specializing in ESD protections, Certus Semiconductor offers highly adaptive solutions that meet various operational demands. These circuits provide enduring defense against ESD threats, surpassing traditional HBM and CDM specifications. Capabilities include low capacitance solutions and customized protections tailored to endure voltages between -18V to +30V. These ESD circuits are integrated with specialized features like Rad-Hard technology, high-temperature resilience, and enhanced burst immunity, setting a standard for highly secure semiconductor solutions in harsh environments.
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