All IPs > Security IP > Embedded Security Modules
In today's interconnected technological landscape, the security of embedded systems has emerged as a crucial challenge. This is where Embedded Security Modules (ESMs) in semiconductor IPs play a pivotal role. These modules are specialized components integrated into chips, offering enhanced protection against a variety of threats including unauthorized access, data breaches, and malicious attacks. By embedding security at the silicon level, these IPs provide a hardware root of trust, ensuring that the integrity, confidentiality, and authenticity of data and communications are uncompromised.
Embedded Security Modules are used across a spectrum of applications, catering to industries such as IoT, automotive, telecommunications, and consumer electronics. In the IoT realm, these modules protect smart devices from vulnerabilities and ensure secure data transmission between interconnected gadgets. In the automotive sector, ESMs safeguard vehicular communication systems and onboard diagnostics from hacking attempts. Similarly, telecommunications networks utilize these modules to establish secure channels and prevent espionage, maintaining the privacy of sensitive communications.
The products found within this category include a range of security-enhancing solutions such as secure boot processors, cryptographic accelerators, hardware random number generators, and secure element IPs. These products are designed to address specific security needs, offering flexibility and scalability to developers and manufacturers. For instance, secure boot processors ensure that only authenticated software runs on a device, while cryptographic accelerators speed up data encryption and decryption processes, vital for real-time secure communications.
Moreover, as digital threats evolve, Embedded Security Modules semiconductor IPs continue to advance, incorporating cutting-edge technologies like quantum encryption readiness and machine learning-led anomaly detection. This ongoing innovation not only fortifies existing systems but also prepares them for future challenges, making Embedded Security Modules a cornerstone of secure electronic design for years to come. Whether you are developing chips for personal gadgets or intricate industrial systems, integrating these security IPs ensures robust protection and compliance with stringent security standards, enhancing consumer trust and product reliability.
The AHB-Lite APB4 Bridge from Roa Logic is a versatile interconnect solution, designed to serve as a bridge between the AMBA 3 AHB-Lite v1.0 and the APB v2.0 (APB4) bus protocols. This soft IP core facilitates the connection of multiple APB4 peripherals through a single bridge, optimizing system design by reducing complexity and cost. The core is fully parameterized, supporting various APB4 address and data widths, and offers the capability to handle burst transfers automatically. It also supports different clock domains per interface, efficiently managing cross-domain timing with ease. This flexibility in design makes it suitable for a wide range of applications, especially those requiring efficient, cost-effective interconnect solutions. The AHB-Lite APB4 Bridge is ideal for use in applications requiring high integration and efficient communication between high-speed processors and peripheral devices. Source code and detailed documentation are readily available for download from Roa Logic's GitHub repository, ensuring developers have all necessary resources for seamless integration.
The AHB-Lite Multilayer Switch by Roa Logic is engineered to provide a high-performance, low-latency interconnect fabric for systems employing numerous AHB-Lite bus masters and slaves. This IP core enables configurations that support virtually unlimited bus connections, facilitated by slave-side arbitration for each slave port, thereby eliminating the need for individual bus masters to implement arbitration logic. A standout feature of this switch is its use of priority and round-robin based arbitration methods to efficiently manage multiple bus requests. Typically achieving arbitration within a single clock cycle, this design ensures minimal delay in data transfer across the network, promoting seamless communication in complex systems. With a fully parameterized architecture, it allows for the customization of bus interfaces to meet specific design needs, ensuring compatibility and optimal performance across varied configurations. Complete source code and comprehensive documentation are made available through Roa Logic’s GitHub repository, providing developers with the resources needed for successful integration and deployment.
Up to 1M KeyEnc/sec with improved power efficiency PQPerform-Lattice is a powerful hardware-based product designed for high throughput, high-performance, and high speed. It adds post-quantum cryptography for applications that typically handle a large number of transactions, such as high-capacity network hardware applications and secure key management HSMs. Optimizable for secure boot, as well as other use-cases, PQPerform-Lattice supports FIPS 204 ML-DSA for quantum-secure digital signature verification, as well as FIPS 203 ML-KEM for quantum key exchange. PQPerform-Lattice supports AXI4, PCIe, and is deployable in multiple instances, making it a powerful solution for existing systems and infrastructure requirements.
Polar ID offers an advanced solution for secure facial recognition in smartphones. This system harnesses the revolutionary capabilities of meta-optics to capture a unique polarization signature from human faces, adding a distinct layer of security against sophisticated spoofing methods like 3D masks. With its compact design, Polar ID replaces the need for bulky optical modules and costly time-of-flight sensors, making it a cost-effective alternative for facial authentication. The Polar ID system operates efficiently under diverse lighting conditions, ensuring reliable performance both in bright sunlight and in total darkness. This adaptability is complemented by the system’s high-resolution capability, surpassing that of traditional facial recognition technologies, allowing it to function seamlessly even when users are wearing face coverings, such as glasses or masks. By incorporating this high level of precision and security, Polar ID provides an unprecedented user experience in biometric solutions. As an integrated solution, Polar ID leverages state-of-the-art polarization imaging, combined with near-infrared technology operating at 940nm, which provides robust and secure face unlock functionality for an increasing range of mobile devices. This innovation delivers enhanced digital security and convenience, significantly reducing complexity and integration costs for manufacturers, while setting a new standard for biometric authentication in smartphones and beyond.
PUFrt stands as a bastion of semiconductor security, serving as a Hardware Root of Trust (HRoT) with unparalleled credibility. Its architecture is designed to generate and store hardware root keys securely within the chip, utilizing Physically Unclonable Functions (PUF) and a true random number generator (TRNG). These features ensure that cryptographic operations are fortified with a unique and unclonable identity, mitigating risks of physical tampering and creating a robust defense against reverse engineering.<br><br>Integral to its design is the secure OTP (One-Time Programmable) memory, which stores sensitive keys and data, adding a layer of protection that has been validated through rigorous security certifications. The PUFrt's anti-tamper technology guards against unauthorized access, ensuring the integrity of both hardware and software environments. Moreover, its design facilitates easy integration with various system architectures, expanding its applications beyond traditional security implementations.<br><br>Applications of PUFrt span from IoT devices to sophisticated computing systems, where its role as a secure entry point into connected ecosystems is crucial. By embedding a secure foundation, PUFrt not only strengthens semiconductor reliability but also enhances performance efficiency. This holistic approach to security makes it a linchpin in modern semiconductor design, supporting each stage of the device lifecycle with comprehensive, hardware-anchored security protocols.
The Platform-Level Interrupt Controller (PLIC) from Roa Logic is a highly adaptable interrupt management system, crafted in accordance with the RISC-V Privileged v1.10 specification. This core seamlessly integrates with AHB-Lite, supporting a wide range of interrupt sources and targets. It provides a robust foundation for managing complex interrupt architectures, essential in modern embedded systems. The PLIC core is meticulously designed for configurability, offering custom parameters for address and data widths, as well as the capacity to set unique priority levels per interrupt source. It includes features like programmable priority thresholds and an interrupt pending queue, allowing for tailored performance to meet the specific needs of an application. This controller ensures efficient handling of interrupt masking using a priority threshold system, further enabling sophisticated event management in multi-tasking environments. With comprehensive documentation and source code available through Roa Logic's GitHub, the PLIC is an accessible solution for developers looking to integrate reliable interrupt control in their RISC-V based systems.
Secure OTP offers a groundbreaking approach to data protection in semiconductor chips, employing an anti-fuse OTP memory to safeguard sensitive information. By combining hardware macros with digital RTL, it meticulously protects data at rest, in transit, or in use, making it a cornerstone of modern chip design. Its architecture supports various integrations across IC applications, providing robust and adaptable security solutions tailored for diverse markets.<br><br>This technology elevates the standard OTP solutions by incorporating advanced hardware encryption mechanisms and tamperproof designs. Secure OTP's seamless integration into multiple systems underscores its versatility, catering to demands across sectors such as automotive, industrial, and consumer electronics. Users benefit from secure key management and enhanced data integrity, mitigating the potential risks of traditional storage vulnerabilities.<br><br>The design philosophy behind Secure OTP centers on preventing data leakage, particularly for IoT devices that are prone to attacks. As devices face the growing menace of cyber threats, Secure OTP scales to meet these challenges head-on, providing fortified data storage solutions that are resistant to physical attacks and environmental variations. With the rising importance of secure encrypted storage, Secure OTP's role is vital in maintaining the integrity and confidentiality of critical chip information.
The HDCP Encryption-Decryption Engine developed by Trilinear Technologies is designed to protect digital audio and video content from unauthorized access during transmission. It aligns with the HDCP 2.2 standard, ensuring that all data exchanged between a display source and receiver remains secure and resistant to interception. This solution is vital for industries where content protection is paramount, such as in premium consumer electronics, professional audiovisual setups, and sensitive government or military communication channels. This engine supports the authentication protocols necessary for protected transactions over DisplayPort interfaces, using sophisticated AUX channels to seal data transfer securely. It is engineered to reduce the processing load by offloading encryption tasks from the system processor, thereby enhancing the overall system performance while maintaining robust security. Capable of integrating into a range of devices from set-top boxes to large multimedia systems, the HDCP Encryption-Decryption Engine offers developers a trustworthy method to shield content from piracy and unauthorized dissemination. Its implementation ensures that content providers can operate freely with the assurance that their digital rights are upheld across all endpoints.
The eSi-Crypto suite offers a comprehensive set of encryption and authentication solutions, optimized for ASIC and FPGA applications with low resource demands and high throughput. It features essential components such as a True Random Number Generator (TRNG), compliant with NIST 800-22, available as a hard macro. The IP includes a variety of encryption algorithms including CRYSTALS Kyber, CRYSTALS Dilithium, ECC/ECDSA, RSA, AES, and SHA1-SHA3. These algorithms are designed for robust security and can be integrated as standalone cores or with AMBA APB/AHB or AXI bus interfaces, serving diverse applications like secure communications and financial transactions.
Highly-optimized PQC implementations, capable of running PQC in < 15kb RAM PQCryptoLib-Emebedded is a versatile, CAVP-compliant version of PQCryptoLib, PQShield’s CMVP-certified library of post-quantum cryptographic algorithms. With its design focused on ultra-small area efficiency, PQCryptoLib-Embedded has been specifically designed for embedded systems, microcontrollers and memory-constrained devices. It could be the first step towards a hardware solution for providing PQC integration to devices already in the field.
The Titanium Ti375 is a flagship FPGA product that balances high density and low power consumption, making it ideal for a range of applications requiring significant computational capabilities with energy efficiency. This FPGA includes Efinix's Quantum™ compute fabric, which provides advanced I/O interfaces including SerDes transceivers, LPDDR4 DRAM controllers, and MIPI D-PHY interfaces. These features make the Ti375 a versatile choice for system designers aiming to integrate complex interfaces in a compact footprint.\n\nThe Ti375 FPGA excels in areas such as edge computing and high-performance data processing, supporting a wide range of applications from industrial automation to consumer electronics. With its hardened RISC-V block, the Titanium Ti375 can handle demanding tasks without external processors, offering an on-chip solution that reduces both footprint and power usage. Furthermore, it includes capabilities like stream encryption and authentication, ensuring secure data processing in sensitive environments.\n\nDesigned with future-proofing in mind, the Ti375 supports integration into systems with rigorous longevity requirements. It aligns with Efinix's commitment to deliver reliable technology over extended product lifecycles, catering to industries that necessitate stability and long-term support. With a process node efficiently structured at 16nm, the Titanium Ti375 offers a compact size without compromising on performance, making it an excellent choice for ongoing innovations in embedded systems, communications, and power-sensitive applications.
Secure Protocol Engines from Secure-IC are designed to enhance network and security processing in data centers by offloading heavy computational tasks. These engines feature some of the industry's fastest SSL/TLS handshaking capabilities, paired with ultra-high-performance MACsec and IPsec processing. By managing demanding network tasks, Secure Protocol Engines enable data centers to optimize resources and improve system performance significantly. As data transmission and sensitive information exchange become increasingly common, these engines provide crucial support in maintaining robust security measures against interception and unauthorized access. The Secure Protocol Engines are optimized to integrate seamlessly with existing infrastructures, ensuring minimized impact on overall system efficiency and maximizing throughput and security.
The Flash Protection Series by PUFsecurity revolutionizes the way sensitive data is protected on semiconductor devices by extending the reach of the Hardware Root of Trust to flash memory. This series of IP solutions provides comprehensive protection for a range of memory types including embedded, NAND, and NOR flash solutions. It incorporates PUF-based technology to ensure secure encryption and decryption processes, crucial in safeguarding data integrity at every stage.<br><br>Each module within the Flash Protection Series serves a unique function; PUFef secures embedded flash by using a lite crypto engine, while PUFenc and PUFxip extend this protection to external NAND and NOR flash systems. These modules are designed to avert unauthorized access and leakage of critical data, making them essential components in securing the software and hardware ecosystems of SoCs.<br><br>These solutions allow chip manufacturers to implement robust fingerprinting mechanisms, enhancing the overall security capabilities of semiconductor devices. By facilitating execution-in-place and real-time decryption for flash memory, the Flash Protection Series empowers engineers with the tools needed to create advanced, secure semiconductor products. This provides manufacturers with the confidence that their products are protected against an array of cyber threats.
Securyzr iSSP is a versatile platform that aims to provide a comprehensive security lifecycle management solution. This embedded security service platform ensures that devices are protected from the chip level throughout their lifecycle. It features security operations like secure boot, firmware updates, and intrusion detection, all managed from the cloud, enabling secure deployment and management across fleets of devices. Its design caters to complex security challenges by offering a scalable, end-to-end solution for managing device security without manual intervention, known as zero-touch security services. The Securyzr iSSP is optimized to handle critical operations securely across different hardware and software environments, ensuring integrity and confidentiality.
Fully autonomous, FIPS 140-3 CAVP compliant PQC subsystem PQPlatform-SubSys is a cryptographic subsystem, designed to provide offloaded cryptographic services with minimal integration effort and full autonomy from an existing security subsystem, as well as configurable side-channel protection. These services include post-quantum signature generation, verification, and secure key establishment. It’s built with optimal performance in mind, as well as crypto agility with its provision of traditional, PQ/T hybrid and fully post-quantum algorithms. PQPlatform-SubSys uses its built-in RISC-V CPU independently from the surrounding system, allowing cryptographic services to be offloaded efficiently from the system processor.
FIPS 140-3 CAVP-compliant, compact lattice-based hardware PQC engine PQPlatform-Lattice is a compact FIPS 140-3 CAVP-compliant, PQC engine that adds post-quantum support for hardware components and embedded devices, using lattice-based cryptographic algorithms such as ML-KEM (FIPS 203) for post-quantum key exchange, and ML-DSA (FIPS 204) – post-quantum digital signature verification. It provides secure acceleration of lattice-based PQC alongside support for traditional cryptography. Its use cases include strong user authentication, protecting hardware keys, and small-footprint, configurable side-channel protection. PQPlatform-Lattice is designed for minimal area as well as maximum compatibility and can be deployed with optional firmware-backed side-channel countermeasures. It is covered by multiple PQShield implementation patents.
The WiseEye2 AI solution by Himax represents a significant leap forward in AI-enhanced sensing for smart devices. Designed for low-power operation, this solution integrates a specialized CMOS image sensor with the HX6538 microcontroller to deliver high-performance AI capabilities with minimal energy consumption. This makes it ideal for battery-powered devices that require continual operation, facilitating a new generation of always-on AI solutions without the typical drain on battery life. Thanks to its ARM-based Cortex M55 CPU and Ethos U55 NPU, WiseEye2 offers robust processing while maintaining a compact profile. Its multi-layer power management architecture not only maximizes energy efficiency but also supports the latest advancements in AI processing, allowing for faster and more accurate inference. Additionally, its industrial-grade security features ensure that data remains protected, catering particularly well to applications in personal computing devices. By enhancing capabilities such as user presence detection and improving facial recognition functionalities, WiseEye2 helps devices intelligently interact with users over various scenarios, whether in smart home setups, security domains, or personal electronics. This blend of smart functionality with energy conscientiousness reflects Himax's commitment to innovating sustainable technology solutions.
Monolithic Microsystems represents a technological leap in integrated system design, featuring multiple micro-engineered elements within a single chip. This system leverages advanced CMOS technology to unify electronic, photonic, and micromechanical devices, creating a compact and efficient platform suited for a variety of applications. By integrating different functionalities within a single substrate, these Microsystems can enhance performance while reducing the overall system footprint. They are increasingly being used in fields such as telecommunications, medical devices, and consumer electronics, where precision, reliability, and miniaturization are of paramount importance.
The Securyzr Key Management System is designed to handle complex cryptographic key management centrally, ensuring secure generation, distribution, and storage of keys. This system is integral for maintaining the security of cryptographic protocols which form the backbone of secure communications and digital identity verifications. Featuring flexible and scalable key management strategies, this product is essential for industries with stringent data protection requirements such as banking, telecommunications, and cloud services. It is engineered to seamlessly integrate with a variety of IT infrastructures, offering powerful protective measures against unauthorized access and enhancing the overall security posture of an organization.
The GL3004 fisheye image processor offers comprehensive image processing capabilities, tailored specifically for wide-angle lens applications. It delivers exceptional fisheye correction methods, allowing for versatile dewarping options from spherical panorama views to specific stitching modes. Integrated hardware ensures that images maintain high fidelity, with a focus on accurate color processing and enhanced dynamic range. Supporting inputs up to 3 megapixels, it excels in real-time processing with an integrated ISP that handles a broad spectrum of imaging functions from noise reduction to auto-exposure control. This processor ensures that every captured scene disperses real-life details efficiently, which is critical in surveillance and advanced photography contexts. Designed with multiple interfaces, such as MIPI and BT standards, the GL3004 can fit into diverse applications, offering seamless integration potential. With an onboard Cyclone-8051 CPU, it processes instructions at a high speed, with reliable PLL systems managing clock operations across varied loads, making it a solid solution for creative and technical image requirements.
ReRAM, or Resistive RAM, is a revolutionary memory technology developed by CrossBar. It utilizes a unique structure, comprising a simple three-layer design that leverages a top electrode, a switching medium, and a bottom electrode. This assembly allows for the formation of a filament within the switching material when a voltage is applied, resulting in efficient and stable resistance switching. One of the remarkable features of ReRAM is its capability to scale beyond traditional limits, making it highly adaptable in terms of its integration with logic processes across various foundries and down to technology nodes smaller than 10nm. This technology powers a new era of memory storage, offering terabytes of data capacity directly on a single chip through its ability to stack in 3D formations. ReRAM's compatibility with CMOS processes facilitates its deployment in both standalone memory devices and System-on-Chip (SoC) designs. Moreover, it boasts an impressive endurance, with over a million write cycles and a decade-long retention period at elevated temperatures of 85°C, making it an excellent choice for high-performance and high-density applications, including artificial intelligence and secure computing. By offering multifaceted ReRAM IP cores, CrossBar caters to a variety of applications ranging from automotive and industrial to mobile and consumer electronics. Its advantages over conventional Flash memory are evident in reduced latency, faster write speeds, and lower energy consumption, which collectively contribute to enhanced lifetime and performance of storage solutions in modern digital environments.
The SiFive Automotive family of processors is engineered to meet the evolving demands of the automotive industry, focusing on safety, security, and performance. These processors are compliant with the latest automotive standards, including ISO26262 for functional safety and ISO/SAE 21434:2021 for cybersecurity. Whether addressing needs in advanced driver assistance systems (ADAS), infotainment, or powertrain management, SiFive Automotive solutions provide a robust platform for automotive innovations. At the heart of the Automotive series is a portfolio that encompasses the A-Series processors, delivering top-notch applications processing capabilities. These solutions are optimized for the demands of automotive electronics, supporting both high-performance and real-time processing with low area and power consumption. Testified by leading automotive experts and partners, SiFive's automotive IP features long-term support and a roadmap designed to future-proof automotive technology. SiFive's commitment to automotive excellence is further supported by a wide ecosystem of partnerships with leading technology companies. Their processors are ready for integration into comprehensive automotive solutions, paving the way for the next generation of smart, connected vehicles. The SiFive Automotive family ensures that vehicle manufacturers can meet the high standards of safety and functionality required for modern automotive systems.
The FortiCrypt solution stands as a beacon in hardware security, offering unmatched protection against side-channel attacks and fault injection. Utilizing a multi-pipeline architecture, FortiCrypt is designed to deliver superior throughput without sacrificing performance or increasing latency, making it ideal for both authentication and storage encryption applications. This IP core's architecture includes unique features that protect not only the core encryption process but also the associated authentication mechanisms, setting it apart from standard solutions on the market. FortiCrypt's protection scheme is algorithm-driven and implementation-agnostic, meaning it fits seamlessly into any existing framework while maintaining its superior security measures. Its rigorous Test Vector Leakage Assessment certification underscores its resilience, having been validated both in analytical and real-world environments. The design is fully synthesizable, removing the need for custom cell designs, which saves time and resources in the development process. The FortiCrypt core offers multiple configurations, including ultra-low power and ultra-compact options, aligning with varying user-specific requirements. These configurations provide a balance between performance, energy efficiency, and gate count, making it a versatile choice for a wide range of applications from IoT devices to secure communication systems.
NVM Defender is designed to secure embedded software, cryptographic keys, and personal data from pervasive invasive attacks such as NVM code extraction. Any integrated circuit using NVM Defender is shielded from replication, emulation, and counterfeiting attempts, making it an essential component for companies looking to safeguard their intellectual property and critical data. This pioneering solution integrates a self-aware mechanism that detects attacks in real-time, providing a robust, easy-to-integrate countermeasure against data breaches. The architecture of NVM Defender is crafted to be penetrative-resistant, ensuring that even with full disclosure of the IC's design, extracting sensitive code remains impractical. This design approach underscores Texplained's commitment to comprehensive hardware and software protection, offering peace of mind to manufacturers concerned about safeguarding their technological innovations and customer data. With its effective, cost-efficient, and integrate-friendly design, NVM Defender exemplifies "Security By Design," enabling chip manufacturers to incorporate it seamlessly into their security framework. By making the source code inaccessible to attackers, it significantly reduces the risk of electronic devices being cloned or counterfeited, thereby protecting the market share and reputation of the original manufacturers.
FIPS 140-3 CAVP-compliant, compact PQC hardware acceleration for subsystems PQPlatform-CoPro combines hash-based and lattice-based post-quantum cryptography that can be added to an existing security subsystem. It can be optimized for minimum area, maintaining high-performance, and is designed to be run by an existing CPU using PQShield-supplied firmware, meaning it involves low integration effort and flexible configurations to support a wide variety of use cases, including quantum-safe secure boot. Solutions are available for hardware acceleration of SHA-3, SHAKE, ML-KEM, ML-DSA, alongside traditional cryptography. In addition, PQPlatform-CoPro can be configured with side-channel protection. PQPlatform-CoPro is covered by multiple PQShield implementation patents.
The PUFcc Crypto Coprocessor sets a new standard in embedded security solutions by integrating a robust Hardware Root of Trust with advanced cryptographic capabilities. Tailored for modern applications, PUFcc features a comprehensive set of NIST-certified cryptographic algorithms that enhances device security across all stages of its lifecycle. This coprocessor excels in managing key generation, storage, and execution of sophisticated cryptographic tasks, embedding security deeply within the hardware.<br><br>PUFcc distinguishes itself with its high-speed performance and adaptability to contemporary security standards. By including support for TLS 1.3, it meets emerging demands for secure communication protocols in IoT and AI applications. Its design is optimized for ease of integration, featuring standard interfaces that enhance the design process and reduce time to market for new semiconductor products.<br><br>Operability across different system architectures is enhanced through PUFcc's ability to interface with various external memory systems thus extending the security functions beyond conventional boundaries. It is particularly beneficial for sectors demanding high security and flexibility, offering a robust foundation for safe data transactions in critical infrastructures.
The VibroSense AI Chip is a cutting-edge solution designed for vibration analysis in Industrial IoT applications. It is based on the Neuromorphic Analog Signal Processor, which preprocesses raw sensor data, significantly reducing the amount of data to be stored and transmitted. This chip is particularly beneficial in predictive maintenance applications, where it helps in the early detection of potential machinery failures by analyzing vibrations generated by industrial equipment. VibroSense excels in overcoming the traditional challenges linked to data processing for condition monitoring systems. By performing data preprocessing at the sensor level, it minimizes data volumes by a thousand times or more, making it feasible to conduct condition monitoring over narrow-bandwidth communications and at lower operational costs. This ensures industrial operations can identify issues like bearing wear or imbalance effectively, ultimately extending equipment life and improving safety. The implementation of VibroSense's neural network architecture enables it to handle complex vibration signals with high accuracy. It supports energy-efficient designs, providing a compelling solution for industries aiming to optimize maintenance operations without increasing their OPEX. Its ease of integration with standard sensor nodes and support for energy harvesting applications further enhances its market appeal.
The Human Body Detector is a low-energy sensor designed to significantly reduce power consumption in various devices. It detects when an item is being worn, facilitating energy savings by minimizing unnecessary power usage. Ideal for applications involving wearables, the detector helps extend battery life, making it indispensable for energy-efficient designs. This detector stands out for its precision in discerning human presence, providing seamless integration into IoT and energy-harvesting applications. Its robust design ensures reliability even in fluctuating environmental conditions, showcasing Microdul's emphasis on practical, power-conscious technology solutions. By effectively managing device activation based on user interaction, the Human Body Detector helps maintain peak device performance while conserving energy. As part of Microdul's suite of ultra-low-power sensors, it's perfectly suited to modern electronics where resource efficiency is key.
The RISC-V CPU IP NS Class, by Nuclei System Technology, is designed to focus on security-centric applications. It is ideal for fintech payments, IoT security, and other sectors where information security is of utmost importance. Built with a RISC-V foundation, this IP emphasizes modularity, allowing specialized configurations to meet specific security standards and requirements. With functionality geared towards comprehensive information security solutions, the NS Class provides support for Trusted Execution Environments (TEE) and additional physical security packages. It is tailored to satisfy stringent safety regulations, making it an apt choice for addressing vulnerabilities in high-stakes technological settings. This IP stands out due to its support for cutting-edge security protocols and adherence to top-tier safety standards such as ASIL-B and ASIL-D functional safety packages. Partners utilizing the NS Class can expect highly reliable, secure, and compliant solutions that maintain integrity and confidentiality across various application domains.
The Customizable Cryptography Accelerator by ResQuant is designed to cater to diverse client needs, offering a broad range of configurable options. It integrates seamlessly with the complete set of NIST post-quantum cryptography standards, including algorithms like Dilithium, Kyber, and XMSS. This flexibility extends further by allowing customers to incorporate their own algorithms. This cryptography accelerator is straightforward to tailor in terms of performance and size, helping cater to varied application requirements. Its design incorporates defenses against various side-channel attacks, although some features like resistance to Differential Power Analysis (DPA), timing attacks, and Simple Power Analysis (SCA) are in development. The adaptability of the accelerator is enhanced with AXI 4 compatibility, ensuring it can be easily integrated into complex system-on-chip designs. Customers can expect a future-proof, versatile cryptographic solution that addresses both existing and emerging cybersecurity challenges. This product represents a significant advancement for organizations transitioning to quantum-safe security solutions.
VeriSyno's Digital Systems and Security Solutions deliver high-performance digital IPs that are crucial in modern electronic design, catering specifically to the growing demand for secure and efficient systems. These solutions encapsulate years of expertise in digital design, offering vital IP cores necessary for building cutting-edge technology products. This suite aims at enhancing security protocols through its innovative designs, providing assurance in data protection and system integrity. Whether used for consumer electronics, industrial applications, or any sensitive data-driven operations, these solutions provide peace of mind and reliability. The company ensures these digital solutions remain adaptable to various architectures, highlighting their commitment to flexibility and client-focused innovation. With ongoing support and extensive customization options, the Digital Systems and Security Solutions offer a resilient foundation for any high-stakes technology ecosystems.
Microdul's Capacitive Proximity Switch is engineered to provide enhanced energy efficiency in electronic designs. This switch leverages capacitive technology to react to proximity, bringing energy-conscious control over device operations. Its primary applications include systems that benefit from touchless interaction, like contactless switches or smart lighting solutions. Built to last, the switch detects user presence or absence effortlessly, decreasing the energy drain on power-sensitive devices. Its adaptability makes it a favorite for manufacturers focusing on extending product lifespan while cutting down unnecessary energy expenditure. The switch's precision allows for its integration in a wide array of electronic environments, ensuring that devices remain active only when in functional use. By incorporating it into electronic products, designers can achieve greater control over power usage, aligning with sustainability goals and enriching user experiences.
The Integrated Secure Element (iSE) by Secure-IC acts as a root of trust for Systems-On-Chip (SoC), safeguarding the main system processor via advanced security measures such as secure boot processes, anti-tampering mechanisms, and key isolation protocols. Embedded within SoCs, iSE offers a fortified layer of protection that significantly exceeds traditional executing environments by isolating functions and ensuring robust defense against diverse cyber threats. Suitable for a wide range of applications from IoT devices to automotive systems, the iSE delivers top-tier security features that include updates without downtime, extensive cryptographic operations, and real-time monitoring to pre-emptively block any intrusion attempts. This secure element empowers systems with the ability for self-defense against both physical and digital attacks, making it an essential element of next-generation cybersecurity frameworks.
NeoPUF leverages the concept of Physically Unclonable Functions (PUFs) to establish a robust hardware security foundation. It exploits the natural variance in silicon manufacturing to generate a unique fingerprint for each device, serving as an unforgeable 'silicon biometrics' that enhances security functions in electronic designs. The PUF-derived numbers can be applied to security tasks such as key management, authentication, and encryption, providing a hardware root of trust vital for critical data protection. NeoPUF offers a scalable, rootless security solution that requires no additional processing steps, making it highly efficient. In an era where hardware security is crucial, NeoPUF provides a robust solution for safeguarding sensitive operations, aligning with modern semiconductor needs and beyond conventional software security measures.
The FPGA Lock Core is an innovative FPGA solution designed to secure FPGAs and hardware against unauthorized access and counterfeiting, leveraging a Microchip ATSHA204A crypto authentication IC. It reads a unique ID, generates a 256-bit challenge, and uses secure hashing to verify the hardware's authenticity, ensuring hardware integrity in sensitive applications like military and medical fields. This solution allows hardware protection against IP theft by enforcing authentication and disables FPGA functionality if unauthorized access is detected. The core utilizes minimal logic resources and one FPGA pin, communicating through a bidirectional open drain link. The clarity of this system is enhanced by providing the core in VHDL, allowing users to thoroughly understand its functionality, supported by example designs on Cyclone10 and Artix 7 boards, catering to both Intel and Xilinx FPGA platforms. Complementing this security measure is the Key Writer Core, which allows programming of custom secret keys into the ATSHA204A in situ on assembled boards, ensuring a seamless integration with the FPGA Lock system. Available for various FPGA platforms, the Efinix version, distributed with TRS Star, expands its applicability, with webinars and user guides offering in-depth implementation insights.
Specially designed for accelerating AI recommendation systems, the RecAccel N3000 PCIe card offers exceptional performance in handling data-intensive AI workloads. It stands out due to its advanced architecture, which allows for high efficiency and fast processing speeds in recommendation tasks. The PCIe card is optimized to interact with existing infrastructures, providing a straightforward solution for enterprises looking to enhance their AI capabilities without significant investments in new hardware. This product excels in performance metrics, offering up to a million DLRM inferences per Joule, which makes it highly power-efficient and cost-effective. Moreover, the RecAccel N3000 PCIe ensures compatibility with prevailing AI frameworks, thus allowing users to upgrade their systems seamlessly. This compatibility, combined with power efficiency and high performance, makes it a preferred choice for businesses that require reliable AI recommendations capabilities.
The MIFARE Certification Technologies is a critical component in the realm of certification technologies, especially focusing on contactless smart card solutions. As urban centers integrate smart solutions for transportation, access control, and payment systems, MIFARE technology offers robust security and efficient processing. LSI-TEC ensures that products comply with stringent security and functionality standards through comprehensive certification. In the smart card sector, precision and compliance are pivotal for market acceptance. MIFARE Certification Technologies offer a seamless validation process, validating contactless products' interoperability and compliance with industry norms. This ensures reliability and security in every transaction or access operation. By leveraging these technologies, LSI-TEC plays an essential role in advancing secure, seamless, and scalable payment solutions. Their certification processes help partners and clients meet international standards, facilitating smoother integration into global markets, and setting a benchmark in smart card technology certification.
PUFhsm is an advanced embedded Hardware Security Module designed to meet the rigorous security demands of automotive and high-performance applications. This module serves as a secure enclave within systems, isolating critical security functions to enhance protection against external threats. It integrates a dedicated CPU along with cryptographic engines to support a complete suite of security processes, such as secure boot, secure updates, and lifecycle management.<br><br>Incorporating EVITA-Full compliance, PUFhsm provides a fortified environment for automotive systems, safeguarding against sophisticated cyber threats. It supports autonomous cryptographic operations within the system, ensuring that sensitive information is shielded from potential vulnerabilities inherent in main processor systems.<br><br>PUFhsm's flexibility and scalability make it an ideal choice for engineers looking to boost security without compromising system efficiency or time-to-market. Its integration into existing architectures is seamless, and when paired with PUFrt, it delivers unparalleled security features, creating a robust defense mechanism that upholds data integrity across the semiconductor lifecycle.
The Evo Gen 5 PCIe Card is specifically crafted for AI inferencing tasks, aiming to enhance performance while optimizing power consumption. This card is a formidable tool in enabling enterprises to address the growing demand for AI inference capabilities, leveraging the Gen 5 architecture to deliver unparalleled speeds in processing AI tasks. Designed with flexibility in mind, the Evo Gen 5 easily slots into existing IT infrastructures, ensuring minimal disruption while significantly boosting computing capabilities. With its advanced architecture, it supports complex AI workloads, allowing businesses to explore AI applications with greater confidence and capability. The Evo Gen 5 PCIe Card is particularly beneficial for industries looking to handle large volumes of data swiftly and accurately, facilitating real-time AI analysis and boosting productivity through improved inference rates. Its efficient design ensures that energy costs are kept low, making it a cost-effective addition to any AI-driven enterprise.
QDID PUF is a unique offering designed to generate a distinct identity for devices, leveraging the principles of quantum tunneling. The randomness essential to this process comes from natural variations in oxide thickness and the random distribution of defects in the gate oxide. These properties make the QDID PUF a foundational element for establishing hardware root-of-trust within a security architecture, ensuring robust protection against unauthorized access and attacks. The QDID technology excels in resisting side-channel attacks by creating on-demand and unique identities without needing permanent storage of cryptographic keys, further reducing risk and cost in secure device provisioning. With proven performance under varying environmental conditions, it ensures operational integrity over extended periods, contributing to the security of embedded systems.
This IP module brings TensorFlow Lite inference capabilities to FPGA platforms, particularly designed for implementing neural network models like OCR. This flexible solution supports high-speed recognition tasks in embedded systems. By offering a prebuilt overlay, the IP handles the complexities of neural network operations, allowing users to leverage sophisticated AI models in resource-constrained environments.
The Security Protocol Accelerator is engineered to enhance cryptographic processes within digital systems by offloading computationally intensive operations. By integrating this solution, systems benefit from accelerated security protocols while maintaining a low power footprint and efficient resource usage. Designed specifically for secure data transactions, this accelerator manages both symmetric and asymmetric cryptography. It enables seamless encryption processes for secure communications channels, ensuring data privacy and integrity across various platforms. As systems evolve to address ever-growing security challenges, the Security Protocol Accelerator provides the necessary infrastructure for enhancing real-time data protection protocols. This product not only ensures compliance with contemporary security standards but also prepares systems for future technology advancements, laying a foundation for post-quantum cryptographic frameworks.
This DES/3DES core is engineered to implement the classic Data Encryption Standard efficiently with a minimal gate footprint, supporting encryption and decryption of 64-bit data blocks through basic to enhanced cipher modes. It is ideal for areas needing robust encryption, like secure communications and financial transactions, and offers flexibility with single, double, and triple key modes. The core’s compact design makes it particularly suited for deployments where space and power are constrained, utilizing fewer than 3,000 gates.
CoMira Solutions offers a Media Access Control Security (MACSec) solution adhering to IEEE standards aimed at safeguarding communication within 802.1 LAN environments. MACSec ensures data confidentiality and integrity, preventing unauthorized access and disruptions. It employs advanced encryption standards and supports flexible traffic management through various port configurations. The MACSec IP's time-division multiplexed architecture aligns seamlessly with CoMira's UMAC, ensuring synchronous operation despite differing link speeds. This implementation includes FIPS-compliant encryption methods such as GCM-AES-128 and GCM-AES-256, supporting robust security needs. Furthermore, CoMira's MACSec supports multiple secure channels and security associations per port, adding layers of protection to client systems. The configurability of Secure Channels and the ability to strip security tags enhances its adaptability in varied networking scenarios, reflecting CoMira's commitment to delivering tailor-fit security solutions.
Suite-Q HW represents a sophisticated system-on-chip (SoC) design that integrates essential cryptographic operations crucial for modern data security protocols. Targeting both high-end servers and low-end embedded systems, Suite-Q HW employs a unified hardware architecture to ensure efficient execution of cryptographic tasks. This hardware solution supports a diverse range of cryptographic algorithms, including both classical and post-quantum options. It incorporates advanced public key cryptographic operations such as ECDSA and various isogeny, lattice, and code-based strategies awaiting broader standardization. The suite’s flexibility allows it to adapt to different operational demands and integrate with existing infrastructure seamlessly. Suite-Q HW's cornerstone is its high degree of configurability, offering customizable performance based on targeted applications. This versatility ensures optimal resource allocation, making it a preferred choice for systems requiring stringent security measures without compromising on computational efficiency. With optional features for defending against differential power analysis (DPA) attacks, the SoC further enhances its defense mechanisms, ensuring robust protection against sophisticated threats.
Suite-Q SW consists of a versatile cryptographic software library designed for optimizing code size, stack usage, and performance across various embedded processors and microcontrollers. Available in portable C code and high-speed assembly, Suite-Q SW can be tailored to fit the specific needs of diverse development environments. This library provides extensive support for symmetric and asymmetric cryptographic functions, catering to systems ranging from high-end processors to memory-constrained embedded devices. By facilitating efficient cryptographic computations, Suite-Q SW ensures minimal impact on system performance while maximizing data security. Its adaptability is marked by simple integration modules that work seamlessly with hardware accelerators, enabling enhanced cryptography for both standard and custom specifications. This reliability makes Suite-Q SW an indispensable tool for ensuring secure communication channels while maintaining an optimal balance between speed and resource utilization.
The Geon Secure Execution Processor is built on the well-regarded BA22 architecture, known for its high code density and efficiency. Operating at 1.79 DMIPS/MHz, this processor reaches impressive speeds of over 450 MHz in 65 nm technology. It is expertly designed for cryptographic isolation, helping ensure sensitive information is securely managed. Its design and system-level verification make it suitable for a broad range of security applications.
The RecAccel AI Platform is a cutting-edge computing solution tailored for high-accuracy AI applications. Engineered for environments that desperately require precision and speed, this platform stands out with its ability to handle complex AI tasks with remarkable efficiency. Its architecture is calibrated to support seamless integration, ensuring that enterprises can adopt AI solutions without facing significant system overhauls. This platform is equipped to maintain crucial accuracy levels across intensive workloads, making it indispensable in fields where precision cannot be compromised. By harnessing significant computational power with energy-saving capabilities, the RecAccel AI Platform helps businesses minimize costs while maximizing performance. This blend of power efficiency and high-performance computing positions the RecAccel AI Platform as a desirable choice for organizations aiming to harness the full potential of AI technology.
The SHA-3 Crypto Engine is a high-performance hardware accelerator designed to handle cryptographic hashing functions efficiently. It fully complies with NIST's FIPS 202 standard and supports all standard SHA-3 hash functions, including SHA-3-224, SHA-3-256, SHA-3-384, and SHA-3-512, along with extendable output functions such as SHAKE-128 and SHAKE-256. This IP core is engineered to offer robust security measures, including protection against time-based side-channel attacks, and features automatic byte padding. Operating within a single clock domain, it has undergone thorough verification to ensure reliability. Its noteworthy versatility makes it suitable for diverse applications like message authentication codes, secure boot engines, TLS/SSL protocol engines, blockchain systems, and pseudo-random bit generation. The SHA-3 Crypto Engine provides a seamless integration into systems, with AMBA® AXI4-Stream support and a fully synchronous design, enabling compatibility with both FPGA and ASIC platforms. Moreover, its comprehensive deliverables include Verilog RTL source code, extensive testbenches, integration examples, and support resources.
The RISC-V Platform-Level Interrupt Controller (PLIC) by IQonIC Works is a sophisticated, configurable interrupt manager designed to support systems with a vast array of interrupt sources. Adhering to RISC-V specifications, it ensures efficient delivery of interrupts to multiple processor targets, whether in single or multiprocessor architectures. Its capabilities extend to managing up to 1023 interrupt sources across varying priority levels and target configurations. PLIC offers exceptional flexibility through its AHB-Lite interfacing, allowing streamlined access for setting priorities, enables, and handling interrupt claims. Its asynchronous request handling and comprehensive security features ensure dependable and secure interrupt allocation, supporting both synchronous and asynchronous signals. The capability to enable interrupts for multiple targets facilitates efficient resource sharing. In complex systems, the PLIC provides seamless integration with shared bus structures, correlating interrupt requests with processor execution contexts effectively. This integration contributes to a reduction in response latency and boosts overall system reliability. By leveraging IQonIC Works' PLIC, developers can ensure high-performance interrupt management crucial for modern, versatile computing environments.
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