All IPs > Security IP > Cryptography Software Library
In today's digital age, security is of paramount importance. Cryptography software libraries are a crucial component of semiconductor IPs, offering robust solutions designed to encrypt, decrypt, and ensure the integrity of information across various platforms and applications. These libraries provide the foundational algorithms and protocols essential for implementing secure communications and safeguarding sensitive data from unauthorized access, tampering, or corruption.
Cryptography software libraries are versatile, supporting a vast array of algorithms such as RSA, AES, SHA, ECC, and more. These libraries are integral to the development of secure systems and are leveraged in myriad applications ranging from personal electronic devices, such as smartphones and computers, to expansive enterprise and governmental systems. They form the backbone of secure data transactions, protecting consumer information during online banking, shopping, and other sensitive communications.
The products within this category are used to build the security layers in hardware devices, providing high efficiency and reliability with optimized performance. Whether you are designing chips for data centers, IoT devices, or embedded systems, employing a cryptography software library not only enhances user trust but also complies with stringent regulatory requirements surrounding data protection and privacy.
At Silicon Hub, our selection of cryptography software library semiconductor IPs is tailored to meet diverse industry needs, ensuring your products are equipped with state-of-the-art security features. Each library is developed with scalability and adaptability in mind, empowering developers to integrate them seamlessly into multi-platform environments. With a focus on minimizing the latency and maximizing the throughput, our cryptography software solutions enable high-speed, secure operations critical to modern computing environments.
The RV12 RISC-V Processor from Roa Logic is a highly versatile CPU designed for embedded applications. It complies with the RV32I and RV64I specifications of the RISC-V instruction set, supporting single-core configurations. The RV12 processor is renowned for its configurability, allowing it to be tailored to specific application requirements. It implements a Harvard architecture, which enables concurrent access to both instruction and data memory, optimizing performance and efficiency. Roa Logic's RV12 processor is part of their broader portfolio of 32/64-bit CPU solutions that leverage the open-source RISC-V instruction set. This architecture is favored for its simplicity and scalability, making it ideal for various embedded systems. The processor is equipped with an optimizing feature set that enhances its processing capabilities, ensuring it meets the rigorous demands of modern applications. Incorporating the RV12 processor into projects is streamlined thanks to its comprehensive support documentation and available test benches. These resources facilitate smooth integration into larger systems, providing developers with a reliable foundation for building advanced embedded systems. Its design is a testament to Roa Logic's commitment to delivering high-performance, adaptable IP solutions to the semiconductor industry.
The AHB-Lite Timer from Roa Logic is a precision timing module designed to comply with the RISC-V Privileged specification. This timer is engineered to manage time-sensitive operations within systems that utilize the AHB-Lite bus protocol, ensuring accurate timing for a variety of applications. By providing robust timer functionalities, the AHB-Lite Timer assists in overseeing operations where precise timing is crucial, such as coordinating tasks within embedded systems or managing periods in control processes. Its compliance with RISC-V standards ensures that it integrates seamlessly with systems based on this widely adopted open standard, enhancing compatibility and performance. Developers can take advantage of Roa Logic's comprehensive support materials, which include detailed documentation and pre-configured test environments, to facilitate the easy integration of the timer into existing designs. This support infrastructure is indicative of Roa Logic's commitment to simplifying the adoption and effective utilization of its sophisticated IP offerings within diverse system architectures.
The Titanium Ti375 FPGA is a high-density, low-power solution featuring Efinix’s Quantum® compute fabric. This state-of-the-art FPGA is equipped with a range of advanced features including a hardened RISC-V block, SerDes transceiver, and an LPDDR4 DRAM controller. It is designed to meet the demands of applications requiring high computational efficiency and low power consumption, making it ideal for rapid application development and deployment. This FPGA offers exceptional processing capabilities and flexibility, helping to reduce design complexity while optimizing performance for data-intensive applications. Its small package footprint is suitable for highly integrated systems, providing seamless compliance with existing protocols such as MIPI D-PHY. This combination of features makes it suitable for use in edge computing devices, advanced automotive systems, and next-generation IoT applications. Additionally, the Titanium Ti375 allows developers to exploit its high-speed I/O capabilities, facilitating robust peripheral interfacing and data transfer. The device also benefits from bitstream authentication and encryption to secure the intellectual property embedded within. As part of its wide-ranging applicability, it suits industrial environments that require solid reliability and long-term product lifecycles.
The Alcora V-by-One HS Daughter Card is tailored for high-speed digital interfacing, specifically aligning with FPGA development boards via FMC connectors. The card features 8 RX and 8 TX lanes, with the option to combine two FMC cards for a total of 16 lanes. This configuration supports video resolutions up to 4K at 120Hz or 8K at 30Hz, demonstrating its capability to handle large volumes of data efficiently. Designed to meet the demanding requirements of high-resolution and high-frame-rate applications, the Alcora card integrates dual clock generators to optimize signal clarity by synthesizing the transceiver reference clock and minimizing jitter. This characteristic is crucial in maintaining data integrity and ensuring smooth video performance, making the Alcora an optimal choice for flat panel display integration. Featuring flexible connectivity options, the Alcora card is available in both 51-pin and 41-pin header variants. This design ensures that it can provide a comprehensive interface to meet various technical challenges, advancing the capabilities of high-speed digital communications within FPGA systems.
PUFrt is a sophisticated Hardware Root of Trust (HRoT) solution that focuses on generating and storing root keys that never leave the chip, ensuring a secure environment for sensitive operations. This IP incorporates a 1024-bit Physical Unclonable Function (PUF) along with a true random number generator (TRNG) compliant with NIST standards. PUFrt's architecture is fortified with secure storage capabilities that protect key information from potential physical attacks, providing a robust security layer against future threats in the IoT landscape. Its design allows seamless integration across different systems and design architectures, making it versatile for applications ranging from lightweight hardware security keys to full-fledged Security Coprocessors. With built-in anti-tamper features and customization options, PUFrt is a prime choice for those looking to secure their semiconductor supply chain against threats like counterfeiting and reverse engineering. Certified by Riscure, PUFrt sets a high benchmark for reliable security practices in semiconductor design. Its comprehensive security framework makes it indispensable for modern chip designs that necessitate high levels of trust and integrity.
Highly-optimized PQC implementations, capable of running PQC in < 15kb RAM PQCryptoLib-Emebedded is a versatile, CAVP-compliant version of PQCryptoLib, PQShield’s CMVP-certified library of post-quantum cryptographic algorithms. With its design focused on ultra-small area efficiency, PQCryptoLib-Embedded has been specifically designed for embedded systems, microcontrollers and memory-constrained devices. It could be the first step towards a hardware solution for providing PQC integration to devices already in the field.
FIPS 140-3 CMVP compliant, CAVP PQC cryptographic library designed for PQ/T Hybrid PQCryptoLib is a general-purpose FIPS 140-3 CMVP and CAVP-certified cryptographic library. It’s been designed for a wide variety of applications and provides the latest NIST-standardized post-quantum and classical algorithms in a software environment. With a configurable, secure, and easy-to-use API, PQCryptoLib is optimized for crypto-agility, particularly when it comes to FIPS-compliant hybrid PQ/T solutions, and with crypto-agility in mind, it’s built to protect against the threat of ‘harvest-now-decrypt-later’ attacks. The aim of PQCryptoLib is to help organizations transition smoothly and securely to quantum resistance in a manageable, easy-to-integrate solution.
AndeSoft SW Stack encompasses a comprehensive set of software building blocks and middleware optimized for AndesCore processors. This rich collection includes operating systems, libraries, drivers, and middleware components, all meticulously designed to enhance software development speed and quality. By providing ready-to-use components, AndeSoft enables developers to focus on crafting their application-specific solutions, significantly reducing time-to-market. Its seamless integration with AndeSight IDE further enhances development efficiency, supporting diverse operating systems and being adaptable to various processor configurations for optimal performance.
The Securyzr Key Management System is pivotal in safeguarding cryptographic keys within various systems. By facilitating key lifecycle management, this system ensures that keys remain secure from creation through destruction. It offers an intuitive interface for administrators to oversee and manage keys across their network, providing peace of mind with enhanced access controls and auditing capabilities.
Helion Technology delivers efficient hashing solutions through their SHA family of products, including SHA-1 and the more secure SHA-2 family, as well as MD5 for legacy purposes. These hashing cores are implemented to transform arbitrary-length files or messages into unique, fixed-length digests, which act as veritable signatures of the original data. These secure hash algorithms (SHAs) are integral to digital signatures and message authentication applications, underpinning protocols like IPsec and TLS/SSL by ensuring integrity and authenticity. With configurations optimized for high-speed and low-area applications, Helion's hashing solutions prove effective in systems needing cryptographic checks. The cores are partitioned into the FAST and TINY controls, each catering to different throughput and resource trade-offs. FAST delivers performance up to 4Gbps, focusing on speed, while TINY configurations are geared towards minimal resource utilization, providing an ideal solution for energy-efficient, low-data rate needs in both FPGA and ASIC technologies.
Post-quantum Software Development Kit Provides easy-to-use software implementations of both post-quantum and classical cryptographic primitives. It’s designed with prototyping and experimentation in mind, consisting of an integration of PQShield’s PQCryptoLib library with two popular high-level cryptography libraries: OpenSSL and mbedTLS. OpenSSL: a widely-adopted secure-communication library mbedTLS: primarily intended for use in embedded system and IoT deployments
The Individual IP Core Modules offered by ResQuant are designed to support a wide array of post-quantum cryptography needs, featuring compatibility with all recognized NIST PQC standards. These include pioneering algorithms such as Dilithium, Kyber, XMSS, and SPHINCS+, guaranteeing breadth in cryptographic applications. These modules offer comprehensive cryptographic functions like advanced encryption standards using AES, hashing with SHA2 and SHA3 families, and generation of true random numbers, posing as a versatile security solution adaptable to a variety of environments. Scheduled for future updates with additional protocols like the FRODO Key Encapsulation Mechanism, these IP cores promise continuous alignment with evolving cryptographic needs. Their structure accommodates substantial flexibility in terms of performance tuning and system integration, enabling easy deployment in diverse application scenarios, from IoT devices to large-scale data centers, making them a staple for entities preparing for quantum computing advancements. These modules ensure security frontiers remain resilient against future computational intricacies.
The PUFcc is an advanced Crypto Coprocessor that amalgamates high-level cryptographic capabilities with a robust Hardware Root of Trust foundation. This IP module is thoroughly equipped with a full suite of cryptographic algorithms certified by NIST CAVP and compliant with OSCCA standards, tailored to fulfill complex and diverse IoT security needs. The coprocessor enhances security measures across multiple layers by integrating seamless key management and secure boot functionalities within its core operations, thus expanding security boundaries to external flash and other system components. Designed for ease of integration, PUFcc simplifies the process with built-in interfaces for swift memory access and data processing, bolstering system architecture with programmable flexibility to adopt evolving security protocols.
The Cryptographic Core offers a comprehensive suite of classical cryptographic solutions. This product leverages well-established algorithms like AES for symmetric encryption and ECC for asymmetric encryption. Its design caters to both high and low-end applications, ensuring compatibility across various devices. This core is crucial for maintaining confidentiality and integrity in systems where traditional cryptography still reigns supreme. With the increasing vulnerability posed by advancing technology, including potential quantum threats, this Cryptographic Core provides secure encryption and decryption processes. Utilizing advanced algorithms such as RSA and variants of elliptic curve cryptography (ECC), it supports the secure exchange of information. Despite looming quantum computing challenges, many elements of classical cryptography remain effective and secure. The Cryptographic Core stands as a reliable option while industries transition towards more robust quantum-safe systems. It offers flexibility and adaptability, accommodating specific security needs through customization and configuration for various performance levels.
The Customizable Cryptography Accelerator by ResQuant is designed to cater to diverse client needs, offering a broad range of configurable options. It integrates seamlessly with the complete set of NIST post-quantum cryptography standards, including algorithms like Dilithium, Kyber, and XMSS. This flexibility extends further by allowing customers to incorporate their own algorithms. This cryptography accelerator is straightforward to tailor in terms of performance and size, helping cater to varied application requirements. Its design incorporates defenses against various side-channel attacks, although some features like resistance to Differential Power Analysis (DPA), timing attacks, and Simple Power Analysis (SCA) are in development. The adaptability of the accelerator is enhanced with AXI 4 compatibility, ensuring it can be easily integrated into complex system-on-chip designs. Customers can expect a future-proof, versatile cryptographic solution that addresses both existing and emerging cybersecurity challenges. This product represents a significant advancement for organizations transitioning to quantum-safe security solutions.
Suite-Q SW consists of a versatile cryptographic software library designed for optimizing code size, stack usage, and performance across various embedded processors and microcontrollers. Available in portable C code and high-speed assembly, Suite-Q SW can be tailored to fit the specific needs of diverse development environments. This library provides extensive support for symmetric and asymmetric cryptographic functions, catering to systems ranging from high-end processors to memory-constrained embedded devices. By facilitating efficient cryptographic computations, Suite-Q SW ensures minimal impact on system performance while maximizing data security. Its adaptability is marked by simple integration modules that work seamlessly with hardware accelerators, enabling enhanced cryptography for both standard and custom specifications. This reliability makes Suite-Q SW an indispensable tool for ensuring secure communication channels while maintaining an optimal balance between speed and resource utilization.
The SHA-3 Crypto Engine is a hardware accelerator designed for cryptographic hashing functions, featuring high throughput and area efficiency. Compliant with NIST's FIPS 202 standard, it supports the full suite of SHA-3 hash functions, including SHA-3-224, SHA-3-256, SHA-3-384, and SHA-3-512. The engine also handles extendable output functions (XOF) like SHAKE-128 and SHAKE-256. Designed for security-critical applications, it offers full protection against timing-based side-channel attacks and operates within a single clock domain. This IP core is ideal for tasks requiring data integrity and secure authentication, such as blockchain, IPsec, and e-commerce. The SHA-3 IP core excels in various applications, from cryptographic hashing for Message Authentication Codes (MAC) and secure boot engines to encrypted data storage solutions and financial transaction systems. Its synchronous design and extensive verification make it highly reliable for maintaining data integrity across diverse protocols including TLS/SSL. Designed to integrate seamlessly into any FPGA or ASIC, it ensures maximal security and performance. Noteworthy features include automatic byte padding and an AMBA AXI4-Stream interface, facilitating easy implementation. With its proven resource efficiency, it serves a multitude of industries seeking robust cryptographic solutions. The SHA-3 engine is versatile enough for numerous security applications, maintaining performance efficiency even under demanding conditions.
The Keccak Hash Engine IP Core serves as a flexible and versatile cryptographic function suitable for a variety of applications beyond hashing, including encryption, authentication, and pseudo-random number generation (PRNG). The core uses the innovative sponge construction, particularly the Keccak-f cryptographic permutation, providing excellent security and adaptability. Standardized by NIST and utilized in 3GPP TS 35.231 for mobile telephony, Keccak is adaptable to different output lengths and security levels, making it ideal for diverse industrial applications like blockchain and secure communications. Its design simplifies integration and coding practices, featuring a single clock domain for seamless deployment. The IP core ensures flexibility and robust security, allowing easy configuration to meet specific security requirements. It is extensively verified for secure use in various protocols, offering consistent and reliable performance in maintaining data integrity and encryption tasks.
The KiviPQC-KEM is a cutting-edge cryptographic IP Core tailored for post-quantum security requirements, offering robustness against quantum attacks. It supports ML-KEM Key Encapsulation, enabling secure key exchanges over public channels, fully compliant with NIST's FIPS 203 standards. This IP Core provides essential hardware acceleration for ML-KEM operations, optimizing key generation, encapsulation, and decapsulation processes. Designed to ensure minimal logical footprint, it operates with high efficiency and flexibility, integrating seamlessly into existing ASIC and FPGA systems without compromising performance. KiviPQC-KEM's features make it indispensable for developing quantum-resistant networks, enhancing public key infrastructures, and securing electronic transactions. The core is particularly noted for its cost-efficiency and resource optimization, presenting a versatile solution for future-proofing embedded systems against evolving cryptographic threats.
The Hardware Security Module offers a dedicated solution for implementing critical cryptographic tasks, including secure key management and data encryption in space applications. Designed as an IP core, it ensures that systems can maintain data integrity and secure communications through robust cryptographic processing. Its architecture is optimized for flexibility and reliability, addressing the stringent security requirements of space missions and related terrestrial applications.
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