All IPs > Security IP > Cryptography Cores
In today's interconnected world, the importance of secure communication and data protection cannot be overstated. Cryptography cores are a crucial subset of semiconductor IPs designed to provide foundational security solutions across a variety of electronic systems. At their core, these IPs implement complex algorithms that ensure the confidentiality, integrity, and authenticity of data being processed and exchanged.
The cryptography cores available in this category offer a diverse range of features tailored to different security needs. From symmetric-key algorithms like AES to asymmetric-key systems such as RSA and ECC, these cores ensure that systems can securely encrypt and decrypt information, protecting it from unauthorized access and tampering. By embedding these cryptographic functions directly into hardware, it becomes possible to achieve faster processing speeds and higher levels of security compared to software implementations.
These semiconductor IPs are widely used in applications where data security is paramount. This includes, but is not limited to, industries such as finance, telecommunications, and healthcare. Devices utilizing cryptography cores can range from secure payment systems, ensuring safe financial transactions, to mobile devices for secure communications, to medical devices that safeguard sensitive health information. Additionally, with the rise of the Internet of Things (IoT), cryptography cores are increasingly crucial in providing secure connections for a myriad of smart devices.
By integrating cryptography cores into your designs, you not only improve security but also future-proof your products against many potential vulnerabilities. As security threats continue to evolve, having robust cryptography solutions is essential for maintaining trust and reliability in your products and services. Whether you're developing a new application or enhancing an existing one, our category of cryptography cores offers the semiconductor IP solutions you need to meet today's stringent security demands.
Overview: Cybersecurity IPs offer a range of essential security features to protect your digital assets and sensitive information. From True Random Number Generators (TRNG) to advanced encryption algorithms like AES, DES, 3DES, and cryptographic hash functions like SHA, as well as RSA for secure key exchange and digital signatures, the IPs provide a comprehensive suite of tools to safeguard your data. Key Features: True Random Number Generator (TRNG): Generates unpredictable and unbiased random numbers for cryptographic applications. Advanced Encryption Standard (AES): Provides robust encryption with symmetric key algorithms for securing data. Data Encryption Standard (DES) and Triple DES (3DES): Implement legacy encryption algorithms for data protection. Hash Functions: Includes secure cryptographic hash functions like SHA (Secure Hash Algorithm) for data integrity verification. RSA: Enables secure key exchange, encryption, and digital signatures for secure communication. These cybersecurity IPs are designed to meet the stringent security requirements of modern applications, ensuring the confidentiality, integrity, and authenticity of your data.
Akida IP represents BrainChip's groundbreaking approach to neuromorphic AI processing. Inspired by the efficiencies of cognitive processing found in the human brain, Akida IP delivers real-time AI processing capabilities directly at the edge. Unlike traditional data-intensive architectures, it operates with significantly reduced power consumption. Akida IP's design supports multiple data formats and integrates seamlessly with other hardware platforms, making it flexible for a wide range of AI applications. Uniquely, it employs sparsity, focusing computation only on pertinent data, thereby minimizing unnecessary processing and conserving power. The ability to operate independently of cloud-driven data processes not only conserves energy but enhances data privacy and security by ensuring that sensitive data remains on the device. Additionally, Akida IP’s temporal event-based neural networks excel in tracking event patterns over time, providing invaluable benefits in sectors like autonomous vehicles where rapid decision-making is critical. Akida IP's remarkable integration capacity and its scalability from small, embedded systems to larger computing infrastructures make it a versatile choice for developers aiming to incorporate smart AI capabilities into various devices.
The aiWare hardware neural processing unit (NPU) stands out as a state-of-the-art solution for automotive AI applications, bringing unmatched efficiency and performance. Designed specifically for inference tasks associated with automated driving systems, aiWare supports a wide array of AI workloads including CNNs, LSTMs, and RNNs, ensuring optimal operation across numerous applications.\n\naiWare is engineered to achieve industry-leading efficiency rates, boasting up to 98% efficiency on automotive neural networks. It operates across various performance requirements, from cost-sensitive L2 regulatory applications to advanced multi-sensor L3+ systems. The hardware platform is production-proven, already implemented in several products like Nextchip's APACHE series and enjoys strong industry partnerships.\n\nA key feature of aiWare is its scalability, capable of delivering up to 1024 TOPS with its multi-core architecture, and maintaining high efficiency in diverse AI tasks. The design allows for straightforward integration, facilitating early-stage performance evaluations and certifications with its deterministic operations and minimal host CPU intervention.\n\nA dedicated SDK, aiWare Studio, furthers the potential of the NPU by providing a suite of tools focused on neural network optimization, supporting developers in tuning their AI models with fine precision. Optimized for automotive-grade applications, aiWare's technology ensures seamless integration into systems requiring AEC-Q100 Grade 2 compliance, significantly enhancing the capabilities of automated driving applications from L2 through L4.
The SiFive Intelligence X280 processor targets applications in machine learning and artificial intelligence, offering a high-performance, scalable architecture for emerging data workloads. As part of the Intelligence family, the X280 prioritizes a software-first methodology in processor design, addressing future ML and AI deployment needs, especially at the edge. This makes it particularly useful for scenarios requiring high computational power close to the data source. Central to its capabilities are scalable vector and matrix compute engines that can adapt to evolving workloads, thus future-proofing investments in AI infrastructure. With high-bandwidth bus interfaces and support for custom engine control, the X280 ensures seamless integration with varied system architectures, enhancing operational efficiency and throughput. By focusing on versatility and scalability, the X280 allows developers to deploy high-performance solutions without the typical constraints of more traditional platforms. It supports wide-ranging AI applications, from edge computing in IoT to advanced machine learning tasks, underpinning its role in modern and future-ready computing solutions.
The Polar ID system by Metalenz revolutionizes biometric security through its unique use of meta-optic technology. It captures the polarization signature of a human face, delivering a new level of security that can detect sophisticated 3D masks. Unlike traditional structured light technologies, which rely on complex dot-pattern projectors, Polar ID simplifies the module through a single, low-profile polarization camera that operates in near-infrared, ensuring functionality across varied lighting conditions and environments. Polar ID offers ultra-secure facial authentication capable of operating in both daylight and darkness, accommodating obstacles such as sunglasses and masks. This capability makes it particularly effective for smartphones and other consumer electronics, providing a more reliable and secure alternative to existing fingerprint and visual recognition technologies. By integrating smoothly into the most challenging smartphone designs, Polar ID minimizes the typical hardware footprint, making advanced biometric security accessible at a lower cost. This one-of-a-kind technology not only enhances digital security but also provides seamless user experiences by negating the need for multiple optical components. Its high resolution and accuracy ensure that performance is not compromised, safeguarding user authentication in real-time, even in adverse conditions. By advancing face unlock solutions, Polar ID stands as a future-ready answer to the rising demand for unobtrusive digital security in mainstream devices.
PUFrt stands as a flagship hardware root of trust solution, incorporating PUF technology to create a unique and unclonable UID directly on the chip. This ensures robust security from the ground up, offering features such as TRNG, secure OTP, and an attack-resistant shell. The architecture of PUFrt provides a resilient foundation for semiconductor devices, helping to mitigate reverse engineering and counterfeiting risks. It integrates seamlessly with various systems, offering a trusted base for lightweight hardware security keys and full-function security coprocessors.
Designed for secure disk encryption, Helion's AES-XTS cores leverage the robust AES-XTS algorithm, providing superior security at the sector level. By utilizing tweakable block ciphers, these cores enhance security against threats such as copy-and-paste attacks, while allowing for concurrent processing to boost performance. The AES-XTS core supports data rates exceeding 64Gbps, making it suitable for high-performance storage applications including disk encryption for enterprise servers. It can be configured to operate with dual keys (128-bit and 256-bit) and optionally support features like Ciphertext Stealing, ensuring versatility and robustness in varying storage environments. With specific designs targeting FPGAs and ASICs, Helion's AES-XTS solutions are optimized for the highest efficiency, minimizing logic area usage. These cores are crucial for organizations requiring reliable data encryption for storage media, such as hard drives and solid-state drives, where data protection is paramount.
Up to 1M KeyEnc/sec with improved power efficiency PQPerform-Lattice is a powerful hardware-based product designed for high throughput, high-performance, and high speed. It adds post-quantum cryptography for applications that typically handle a large number of transactions, such as high-capacity network hardware applications and secure key management HSMs. Optimizable for secure boot, as well as other use-cases, PQPerform-Lattice supports FIPS 204 ML-DSA for quantum-secure digital signature verification, as well as FIPS 203 ML-KEM for quantum key exchange. PQPerform-Lattice supports AXI4, PCIe, and is deployable in multiple instances, making it a powerful solution for existing systems and infrastructure requirements.
Algo-Logic's FPGA Pre-Trade Risk Check is tailored for financial entities needing to assess risk in real-time before trade execution. This product implements risk assessment algorithms on FPGAs, enabling checks to be performed at the speeds necessary to keep pace with high-frequency trading. The integration on FPGA hardware ensures that pre-trade risk checks do not become bottlenecks and contribute to maintaining compliance with regulations while minimizing the latency typically associated with software-based checks.
The eSi-Crypto suite provides a comprehensive range of encryption and authentication functionalities catered for integration in both ASIC and FPGA targets. Designed with efficiency in mind, it offers low resource usage coupled with high throughput. This suite incorporates a high-grade True Random Number Generator (TRNG) compliant with NIST 800-22 standards. Available with standalone or AMBA APB/AHB/AXI bus interfaces, it supports a wide range of cryptographic algorithms such as CRYSTALS Kyber, Dilithium, ECDSA, RSA, AES, and SHA, providing robust security solutions adaptable to varying application needs.
The RISC-V Hardware-Assisted Verification by Bluespec is a high-performance platform designed for swift and precise verification of RISC-V cores. It supports testing at both the core level (ISA) and system level, accommodating RTOS and Linux-based environments. This solution can verify standard ISA extensions, custom ISA extensions, and integrated accelerators, making it a versatile tool for various verification needs. One of the standout features of this platform is its scalability and accessibility via the AWS cloud, which ensures that resources can be tapped into as needed, enabling efficient verification anytime, anywhere. Such scalability is crucial for teams that require the flexibility to test various designs without being confined to local server limitations. With an emphasis on broad compatibility, the RISC-V Hardware-Assisted Verification platform is ideal for those involved in developing RISC-V based systems. It assists developers in ensuring their designs are accurate and reliable before deployment, reducing errors and speeding up time-to-market.
Trilinear Technologies' HDCP Encryption-Decryption Engine is a sophisticated solution designed to safeguard digital content as it traverses various transmission channels. This engine is compliant with the HDCP standards 1.4 and 2.3, offering robust protection mechanisms to ensure that digital media investments are secure from unauthorized access and piracy. The engine’s hardware acceleration capabilities represent a crucial advantage, significantly reducing the load on the system processor while maintaining real-time encryption and decryption functions. This not only enhances performance but also extends the operational life of the hardware involved, making it suitable for high-demand media applications across sectors such as broadcast, entertainment, and corporate environments. Trilinear’s HDCP Encryption-Decryption Engine ensures compatibility with a wide array of consumer and professional-grade video equipment, providing seamless protection without interference in media quality or transmission speed. Its flexible integration options allow it to be smoothly incorporated into existing infrastructures, whether in standalone media devices or complex SoC architectures. Supported by comprehensive software resources, the HDCP Encryption-Decryption Engine provides an all-encompassing solution that includes necessary software stacks for managing device authentication and link maintenance. Its ability to safeguard high-definition content effectively makes it an invaluable asset for entities focused on secure content delivery and rights management.
Helion's SHA Hashing cores are robust solutions for cryptographic integrity verification, supporting SHA-1, SHA-2, and MD5 algorithms. Designed for creating a secure, fixed-length hash from input data, these cores are pivotal in digital signatures and data integrity protocols. SHA Hashing from Helion is renowned for its high-speed performance, offering both FAST and TINY modes. These cores ensure that any alteration in the input data results in a different hash, making them indispensable for data integrity and security measures across various applications. The flexibility of Helion’s SHA Hashing solutions makes them suitable for diverse technological environments, whether in FPGAs or ASICs. The integrity assurance provided by these cores is crucial in fields such as secure communications and data verification, supporting protocols like SSL/TLS and IPsec.
Post-quantum Software Development Kit Provides easy-to-use software implementations of both post-quantum and classical cryptographic primitives. It’s designed with prototyping and experimentation in mind, consisting of an integration of PQShield’s PQCryptoLib library with two popular high-level cryptography libraries: OpenSSL and mbedTLS. OpenSSL: a widely-adopted secure-communication library mbedTLS: primarily intended for use in embedded system and IoT deployments
FIPS 140-3 CAVP-compliant, compact lattice-based hardware PQC engine PQPlatform-Lattice is a compact FIPS 140-3 CAVP-compliant, PQC engine that adds post-quantum support for hardware components and embedded devices, using lattice-based cryptographic algorithms such as ML-KEM (FIPS 203) for post-quantum key exchange, and ML-DSA (FIPS 204) – post-quantum digital signature verification. It provides secure acceleration of lattice-based PQC alongside support for traditional cryptography. Its use cases include strong user authentication, protecting hardware keys, and small-footprint, configurable side-channel protection. PQPlatform-Lattice is designed for minimal area as well as maximum compatibility and can be deployed with optional firmware-backed side-channel countermeasures. It is covered by multiple PQShield implementation patents.
AES-GCM cores by Helion stand as a high-performance solution, offering both encryption and authentication within a single, efficient framework. The Galois Counter Mode (GCM) is particularly well-suited for high-speed applications due to its pipeline compatibility and parallel processing capabilities. This makes it ideal for modern networking protocols demanding swift data processing and high security. Helion AES-GCM supports data rates ranging from below 50Mbps to over 40Gbps, ensuring they cater to both low and high bandwidth requirements. Its adaptability across different FPGA and ASIC technologies guarantees optimized performance tailored to client-specific needs, with options for ultra-compact implementations when space and power are of concern. This core is heavily utilized in data transmission where data integrity and privacy must be maintained without the typical throughput sacrifices inherent to traditional encryption methods. Its deployment in MACsec, IPsec, and other security protocols underscore its integral role in maintaining data security across various sectors.
The Cyclone V FPGA with Integrated PQC Processor by ResQuant is a specialized product that comes pre-equipped with a comprehensive NIST PQC cryptography suite. This FPGA is tailored for applications requiring a robust proof-of-concept for quantum-safe implementations. It ensures seamless integration into existing systems, providing a practical platform for testing and deployment in quantum-secure environments. This product is available at a competitive price and represents an ideal starting point for entities looking to explore and adopt quantum-resilient technologies. Its configuration allows for straightforward implementation in diverse hardware infrastructures while offering a reliable option for organizations aiming to stay ahead in the evolving cyber security landscape. By incorporating the latest in cryptographic standards and ensuring vendor independence, the Cyclone V FPGA with Integrated PQC Processor by ResQuant effectively bridges current hardware technologies and future-proof security needs. It supports industry-wide applications, from IoT and ICT to automotive and military sectors, underscoring ResQuant's versatility in hardware security solutions.
The RISC-V CPU IP NS Class is specifically engineered for security-focused applications, including fintech mobile payments and IoT security. This architecture supports a variety of security protocols, making it ideal for systems that require robust data protection and secure transaction handling. It features a background in efficiently managing sensitive information, supporting comprehensive information security solutions with strong cryptographic capabilities. This IP is built with RISC-V's flexible extensions, ensuring files and communication streams maintain confidentiality and integrity in diverse operational scenarios. Robust by design, the NS Class caters to sectors such as IoT, where data protection is paramount, making it a trusted choice for developers seeking to enforce stringent security measures into their solutions. With options for extending functionality and increasing resilience through user-defined instructions, the NS Class remains adaptable for future security requirements.
The Individual IP Core Modules by ResQuant are comprehensive components engineered to support diverse post-quantum cryptographic standards, including Dilithium, Kyber, XMSS, SPHINCS+, AES, and the SHA-2 family. These modules offer organizations the flexibility to select specific cryptographic functionalities tailored to their security needs, without the necessity of entire systems or hardware changes. Each module is designed to integrate easily into existing infrastructure, ensuring minimal disruption while enhancing security measures against potential future quantum threats. This approach allows industries to gradually implement PQC standards, ensuring a seamless transition to quantum-resistant cryptographic measures. Tailored for flexibility, the ResQuant Individual IP Core Modules can be used across a wide array of applications, from IoT devices to complex military and IT systems. By offering component-level integration, these modules empower companies to future-proof their offerings incrementally while maintaining robust security practices in their operations.
QUIC Protocol Core is engineered to handle high-speed data transmission efficiently, making it suitable for environments prone to network congestion and packet loss. By eschewing traditional TCP/IP methods, this core delivers up to 400 times the performance improvement, ensuring data transfers are both secure and swift. The core is particularly adept in FPGA environments, offering low memory footprint and high data processing capabilities. It provides the essential high-level security via integrated TLS 1.3, supporting robust encryption throughout its operation.
FIPS 140-3 CAVP-compliant, compact PQC hardware acceleration for subsystems PQPlatform-CoPro combines hash-based and lattice-based post-quantum cryptography that can be added to an existing security subsystem. It can be optimized for minimum area, maintaining high-performance, and is designed to be run by an existing CPU using PQShield-supplied firmware, meaning it involves low integration effort and flexible configurations to support a wide variety of use cases, including quantum-safe secure boot. Solutions are available for hardware acceleration of SHA-3, SHAKE, ML-KEM, ML-DSA, alongside traditional cryptography. In addition, PQPlatform-CoPro can be configured with side-channel protection. PQPlatform-CoPro is covered by multiple PQShield implementation patents.
DolphinWare IPs is a versatile portfolio of intellectual property solutions that enable efficient SoC design. This collection includes various control logic components such as FIFO, arbiter, and arithmetic components like math operators and converters. In addition, the logic components span counters, registers, and multiplexers, providing essential functionalities for diverse industrial applications. The IPs in this lineup are meticulously designed to ensure data integrity, supported by robust verification IPs for AXI4, APB, SD4.0, and more. This comprehensive suite meets the stringent demands of modern electronic designs, facilitating seamless integration into existing design paradigms. Beyond their broad functionality, DolphinWare’s offerings are fundamental to applications requiring specific control logic and data integrity solutions, making them indispensable for enterprises looking to modernize or expand their product offerings while ensuring compliance with industry standards.
Helion offers comprehensive AES encryption cores, a staple in data security due to its robustness and efficiency. These cores support the AES standard, chosen by NIST for its advanced security features. AES operates as a block cipher with three key size options (128, 192, 256 bits), allowing flexibility in security levels. Ideal for commercial applications, AES ensures data integrity and confidentiality, vital for secure communications and data storage. Helion's AES solutions are distinguished by their scalability and adaptability, making them suitable for various technological implementations. Whether for ASICs or FPGAs, these cores are designed to maximize performance without compromising core area efficiency. With a focus on low power consumption and high data throughput, Helion's AES cores are versatile tools for secure encryption tasks. Moreover, Helion's AES IPs incorporate several modes, including CBC, CFB, OFB, and CTR, to further enhance security for numerous applications ranging from wireless communications to disk encryption. With a commitment to excellence, Helion maintains its standing as a leader in encryption core technology, continually advancing their offerings to meet evolving security demands.
The FPGA Lock Core is an innovative FPGA solution designed to secure FPGAs and hardware against unauthorized access and counterfeiting, leveraging a Microchip ATSHA204A crypto authentication IC. It reads a unique ID, generates a 256-bit challenge, and uses secure hashing to verify the hardware's authenticity, ensuring hardware integrity in sensitive applications like military and medical fields. This solution allows hardware protection against IP theft by enforcing authentication and disables FPGA functionality if unauthorized access is detected. The core utilizes minimal logic resources and one FPGA pin, communicating through a bidirectional open drain link. The clarity of this system is enhanced by providing the core in VHDL, allowing users to thoroughly understand its functionality, supported by example designs on Cyclone10 and Artix 7 boards, catering to both Intel and Xilinx FPGA platforms. Complementing this security measure is the Key Writer Core, which allows programming of custom secret keys into the ATSHA204A in situ on assembled boards, ensuring a seamless integration with the FPGA Lock system. Available for various FPGA platforms, the Efinix version, distributed with TRS Star, expands its applicability, with webinars and user guides offering in-depth implementation insights.
Designed for seamless integration of the V-by-One HS interface with FPGA development platforms, the Alcora V-by-One HS Daughter Card supports high-speed video data transmission. This card can interface with FPGA boards using 8 RX and 8 TX lanes, allowing for extensive bandwidth utilization. The Alcora card is distinguished by its two available versions, differing by their header pin count: 51-pin and 41-pin. Optimized for high-definition video transmission, it supports resolutions of 4K at 120Hz or 8K at 30Hz by combining two daughter cards for enhanced lane capacity. To maintain signal integrity, Alcora incorporates two clock generators to manage transceiver reference clock synthesis and reduce recovered RX clock jitter. As a high-speed digital video interface solution, it is tailored particularly for display applications that demand rigorous performance and reliability standards.
Suite-Q SW stands as a versatile cryptographic software library offered by PQ Secure that is meticulously engineered to optimize code size, stack usage, and performance across various processing environments. This library is built to be portable, with implementations available in C and assembly languages, catering to a wide array of processor architectures including 8-, 16-, 32-, and 64-bit systems. The software library is designed to seamlessly integrate into diverse development environments, providing developers with modular plug-in modules that facilitate easy hardware offload. Suite-Q SW supports a comprehensive spectrum of cryptographic operations, including both symmetric encryption such as AES and advanced post-quantum schemes, ensuring robust data protection. As part of its feature set, Suite-Q SW offers multiple configurations, allowing developers to balance memory utilization and processing speed according to their specific application needs. This flexibility makes the library suitable for both general-purpose applications and highly specialized embedded systems, ensuring it meets the stringent requirements of modern security demands.
Fully autonomous, FIPS 140-3 CAVP compliant PQC subsystem PQPlatform-SubSys is a cryptographic subsystem, designed to provide offloaded cryptographic services with minimal integration effort and full autonomy from an existing security subsystem, as well as configurable side-channel protection. These services include post-quantum signature generation, verification, and secure key establishment. It’s built with optimal performance in mind, as well as crypto agility with its provision of traditional, PQ/T hybrid and fully post-quantum algorithms. PQPlatform-SubSys uses its built-in RISC-V CPU independently from the surrounding system, allowing cryptographic services to be offloaded efficiently from the system processor.
Featuring G15, this IP is optimized for 2KB correction blocks, suitable for NAND devices with larger page sizes, such as 8KB. The design is aligned with methods seen in the G14X, but it extends its reach with longer codewords for comprehensive coverage of high-density NAND. The design supports a wide array of block sizes and configurational setups, making it highly adaptable to varying design needs. Additional error correction capabilities can be integrated based on client requirements, reinforcing its bespoke delivery.
The QDID PUF uses quantum tunneling via variations in the oxide layer of a CMOS process, creating a unique identity for devices. It eliminates the complexities and costs of traditional secure provisioning by generating high entropy keys on-demand from intrinsic quantum phenomena. This hardware-anchored identity solution excels in resisting side-channel attacks and offers compliance with standards like PSA Level 2 and CC EAL4+. Extensive environmental testing ensures durability, making it ideal for applications including secure key generation and device authentication.
Focused on automotive applications and certified for ISO 26262 Functional Safety, the RISC-V CPU IP NA Class is a specialized offering for high-stakes environments such as vehicular systems. Its design is tailored to meet the rigorous safety standards required in the automotive industry, supporting ASIL-B and ASIL-D safety levels. The NA Class IP combines robust functionality with advanced safety measures, providing a reliable solution for implementing safety-critical tasks in next-generation automotive designs. With scalability at its core, it supports advanced RISC-V extensions and user-defined instruction sets, ensuring the adaptability of the IP to meet evolving industry standards and custom specifications. Through its comprehensive support of safety and performance features, the NA Class stands as a reliable building block for developers focusing on creating secure, high-performance automotive systems. Its cutting-edge design ensures it can handle the sophisticated demands of modern vehicles, from engine management to advanced driver-assistance systems (ADAS).
AndeSoft SW Stack encompasses a comprehensive set of software building blocks and middleware optimized for AndesCore processors. This rich collection includes operating systems, libraries, drivers, and middleware components, all meticulously designed to enhance software development speed and quality. By providing ready-to-use components, AndeSoft enables developers to focus on crafting their application-specific solutions, significantly reducing time-to-market. Its seamless integration with AndeSight IDE further enhances development efficiency, supporting diverse operating systems and being adaptable to various processor configurations for optimal performance.
The RISC-V CPU IP NI Class is crafted for applications in artificial intelligence, advanced driver-assistance systems (ADAS), and high-speed communications. Its architecture is designed to manage intensive computational tasks with efficiency, catering to sectors that focus on smart functionalities and connectivity. The NI Class's advanced features include support for parallel processing and enhanced data management, making it ideal for integrating into complex systems where performance and reliability are critical. It supports numerous RISC-V extensions, allowing it to be tailored to the demands of fast-evolving technological needs. Its flexibility and robust design lend themselves to a multitude of innovative uses, from facilitating cutting-edge machine learning applications to enabling high-speed data transmission. An essential choice for innovators looking to leverage AI and communication technologies in their projects, the NI Class IP ensures scalability and adaptability well-suited to future developments.
The G13/G13X series is tailored for 512B correction blocks, particularly used in NAND setups with 2KB to 4KB page sizes. While both variants are crafted to manage the demands of SLC NAND transitions to finer geometries, the G13X allows for correction of a higher number of errors. Designed to fit seamlessly into existing controller architectures, it enables extensions of current hardware and software capabilities without extensive new investments. It offers area optimization through parameter adjustments and supports a range of channel configurations for broad applicability.
FIPS 140-3 CAVP compliant ultra-fast, compact, and power efficient secure hash acceleration PQPlatform-Hash is a power side-channel accelerator, supporting a wide range of Hash-Based Signature Schemes (HBSS). PQPlatform-Hash deploys tried-and-tested HBSS including quantum-safe LMS and XMSS (not hybrid). It provides acceleration of HBSS in embedded devices, especially where high throughput is required, or resource constraints necessitate minimal additional area. For example, PQPlatform-Hash is a solution for secure first-stage boot loading with hash-based signature schemes. HBSS offer different trade-offs of memory/area to lattice-based schemes, and as a result, PQPlatform-Hash is ideally suited for smaller key sizes, larger signature sizes, and processing times for key generation, signature generation and verification.
SEMIFIVE's AIoT Platform is engineered to drive the convergence of AI and the Internet of Things (IoT), facilitating smart, interconnected devices across various sectors. This platform is tailored for designing systems that require seamless integration of AI capabilities into IoT frameworks, offering a unique combination of flexibility and capability. Emphasizing energy efficiency and adaptability, the platform supports the development of edge-computing devices, smart home applications, robotics, and voice processing technologies. Featuring high-efficiency processors, it is designed to handle diverse data streams and perform real-time processing while maintaining low power consumption. Through its pre-integrated and verified components, the AIoT Platform simplifies the design process, allowing for rapid prototyping and deployment. SEMIFIVE empowers developers to create innovative solutions swiftly, adapting to the unique demands of IoT ecosystems and providing a robust foundation for future smart technologies.
The AES Encrypt/Decrypt IP provided by Secantec offers a highly secure solution for data encryption and decryption, supporting 128, 192, and 256-bit key lengths. Adhering to the Advanced Encryption Standard (AES), this IP ensures that data confidentiality is maintained across various platforms and applications. With its comprehensive encryption capability, this IP is pivotal in protecting sensitive data against unauthorized access, making it indispensable in secure communication systems, data storage solutions, and more. It provides a robust security framework that can be implemented efficiently within existing infrastructures. By leveraging the versatility of AES algorithms, the IP can be seamlessly integrated into a wide range of environments, from high-performance computing systems to portable devices requiring secure data channels. Its design ensures minimal latency and resource overhead, delivering a swift and reliable encryption mechanism.
Digital Systems and Security Solutions from VeriSyno Microelectronics deliver a suite of advanced digital IP and security technologies. These systems include security modules and perform functions crucial for protecting data integrity and privacy in integrated circuits. By leveraging digital IP technology, VeriSyno is capable of delivering high-efficiency solutions pertinent to secure communications and data handling within devices. These solutions feature advanced cryptographic capabilities and platform security technologies that safeguard not only the data but access points across a variety of implementations. Its offerings are indispensable for industries focusing on data-driven applications requiring assurance against breaches and unauthorized access. Further enhancements in digital processing are facilitated through these IPs, which include cutting-edge logic synthesis and process technologies tailored to meet rigorous security standards. They serve as essential components in digital transformation, reflecting VeriSyno’s commitment to advancing secure and efficient electronic systems.
The AES Core by Algotronix is a sophisticated solution tailored for securing data using advanced encryption methods. This core supports various encryption modes such as ECB, CBC, CTR, CFB, OFB, CCM, GCM, and XTS, which cater to a wide array of applications requiring different levels and methods of data protection. The flexibility in supported modes allows for tailored implementations in different security-critical environments. This encryption core is known for its deployment among prominent defense electronics organizations, and it has been operational within several NATO member states, testifying to its high-level security assurance and operational readiness in sensitive global contexts. Offered typically in source code form, the AES Core ensures that users can perform thorough security audits and tailor enhancements specific to their security policies and infrastructural needs. This capability positions Algotronix's offering as an optimal choice for organizations prioritizing stringent security postures.
The Customizable Cryptography Accelerator offered by ResQuant is designed to meet varied client needs with an extensive array of configurable options. It integrates seamlessly with all NIST PQC standards like Dilithium, Kyber, XMSS, and SPHINCS+, and is extendible with additional algorithms, including customer-specific implementations. The accelerator is built to be DPA, timing, and SCA resistant, and is AXI 4 ready, ensuring robust protection in a variety of applications. This innovation allows for customizable tuning in performance and size, addressing the specific security requirements of customers from various industries. The accelerator demonstrates ResQuant's commitment to flexibility and adaptability, enabling clients to implement cutting-edge encryption with ease. With ongoing enhancements to extend its capabilities, the accelerator stands as a critical component in defenses against future computational threats posed by quantum technologies. In addition to its technical capabilities, the ResQuant Customizable Cryptography Accelerator is engineered for efficient power use and minimized physical footprint, making it suitable for integration into a wide range of hardware setups. This solution underscores ResQuant's dedication to delivering high-security standards and unmatched versatility in cryptographic processing solutions.
Suite-Q HW is a comprehensive system-on-chip (SoC) design that encapsulates all necessary standardized cryptographic protocols required for secure communication. PQ Secure has engineered this hardware solution to cater to both high-end servers and low-end embedded systems, providing a flexible platform that adapts to various operational requirements. This product achieves performance efficiency by offloading symmetric and asymmetric cryptographic operations to specialized hardware accelerators, effectively reducing the computational burden on the central processor. Suite-Q HW supports a range of cryptographic functions, from Advanced Encryption Standard (AES) implementations to complex public-key cryptographic standards such as ECDSA and lattice-based cryptography. A prominent feature of Suite-Q HW is its capability to incorporate optional differential power analysis (DPA) countermeasures, which secure cryptographic operations against side-channel attacks. Furthermore, the design of Suite-Q HW facilitates ease of integration with various SoC and FPGA architectures, making it a highly adaptable solution for developers seeking to enhance their security infrastructure without substantial redesign efforts.
FortiCrypt is designed to address side-channel and fault injection vulnerabilities, providing strong protection for cryptographic implementations. Its architecture uses a combination of patented techniques to deliver robust security without impacting performance or power efficiency, making it suitable for both high-performance and power-sensitive applications.
The IPSEC Core by Algotronix is designed to secure IP communications by providing robust encryption and authentication mechanisms. Essential for ensuring data confidentiality and integrity over IP networks, this core is suitable for embedding into network devices and systems aimed at safeguarding data against potential interception or tampering. Catering to a broad range of IP-based communication systems, the IPSEC Core offers flexibility and reliability, making it a preferred choice for developers focusing on secure data exchange methods. The ease of integration allows for its deployment in both new and existing network architectures, underpinning secure transmissions across increasingly complex digital environments. Its wide acceptance and deployment in secure communications underscore the IPSEC Core's effectiveness in delivering critical security features, thus supporting enterprises in protecting sensitive data across diverse network topologies.
The HDCP 1.x/2.x IP Core from Bitec ensures secure transmission of high-definition multimedia content between devices. Designed to support both the HDCP 1.x and 2.x standards, it provides robust protection of digital audio and video content over HDMI and DisplayPort interfaces. This core is indispensable for manufacturers seeking to prevent unauthorized copying and redistribution of digital content as it moves through various media devices. HDCP (High-bandwidth Digital Content Protection) is crucial in maintaining the integrity and quality of digital content broadcast or streamed across different devices. By incorporating this IP core into their designs, clients can leverage seamless integration of content protection mechanisms, thus safeguarding intellectual property rights while ensuring compliance with industry standards. With capabilities that align with current and evolving digital content regulations, this IP core provides portable and flexible solutions that can easily be adapted for various media content distribution applications. The offering from Bitec allows for a scalable, cost-effective means to support high-definition secure content transmission across multiple devices and platforms.
NeoPUF is a cutting-edge hardware solution that revolutionizes semiconductor security through its advanced random number generation capabilities. It offers up to 100 times faster performance compared to traditional methods, positioning it as an essential component for the next generation of secure chips. The technology is rooted in the concept of Physical Unclonable Functions (PUFs), which inherently provide unique identifiers to each chip, ensuring unforgeable security features. NeoPUF offers a robust foundation for securing semiconductors throughout their lifecycle, addressing vulnerabilities in data at rest, in transit, and during processing. Its design leverages both analog and digital components to achieve unmatched security and reliability, creating a formidable 'drop-in' security module solution. With applications spanning a variety of industries, including automotive, IoT, and mobile computing, NeoPUF enables these sectors to enhance device integrity, combat counterfeiting, and secure sensitive information. The technology's integration into semiconductor design eliminates the need for costly and complex key management processes, thus streamlining the production and operation phases. Additionally, NeoPUF's adaptability to future computing demands, such as those posed by quantum advances, further cements its place as a versatile and forward-thinking security solution.
The FortiPKA-RISC-V is a unique public key accelerator that incorporates modular multiplication resistant to both side-channel and fault injection threats. It serves as an efficient coprocessor for RISC-V architectures, enabling secure and quick cryptographic operations while offering a streamlined performance across low-power device applications.
The MACSEC Core provides an essential building block for implementing Ethernet data security, supporting protocols crucial for protecting data at the MAC layer in network infrastructure. It ensures confidentiality and integrity of the communications, making it invaluable for environments where data transmission security is paramount. A vital tool for network security, the MACSEC Core integrates seamlessly into various network processors, offering robust security for both small-scale and extensive network architectures. It stands out for its efficiency in encrypting and authenticating Ethernet packets, ensuring data remains protected from eavesdropping and unauthorized access. Designed for versatile network applications, the MACSEC Core can easily adapt to existing network configurations, enabling quick deployment and teeming with existing systems, thereby enhancing overall network security without extensive reconfigurations.
The CANsec Controller Core offers a secure and robust solution for Controller Area Network (CAN) communications. Built with advanced security protocols, it ensures the protection of data within automotive systems. This core supports both traditional and new-generation CAN and CAN FD protocols, providing flexibility and enhanced functionality in vehicle networks. Designed to meet stringent automotive safety standards, the controller core integrates seamlessly with existing systems, adding an additional layer of security. Engineers can easily implement this solution to guard against malicious intrusions and data tampering, ensuring reliable communication paths in automotive environments. Its architecture supports high-speed data processing while maintaining low power usage, vital for modern applications that demand efficiency and reliability. Automotive developers will find this core an invaluable asset in creating secure, interconnected vehicle systems.
PUFcc is an all-encompassing Crypto Coprocessor that delivers key generation, storage, and complete crypto operations in one solution. It builds on the PUFrt's hardware root of trust, offering secure boot, OTA updates, TLS, and key management. Its comprehensive design includes NIST-certified cryptographic algorithms, customizable for a wide range of IoT applications. PUFcc simplifies SoC design with standardized control interfaces and secure memory access, enhancing system security effortlessly.
Ocean Logic's AES Encryption Core represents a robust and reliable solution for securing data across numerous platforms. Renowned for its certification and extensive validation in silicon on both FPGA and ASIC, this IP core has established credibility and trust among a diversified customer base. The AES core has seen nearly 60 successful implementations, underlining its reliability in providing robust data security. This encryption core complies with stringent security standards, ensuring data integrity and confidentiality. It is subject to Australia's Export Control regulations, qualifying it for international deployment across numerous key markets worldwide. Such widespread recognition indicates its versatility and adaptability to meet various encryption needs. For businesses and organizations prioritizing data security, Ocean Logic's AES Encryption Core offers a proven, high-performance solution. Its design facilitates seamless integration into existing systems, providing a comprehensive encryption capability while maintaining operational efficiency. The IP core stands as an ideal choice for companies looking to fortify their security measures with a trusted, efficient, and scalable encryption architecture.
PhantomBlu represents Blu Wireless's state-of-the-art mmWave technology tailored for military and defense use. This advanced solution supports tactical communication between vehicles, whether on land, sea, or air, by leveraging a stealthy mesh network capable of running applications and IP networking over an anti-jam resistant infrastructure. The PhantomBlu network offers flexibility and scalability to meet various operational demands within defense environments, from securing critical infrastructure to enabling convoy communications and integrating airborne systems. Its ability to provide high bandwidth in real-time ensures communication is reliable and secure, even in complex and hostile environments. With features like 10x data rates compared to Wi-Fi and 5G, reduced size, weight, and power requirements, and future-proof scalability, PhantomBlu is built for seamless integration with existing military systems. The solution further offers long-range communication up to 4km, incorporating advanced features like antenna beamforming for improved signal processing, making it a robust component for military networks.
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