All IPs > Platform Level IP > Processor Core Dependent
In the realm of semiconductor IP, the Processor Core Dependent category encompasses a variety of intellectual properties specifically designed to enhance and support processor cores. These IPs are tailored to work in harmony with core processors to optimize their performance, adding value by reducing time-to-market and improving efficiency in modern integrated circuits. This category is crucial for the customization and adaptation of processors to meet specific application needs, addressing both performance optimization and system complexity management.
Processor Core Dependent IPs are integral components, typically found in applications that require robust data processing capabilities such as smartphones, tablets, and high-performance computing systems. They can also be implemented in embedded systems for automotive, industrial, and IoT applications, where precision and reliability are paramount. By providing foundational building blocks that are pre-verified and configurable, these semiconductor IPs significantly simplify the integration process within larger digital systems, enabling a seamless enhancement of processor capabilities.
Products in this category may include cache controllers, memory management units, security hardware, and specialized processing units, all designed to complement and extend the functionality of processor cores. These solutions enable system architects to leverage existing processor designs while incorporating cutting-edge features and optimizations tailored to specific application demands. Such customizations can significantly boost the performance, energy efficiency, and functionality of end-user devices, translating into better user experiences and competitive advantages.
In essence, Processor Core Dependent semiconductor IPs represent a strategic approach to processor design, providing a toolkit for customization and optimization. By focusing on interdependencies within processing units, these IPs allow for the creation of specialized solutions that cater to the needs of various industries, ensuring the delivery of high-performance, reliable, and efficient computing solutions. As the demand for sophisticated digital systems continues to grow, the importance of these IPs in maintaining competitive edge cannot be overstated.
The CXL 3.1 Switch by Panmnesia is a high-performance solution facilitating flexible and scalable inter-device connectivity. Designed for data centers and HPC systems, this switch supports extensive device integration, including memory, CPUs, and accelerators, thanks to its advanced connectivity features. The switch's design allows for complex networking configurations, promoting efficient resource utilization while ensuring low-latency communication between connected devices. It stands as an essential component in disaggregated compute environments, driving down latency and operational costs.
Axelera AI has crafted a PCIe AI acceleration card, powered by their high-efficiency quad-core Metis AIPU, to tackle complex AI vision tasks. This card provides an extraordinary 214 TOPS, enabling it to process the most demanding AI workloads. Enhanced by the Voyager SDK's streamlined integration capabilities, this card promises quick deployment while maintaining superior accuracy and power efficiency. It is tailored for applications that require high throughput and minimal power consumption, making it ideal for edge computing.
The NMP-750 is a high-performance accelerator designed for edge computing, particularly suited for automotive, AR/VR, and telecommunications sectors. It boasts an impressive capacity of up to 16 TOPS and 16 MB local memory, powered by a RISC-V or Arm Cortex-R/A 32-bit CPU. The three AXI4 interfaces ensure seamless data transfer and processing. This advanced accelerator supports multifaceted applications such as mobility control, building automation, and multi-camera processing. It's designed to cope with the rigorous demands of modern digital and autonomous systems, offering substantial processing power and efficiency for intensive computational tasks. The NMP-750's ability to integrate into smart systems and manage spectral efficiency makes it crucial for communications and smart infrastructure management. It helps streamline operations, maintain effective energy management, and facilitate sophisticated AI-driven automation, ensuring that even the most complex data flows are handled efficiently.
The Metis M.2 AI accelerator module from Axelera AI is a cutting-edge solution for embedded AI applications. Designed for high-performance AI inference, this card boasts a single quad-core Metis AIPU that delivers industry-leading performance. With dedicated 1 GB DRAM memory, it operates efficiently within compact form factors like the NGFF M.2 socket. This capability unlocks tremendous potential for a range of AI-driven vision applications, offering seamless integration and heightened processing power.
RaiderChip's GenAI v1 is a pioneering hardware-based generative AI accelerator, designed to perform local inference at the Edge. This technology integrates optimally with on-premises servers and embedded devices, offering substantial benefits in privacy, performance, and energy efficiency over traditional hybrid AI solutions. The design of the GenAI v1 NPU streamlines the process of executing large language models by embedding them directly onto the hardware, eliminating the need for external components like CPUs or internet connections. With its ability to support complex models such as the Llama 3.2 with 4-bit quantization on LPDDR4 memory, the GenAI v1 achieves unprecedented efficiency in AI token processing, coupled with energy savings and reduced latency. What sets GenAI v1 apart is its scalability and cost-effectiveness, significantly outperforming competitive solutions such as Intel Gaudi 2, Nvidia's cloud GPUs, and Google's cloud TPUs in terms of memory efficiency. This solution maximizes the number of tokens generated per unit of memory bandwidth, thus addressing one of the primary limitations in generative AI workflow. Furthermore, the adept memory usage of GenAI v1 reduces the dependency on costly memory types like HBM, opening the door to more affordable alternatives without diminishing processing capabilities. With a target-agnostic approach, RaiderChip ensures the GenAI v1 can be adapted to various FPGAs and ASICs, offering configuration flexibility that allows users to balance performance with hardware costs. Its compatibility with a wide range of transformers-based models, including proprietary modifications, ensures GenAI v1's robust placement across sectors requiring high-speed processing, like finance, medical diagnostics, and autonomous systems. RaiderChip's innovation with GenAI v1 focuses on supporting both vanilla and quantized AI models, ensuring high computation speeds necessary for real-time applications without compromising accuracy. This capability underpins their strategic vision of enabling versatile and sustainable AI solutions across industries. By prioritizing integration ease and operational independence, RaiderChip provides a tangible edge in applying generative AI effectively and widely.
The NuLink Die-to-Die PHY for Standard Packaging is a cutting-edge interconnect solution that bridges multiple dies on a single standard package substrate. This technology supports numerous industry standards, including UCIe and BoW, and adapts to both advanced and conventional packaging setups. It enables low-power, high-performance interconnections that are instrumental in the design of multi-die systems like SiPs, facilitating bandwidth and power efficiencies comparable to that of more costly packaging technologies. Eliyan's PHY technology, distinctive for its innovative implementation methods, offers similar performance attributes as advanced packaging alternatives but at a fraction of the thermal, cost, and production time expenditures. This design approach effectively utilizes standard packages, circumventing the complexities associated with silicon interposers, while still delivering robust data handling capabilities essential for sophisticated ASIC designs. With up to 64 data lanes, and operating at data rates that reach 32Gbps per lane, the NuLink Die-to-Die interconnect elements ensure consistent performance. Such specifications make them suitable for high-demand applications requiring reliable, efficient data transmission across multiple processing elements, reinforcing their role as a fundamental building block in the semiconductor landscape.
Designed for entry-level server-class applications, the SCR9 is a 64-bit RISC-V processor core that comes equipped with cutting-edge features, such as an out-of-order superscalar pipeline, making it apt for processing-intensive environments. It supports both single and double-precision floating-point operations adhering to IEEE standards, which ensure precise computation results. This processor core is tailored for high-performance computing needs, with a focus on AI and ML, as well as conventional data processing tasks. It integrates an advanced interrupt system featuring APLIC configurations, enabling responsive operations even under heavy workloads. SCR9 supports up to 16 cores in a multi-cluster arrangement, each utilizing coherent multi-level caches to maintain rapid data processing and management. The comprehensive development package for SCR9 includes ready-to-deploy toolchains and simulators that expedite software development, particularly within Linux environments. The core is well-suited for deployment in entry-level server markets and data-intensive applications, with robust support for virtualization and heterogeneous architectures.
Ventana's Veyron V2 CPU represents the pinnacle of high-performance AI and data center-class RISC-V processors. Engineered to deliver world-class performance, it supports extensive data center workloads, offering superior computational power and efficiency. The V2 model is particularly focused on accelerating AI and ML tasks, ensuring compute-intensive applications run seamlessly. Its design makes it an ideal choice for hyperscale, cloud, and edge computing solutions where performance is non-negotiable. This CPU is instrumental for companies aiming to scale with the latest in server-class technology.
The NMP-350 is a cutting-edge endpoint accelerator designed to optimize power usage and reduce costs. It is ideal for markets like automotive, AIoT/sensors, and smart appliances. Its applications span from driver authentication and predictive maintenance to health monitoring. With a capacity of up to 1 TOPS and 1 MB of local memory, it incorporates a RISC-V/Arm Cortex-M 32-bit CPU and supports three AXI4 interfaces. This makes the NMP-350 a versatile component for various industrial applications, ensuring efficient performance and integration. Developed as a low-power solution, the NMP-350 is pivotal for applications requiring efficient processing power without inflating energy consumption. It is crucial for mobile and battery-operated devices where every watt conserved adds to the operational longevity of the product. This product aligns with modern demands for eco-friendly and cost-effective technologies, supporting enhanced performance in compact electronic devices. Technical specifications further define its role in the industry, exemplifying how it brings robust and scalable solutions to its users. Its adaptability across different applications, coupled with its cost-efficiency, makes it an indispensable tool for developers working on next-gen AI solutions. The NMP-350 is instrumental for developers looking to seamlessly incorporate AI capabilities into their designs without compromising on economy or efficiency.
The A25 processor model is a versatile CPU suitable for a variety of embedded applications. With its 5-stage pipeline and 32/64-bit architecture, it delivers high performance even with a low gate count, which translates to efficiency in power-sensitive environments. The A25 is equipped with Andes Custom Extensions that enable tailored instruction sets for specific application accelerations. Supporting robust high-frequency operations, this model shines in its ability to manage data prefetching and cache coherence in multicore setups, making it adept at handling complex processing tasks within constrained spaces.
The Chimera GPNPU by Quadric redefines AI computing on devices by combining processor flexibility with NPU efficiency. Tailored for on-device AI, it tackles significant machine learning inference challenges faced by SoC developers. This licensable processor scales massively offering performance from 1 to 864 TOPs. One of its standout features is the ability to execute matrix, vector, and scalar code in a single pipeline, essentially merging the functionalities of NPUs, DSPs, and CPUs into a single core. Developers can easily incorporate new ML networks such as vision transformers and large language models without the typical overhead of partitioning tasks across multiple processors. The Chimera GPNPU is entirely code-driven, empowering developers to optimize their models throughout a device's lifecycle. Its architecture allows for future-proof flexibility, handling newer AI workloads as they emerge without necessitating hardware changes. In terms of memory efficiency, the Chimera architecture is notable for its compiler-driven DMA management and support for multiple levels of data storage. Its rich instruction set optimizes both 8-bit integer operations and complex DSP tasks, providing full support for C++ coded projects. Furthermore, the Chimera GPNPU integrates AXI Interfaces for efficient memory handling and configurable L2 memory to minimize off-chip access, crucial for maintaining low power dissipation.
AndesCore Processors offer a robust lineup of high-performance CPUs tailored for diverse market segments. Employing the AndeStar V5 instruction set architecture, these cores uniformly support the RISC-V technology. The processor family is classified into different series, including the Compact, 25-Series, 27-Series, 40-Series, and 60-Series, each featuring unique architectural advances. For instance, the Compact Series specializes in delivering compact, power-efficient processing, while the 60-Series is optimized for high-performance out-of-order execution. Additionally, AndesCore processors extend customization through Andes Custom Extension, which allows users to define specific instructions to accelerate application-specific tasks, offering a significant edge in design flexibility and processing efficiency.
The xcore.ai platform from XMOS is engineered to revolutionize the scope of intelligent IoT by offering a powerful yet cost-efficient solution that combines high-performance AI processing with flexible I/O and DSP capabilities. At its heart, xcore.ai boasts a multi-threaded architecture with 16 logical cores divided across two processor tiles, each equipped with substantial SRAM and a vector processing unit. This setup ensures seamless execution of integer and floating-point operations while facilitating high-speed communication between multiple xcore.ai systems, allowing for scalable deployments in varied applications. One of the standout features of xcore.ai is its software-defined I/O, enabling deterministic processing and precise timing accuracy, which is crucial for time-sensitive applications. It integrates embedded PHYs for various interfaces such as MIPI, USB, and LPDDR, enhancing its adaptability in meeting custom application needs. The device's clock frequency can be adjusted to optimize power consumption, affirming its cost-effectiveness for IoT solutions demanding high efficiency. The platform's DSP and AI performances are equally impressive. The 32-bit floating-point pipeline can deliver up to 1600 MFLOPS with additional block floating point capabilities, accommodating complex arithmetic computations and FFT operations essential for audio and vision processing. Its AI performance reaches peaks of 51.2 GMACC/s for 8-bit operations, maintaining substantial throughput even under intensive AI workloads, making xcore.ai an ideal candidate for AI-enhanced IoT device creation.
The NMP-550 is tailored for enhanced performance efficiency, serving sectors like automotive, mobile, AR/VR, drones, and robotics. It supports applications such as driver monitoring, image/video analytics, and security surveillance. With a capacity of up to 6 TOPS and 6 MB local memory, this accelerator leverages either a RISC-V or Arm Cortex-M/A 32-bit CPU. Its three AXI4 interface support ensures robust interconnections and data flow. This performance boost makes the NMP-550 exceptionally suited for devices requiring high-frequency AI computations. Typical use cases include industrial surveillance and smart robotics, where precise and fast data analysis is critical. The NMP-550 offers a blend of high computational power and energy efficiency, facilitating complex AI tasks like video super-resolution and fleet management. Its architecture supports modern digital ecosystems, paving the way for new digital experiences through reliable and efficient data processing capabilities. By addressing the needs of modern AI workloads, the NMP-550 stands as a significant upgrade for those needing robust processing power in compact form factors.
The RISC-V Core-hub Generators from InCore are tailored for developers who need advanced control over their core architectures. This innovative tool enables users to configure core-hubs precisely at the instruction set and microarchitecture levels, allowing for optimized design and functionality. The platform supports diverse industry applications by facilitating the seamless creation of scalable and customizable RISC-V cores. With the RISC-V Core-hub Generators, InCore empowers users to craft their own processor solutions from the ground up. This flexibility is pivotal for businesses looking to capitalize on the burgeoning RISC-V ecosystem, providing a pathway to innovation with reduced risk and cost. Incorporating feedback from leading industry partners, these generators are designed to lower verification costs while accelerating time-to-market for new designs. Users benefit from InCore's robust support infrastructure and a commitment to simplifying complex chip design processes. This product is particularly beneficial for organizations aiming to integrate RISC-V technology efficiently into their existing systems, ensuring compatibility and enhancing functionality through intelligent automation and state-of-the-art tools.
The AndeShape Platforms are designed to streamline system development by providing a diverse suite of IP solutions for SoC architecture. These platforms encompass a variety of product categories, including the AE210P for microcontroller applications, AE300 and AE350 AXI fabric packages for scalable SoCs, and AE250 AHB platform IP. These solutions facilitate efficient system integration with Andes processors. Furthermore, AndeShape offers a sophisticated range of development platforms and debugging tools, such as ADP-XC7K160/410, which reinforce the system design and verification processes, providing a comprehensive environment for the innovative realization of IoT and other embedded applications.
The Avispado core is a 64-bit in-order RISC-V processor that provides an excellent balance of performance and power efficiency. With a focus on energy-conscious designs, Avispado facilitates the development of machine learning applications and is prime for environments with limited silicon resources. It leverages Semidynamics' innovative Gazzillion Misses™ technology to address challenges with sparse tensor weights, enhancing energy efficiency and operational performance for AI tasks. Structured to support multiprocessor configurations, Avispado is integral in systems requiring cache coherence and high memory throughput. It is particularly suitable for setups aimed at recommendation systems due to its ability to manage numerous outstanding memory requests, thanks to its advanced memory interface architectures. Integration with Semidynamics' Vector Unit enriches its offering, allowing dense computations and providing optimal performance in handling vector tasks. The ability to engage with Linux-ready environments and support for RISC-V Vector Specification 1.0 ensures that Avispado integrates seamlessly into existing frameworks, fostering innovative applications in fields like data centers and beyond.
The Veyron V1 CPU is designed to meet the demanding needs of data center workloads. Optimized for robust performance and efficiency, it handles a variety of tasks with precision. Utilizing RISC-V open architecture, the Veyron V1 is easily integrated into custom high-performance solutions. It aims to support the next-generation data center architectures, promising seamless scalability for various applications. The CPU is crafted to compete effectively against ARM and x86 data center CPUs, providing the same class-leading performance with added flexibility for bespoke integrations.
The Jotunn8 is engineered to redefine performance standards for AI datacenter inference, supporting prominent large language models. Standing as a fully programmable and algorithm-agnostic tool, it supports any algorithm, any host processor, and can execute generative AI like GPT-4 or Llama3 with unparalleled efficiency. The system excels in delivering cost-effective solutions, offering high throughput up to 3.2 petaflops (dense) without relying on CUDA, thus simplifying scalability and deployment. Optimized for cloud and on-premise configurations, Jotunn8 ensures maximum utility by integrating 16 cores and a high-level programming interface. Its innovative architecture addresses conventional processing bottlenecks, allowing constant data availability at each processing unit. With the potential to operate large and complex models at reduced query costs, this accelerator maintains performance while consuming less power, making it the preferred choice for advanced AI tasks. The Jotunn8's hardware extends beyond AI-specific applications to general processing (GP) functionalities, showcasing its agility. By automatically selecting the most suitable processing paths layer-by-layer, it optimizes both latency and power consumption. This provides its users with a flexible platform that supports the deployment of vast AI models under efficient resource utilization strategies. This product's configuration includes power peak consumption of 180W and an impressive 192 GB on-chip memory, accommodating sophisticated AI workloads with ease. It aligns closely with theoretical limits for implementation efficiency, accentuating VSORA's commitment to high-performance computational capabilities.
The Dynamic Neural Accelerator (DNA) II offers a groundbreaking approach to enhancing edge AI performance. This neural network architecture core stands out due to its runtime reconfigurable architecture that allows for efficient interconnections between compute components. DNA II supports both convolutional and transformer network applications, accommodating an extensive array of edge AI functions. By leveraging scalable performance, it makes itself a valuable asset in the development of systems-on-chip (SoC) solutions. DNA II is spearheaded by EdgeCortix's patented data path architecture, focusing on technical optimization to maximize available computing resources. This architecture uniquely allows DNA II to maintain low power consumption while flexibly adapting to various task demands across diverse AI models. Its higher utilization rates and faster processing set it apart from traditional IP core solutions, addressing industry demands for more efficient and effective AI processing. In concert with the MERA software stack, DNA II optimally sequences computation tasks and resource distribution, further refining efficiency and effectiveness in processing neural networks. This integration of hardware and software not only aids in reducing on-chip memory bandwidth usage but also enhances the parallel processing ability of the system, catering to the intricate needs of modern AI computing environments.
The GenAI v1-Q from RaiderChip brings forth a specialized focus on quantized AI operations, reducing memory requirements significantly while maintaining impressive precision and speed. This innovative accelerator is engineered to execute large language models in real-time, utilizing advanced quantization techniques such as Q4_K and Q5_K, thereby enhancing AI inference efficiency especially in memory-constrained environments. By offering a 276% boost in processing speed alongside a 75% reduction in memory footprint, GenAI v1-Q empowers developers to integrate advanced AI capabilities into smaller, less powerful devices without sacrificing operational quality. This makes it particularly advantageous for applications demanding swift response times and low latency, including real-time translation, autonomous navigation, and responsive customer interactions. The GenAI v1-Q diverges from conventional AI solutions by functioning independently, free from external network or cloud auxiliaries. Its design harmonizes superior computational performance with scalability, allowing seamless adaptation across variegated hardware platforms including FPGAs and ASIC implementations. This flexibility is crucial for tailoring performance parameters like model scale, inference velocity, and power consumption to meet exacting user specifications effectively. RaiderChip's GenAI v1-Q addresses crucial AI industry needs with its ability to manage multiple transformer-based models and confidential data securely on-premises. This opens doors for its application in sensitive areas such as defense, healthcare, and financial services, where confidentiality and rapid processing are paramount. With GenAI v1-Q, RaiderChip underscores its commitment to advancing AI solutions that are both environmentally sustainable and economically viable.
ISPido on VIP Board is a customized runtime solution tailored for Lattice Semiconductors’ Video Interface Platform (VIP) board. This setup enables real-time image processing and provides flexibility for both automated configuration and manual control through a menu interface. Users can adjust settings via histogram readings, select gamma tables, and apply convolutional filters to achieve optimal image quality. Equipped with key components like the CrossLink VIP input bridge board and ECP5 VIP Processor with ECP5-85 FPGA, this solution supports dual image sensors to produce a 1920x1080p HDMI output. The platform enables dynamic runtime calibration, providing users with interface options for active parameter adjustments, ensuring that image settings are fine-tuned for various applications. This system is particularly advantageous for developers and engineers looking to integrate sophisticated image processing capabilities into their devices. Its runtime flexibility and comprehensive set of features make it a valuable tool for prototyping and deploying scalable imaging solutions.
The Tyr Superchip is engineered to tackle the most daunting computational challenges in edge AI, autonomous driving, and decentralized AIoT applications. It merges AI and DSP functionalities into a single, unified processing unit capable of real-time data management and processing. This all-encompassing chip solution handles vast amounts of sensor data necessary for complete autonomous driving and supports rapid AI computing at the edge. One of the key challenges it addresses is providing massive compute power combined with low-latency outputs, achieving what traditional architectures cannot in terms of energy efficiency and speed. Tyr chips are surrounded by robust safety protocols, being ISO26262 and ASIL-D ready, making them ideally suited for the critical standards required in automotive systems. Designed with high programmability, the Tyr Superchip accommodates the fast-evolving needs of AI algorithms and supports modern software-defined vehicles. Its low power consumption, under 50W for higher-end tasks, paired with a small silicon footprint, ensures it meets eco-friendly demands while staying cost-effective. VSORA’s Superchip is a testament to their innovative prowess, promising unmatched efficiency in processing real-time data streams. By providing both power and processing agility, it effectively supports the future of mobility and AI-driven automation, reinforcing VSORA’s position as a forward-thinking leader in semiconductor technology.
The Hanguang 800 AI Accelerator by T-Head is an advanced semiconductor technology designed to accelerate AI computations and machine learning tasks. This accelerator is specifically optimized for high-performance inference, offering substantial improvements in processing times for deep learning applications. Its architecture is developed to leverage parallel computing capabilities, making it highly suitable for tasks that require fast and efficient data handling. This AI accelerator supports a broad spectrum of machine learning frameworks, ensuring compatibility with various AI algorithms. It is equipped with specialized processing units and a high-throughput memory interface, allowing it to handle large datasets with minimal latency. The Hanguang 800 is particularly effective in environments where rapid inferencing and real-time data processing are essential, such as in smart cities and autonomous driving. With its robust design and multi-faceted processing abilities, the Hanguang 800 Accelerator empowers industries to enhance their AI and machine learning deployments. Its capability to deliver swift computation and inference results ensures it is a valuable asset for companies looking to stay at the forefront of technological advancement in AI applications.
aiWare stands out as a premier hardware IP for high-performance neural processing, tailored for complex automotive AI applications. By offering exceptional efficiency and scalability, aiWare empowers automotive systems to harness the full power of neural networks across a wide variety of functions, from Advanced Driver Assistance Systems (ADAS) to fully autonomous driving platforms. It boasts an innovative architecture optimized for both performance and energy efficiency, making it capable of handling the rigorous demands of next-generation AI workloads. The aiWare hardware features an NPU designed to achieve up to 256 Effective Tera Operations Per Second (TOPS), delivering high performance at significantly lower power. This is made possible through a thoughtfully engineered dataflow and memory architecture that minimizes the need for external memory bandwidth, thus enhancing processing speed and reducing energy consumption. The design ensures that aiWare can operate efficiently across a broad range of conditions, maintaining its edge in both small and large-scale applications. A key advantage of aiWare is its compatibility with aiMotive's aiDrive software, facilitating seamless integration and optimizing neural network configurations for automotive production environments. aiWare's development emphasizes strong support for AI algorithms, ensuring robust performance in diverse applications, from edge processing in sensor nodes to high central computational capacity. This makes aiWare a critical component in deploying advanced, scalable automotive AI solutions, designed specifically to meet the safety and performance standards required in modern vehicles.
RegSpec is a comprehensive register specification tool that excels in generating Control Configuration and Status Register (CCSR) code. The tool is versatile, supporting various input formats like SystemRDL, IP-XACT, and custom formats via CSV, Excel, XML, or JSON. Its ability to output in formats such as Verilog RTL, System Verilog UVM code, and SystemC header files makes it indispensable for IP designers, offering extensive features for synchronization across multiple clock domains and interrupt handling. Additionally, RegSpec automates verification processes by generating UVM code and RALF files useful in firmware development and system modeling.
ISPido represents a fully configurable RTL Image Signal Processing Pipeline, adhering to the AMBA AXI4 standards and tailored through the AXI4-LITE protocol for seamless integration with systems such as RISC-V. This advanced pipeline supports a variety of image processing functions like defective pixel correction, color filter interpolation using the Malvar-Cutler algorithm, and auto-white balance, among others. Designed to handle resolutions up to 7680x7680, ISPido provides compatibility for both 4K and 8K video systems, with support for 8, 10, or 12-bit depth inputs. Each module within this pipeline can be fine-tuned to fit specific requirements, making it a versatile choice for adapting to various imaging needs. The architecture's compatibility with flexible standards ensures robust performance and adaptability in diverse applications, from consumer electronics to professional-grade imaging solutions. Through its compact design, ISPido optimizes area and energy efficiency, providing high-quality image processing while keeping hardware demands low. This makes it suitable for battery-operated devices where power efficiency is crucial, without sacrificing the processing power needed for high-resolution outputs.
The Zhenyue 510 SSD Controller is a high-performance enterprise-grade controller providing robust management for SSD storage solutions. It is engineered to deliver exceptional I/O throughput of up to 3400K IOPS and a data transfer rate reaching 14 GByte/s. This remarkable performance is achieved through the integration of T-Head's proprietary low-density parity-check (LDPC) error correction algorithms, enhancing reliability and data integrity. Equipped with T-Head's low-latency architecture, the Zhenyue 510 offers swift read and write operations, crucial for applications demanding fast data processing capabilities. It supports flexible Nand flash interfacing, which makes it adaptable to multiple generations of flash memory technologies. This flexibility ensures that the device remains a viable solution as storage standards evolve. Targeted at applications such as online transactions, large-scale data management, and software-defined storage systems, the Zhenyue 510's advanced capabilities make it a cornerstone for organizations needing seamless and efficient data storage solutions. The combination of innovative design, top-tier performance metrics, and adaptability positions the Zhenyue 510 as a leader in SSD controller technologies.
The SAKURA-II AI accelerator is designed specifically to address the challenges of energy efficiency and processing demands in edge AI applications. This powerhouse delivers top-tier performance while maintaining a compact and low-power silicon architecture. The key advantage of SAKURA-II is its capability to handle vision and Generative AI applications with unmatched efficiency, thanks to the integration of the Dynamic Neural Accelerator (DNA) core. This core exhibits run-time reconfigurability that supports multiple neural network models simultaneously, adapting in real-time without compromising on speed or accuracy. Focusing on the demanding needs of modern AI applications, the SAKURA-II easily manages models with billions of parameters, such as Llama 2 and Stable Diffusion, all within a mere power envelope of 8W. It supports a large memory bandwidth and DRAM capacity, ensuring smooth handling of complex workloads. Furthermore, its multiple form factors, including modules and cards, allow for versatile system integration and rapid development, significantly shortening the time-to-market for AI solutions. EdgeCortix has engineered the SAKURA-II to offer superior DRAM bandwidth, allowing for up to 4x the DRAM bandwidth of other accelerators, crucial for low-latency operations and nimbly executing large-scale AI workflows such as Language and Vision Models. Its architecture promises higher AI compute utilization than traditional solutions, thus delivering significant energy efficiency advantages.
SiFive Essential family offers a highly customizable set of processor IPs suitable for a range of applications, from embedded microcontrollers to full-fledged Linux-capable designs. This family presents the flexibility to tailor power, area, and performance metrics according to specific market needs, ensuring that designers can optimize their solutions for diverse applications. The Essential lineup is structured to allow easy adaptability, featuring scalable microarchitectures that cater to every stage of product development. From lightweight, power-efficient processors optimized for IoT devices to more robust configurations designed for real-time control and processing, SiFive Essential processors cover a broad spectrum of use cases. Key features include advanced trace and debug capabilities and an open, scalable platform enhancing the overall security of SoC designs. With its comprehensive customization options, the Essential family is perfect for designers who need to strike a balance between performance and power efficiency. This versatility positions the SiFive Essential series as a cornerstone in providing quality RISC-V solutions, allowing for innovation without compromise on customizability and scalability.
The Time-Triggered Protocol (TTP) is a robust communication protocol designed for safety-critical applications. It provides deterministic exchange of messages between nodes in a network at pre-determined time intervals, ensuring system reliability and predictability. This makes TTP suited for environments like aerospace and automotive systems, where timing precision and fault tolerance are crucial. TTP's core feature is its ability to prioritize and synchronize communication across multiple nodes, effectively handling both normal operation and recovery from potential faults. By achieving strict temporal coordination, TTP enhances network efficiency and reduces the likelihood of message collision, contributing to overall system safety and robustness. Additionally, TTP supports modular extension, allowing designers to add functionalities without major architectural changes. This adaptability makes it an ideal choice for evolving systems that require long-term reliability and scalability. Furthermore, TTP's lightweight implementation aids in maintaining low system complexity, thereby optimizing resource utilization under various operational scenarios.
Wormhole is a versatile communication system designed to enhance data flow within complex computational architectures. By employing state-of-the-art connectivity solutions, it enables efficient data exchange, critical for high-speed processing and low-latency communication. This technology is essential for maintaining optimal performance in environments demanding seamless data integration. Wormhole's ability to manage significant data loads with minimal latency makes it particularly suitable for applications requiring real-time data processing and transfer. Its integration into existing systems can enhance overall efficiency, fostering a more responsive computational environment. This makes it an invaluable asset for sectors undergoing digital transformation. The adaptability of Wormhole to various technological requirements ensures it remains relevant across diverse industry applications. This flexibility means that it can scale with ongoing technological advancements, cementing its role as a cornerstone in the evolving landscape of high-speed data communications.
The SiFive Intelligence X280 processor is crafted for the demands of AI and ML within edge computing environments. It integrates high-performance scalar and vector computing capabilities, making it ideal for data-heavy AI tasks like management, object detection, and speech processing. The X280 leverages the RISC-V architecture's open standards, bringing a high level of customizability and performance efficiency to AI applications. Equipped with SiFive's Matrix Engine, the X280 is capable of handling sophisticated AI workloads with its impressive maximum throughput of 16 TOPS for INT8 operations. This performance is achieved without compromising on power efficiency, maintaining a small footprint that makes it suitable for diverse deployment scenarios. The processor's scalability is a key feature, supporting vector lengths up to 512 bits to accommodate the demands of intensive machine learning operations. SiFive Intelligence X280 stands out for its role in reshaping the possibilities of AI at the edge, pushing forward the capabilities of machine learning with a comprehensive software and hardware integration. This approach ensures that the X280 can handle emerging AI challenges with ease, presenting a formidable solution for today's AI-driven applications.
The Codasip RISC-V BK Core Series is engineered to deliver flexibility and adaptability for a variety of embedded applications. These cores are designed to be low-power, offering an excellent balance of performance and energy efficiency. The series provides a spectrum of configurations, allowing developers to customize them to align with unique project requirements, ensuring each processor operates at peak efficiency for its specific use case. The cores are RISC-V compliant and adhere to stringent industry standards for quality, making them a reliable choice for sensitive applications.
The General Purpose Accelerator (Aptos) from Ascenium stands out as a redefining force in the realm of CPU technology. It seeks to overcome the limitations of traditional CPUs by providing a solution that tackles both performance inefficiencies and high energy demands. Leveraging compiler-driven architecture, this accelerator introduces a novel approach by simplifying CPU operations, making it exceptionally suited for handling generic code. Notably, it offers compatibility with the LLVM compiler, ensuring a wide range of applications can be adapted seamlessly without rewrites. The Aptos excels in performance by embracing a highly parallel yet simplified CPU framework that significantly boosts efficiency, reportedly achieving up to four times the performance of cutting-edge CPUs. Such advancements cater not only to performance-oriented tasks but also substantially mitigate energy consumption, providing a dual benefit of cost efficiency and reduced environmental impact. This makes Aptos a valuable asset for data centers seeking to optimize their energy footprint while enhancing computational capabilities. Additionally, the Aptos architecture supports efficient code execution by resolving tasks predominantly at compile-time, allowing the processor to handle workloads more effectively. This allows standard high-level language software to run with improved efficiency across diverse computing environments, aligning with an overarching goal of greener computing. By maximizing operational efficiency and reducing carbon emissions, Aptos propels Ascenium into a leading position in the sustainable and high-performance computing sector.
The Azurite Core-hub by InCore Semiconductors is a sophisticated solution designed to offer scalable RISC-V SoCs with high-speed secure interconnect capabilities. This processor is tailored for performance-demanding applications, ensuring that systems maintain robust security while executing tasks at high speeds. Azurite leverages advanced interconnect technologies to enhance the communication between components within a SoC, making it ideal for industries that require rapid data transfer and high processing capabilities. The core is engineered to be scalable, supporting a wide range of applications from edge AI to functional safety systems, adapting seamlessly to various industry needs. Engineered with a focus on security, the Azurite Core-hub incorporates features that protect data integrity and system operation in a dynamic technological landscape. This makes it a reliable choice for companies seeking to integrate advanced RISC-V architectures into their security-focused applications, offering not just innovation but also peace of mind with its secure design.
The SiFive Performance family is tailored for maximum throughput in datacenter workloads, serving environments from web servers to networking and storage. This collection of processors boasts 64-bit, Out of Order (OoO) cores optimized for energy-efficient, high-performance computation. Designed to handle AI workloads with specific vector engines, the Performance processors offer a scalable core architecture, ranging from three-wide to six-wide out-of-order configurations. The P870-D processor, a standout in the Performance series, is engineered for datacenters and AI, supporting scalable compute density across multiple cores. Among other products, the Performance family includes the P650, P550, and P450, each offering varying multi-core and pipeline structures to cater to different workload needs. The blend of top-tier performance, compact footprint, and cost efficiency makes these processors an optimal choice for modern high-performance applications and environments. SiFive's Performance series is built to not only meet but surpass the demands of various markets, including mobile, consumer, datacenter, and industrial automation. It represents SiFive's commitment to advancing the scope of RISC-V technology, pushing boundaries in high-performance processing through careful design and innovation.
The iniDSP from Inicore is a sophisticated 16-bit digital signal processor designed to manage a variety of signal processing tasks. This core is particularly tailored for applications that require precise processing capabilities and real-time performance. It excels in environments where efficiency and accuracy are paramount, supporting various digital signal processing needs within an FPGA or ASIC system. The iniDSP’s design ensures optimal integration and functionality, providing a reliable solution for industries requiring effective signal processing solutions.
The ZIA DV700 Series is a high-performance AI processor designed by Digital Media Professionals Inc., providing extensive capabilities for deep learning inference on the edge. It is optimized for executing sophisticated neural network models efficiently, accommodating a wide range of AI applications. By incorporating advanced floating-point precision processing, the DV700 series enhances accuracy in areas where computational precision is pivotal. This processor series is particularly tailored for deployment in systems requiring reliable real-time decision-making capabilities, such as robotics and autonomous vehicles. It supports a variety of neural network frameworks, allowing for seamless integration with existing AI models and architectures, thus expanding its deployment flexibility in adaptive technology environments. The series also includes an adaptable software development kit to facilitate easy implementation and iterative testing of AI models. By supporting prevalent AI frameworks like TensorFlow and Caffe, it empowers developers to optimize their models for maximum performance and efficiency. The ZIA DV700 Series stands out as a competitive edge solution in high-stakes technological applications, ensuring superior operational standards in demanding projects.
Dyumnin's RISCV SoC is built around a robust 64-bit quad-core server class RISC-V CPU, offering various subsystems that cater to AI/ML, automotive, multimedia, memory, and cryptographic needs. This SoC is notable for its AI accelerator, including a custom CPU and tensor flow unit designed to expedite AI tasks. Furthermore, the communication subsystem supports a wide array of protocols like PCIe, Ethernet, and USB, ensuring versatile connectivity. As for the automotive sector, it includes CAN and SafeSPI IPs, reinforcing its utility in diverse applications such as automotive systems.
The RISC-V CPU IP N Class from Nuclei System Technology offers a versatile 32-bit architecture designed for microcontroller units (MCUs) and AIoT applications. Engineered with the RISC-V open standard, this processor IP provides extensive configurability options, allowing users to tailor the IP to meet their specific system requirements. It supports a variety of security features and functional safety protocols, making it suitable for applications demanding reliable and robust performance. This CPU IP is perfect for those implementing advanced RISC-V technology in fields that require agility and cutting-edge functionality. Its ease of customization ensures seamless integration into existing systems, supporting an array of ecosystem resources such as tool-chains, SDKs, and support for operating systems including RTOS and Linux. With a local R&D team backing its development, the N Class IP sees rapid iteration and enhancement, aligning with the technological demands and trends in high-performance computing. This positions it as a leading choice for firms looking to adopt RISC-V technology in innovative and emergent applications.
Monolithic Microsystems represents a technological leap in integrated system design, featuring multiple micro-engineered elements within a single chip. This system leverages advanced CMOS technology to unify electronic, photonic, and micromechanical devices, creating a compact and efficient platform suited for a variety of applications. By integrating different functionalities within a single substrate, these Microsystems can enhance performance while reducing the overall system footprint. They are increasingly being used in fields such as telecommunications, medical devices, and consumer electronics, where precision, reliability, and miniaturization are of paramount importance.
The RV32EC_P2 Processor Core is a compact, high-efficiency RISC-V processor designed for low-power, small-scale embedded applications. Featuring a 2-stage pipeline architecture, it efficiently executes trusted firmware. It supports the RISC-V RV32E base instruction set, complemented by compression and optional integer multiplication instructions, greatly optimizing code size and runtime efficiency. This processor accommodates both ASIC and FPGA workflows, offering tightly-coupled memory interfaces for robust design flexibility. With a simple machine-mode architecture, the RV32EC_P2 ensures swift data access. It boasts extended compatibility with AHB-Lite and APB interfaces, allowing seamless interaction with memory and I/O peripherals. Designed for enhanced power management, it features an interrupt system and clock-gating abilities, effectively minimizing idle power consumption. Developers can benefit from its comprehensive toolchain support, ensuring smooth firmware and virtual prototype development through platforms such as the ASTC VLAB. Further distinguished by its vectored interrupt system and support for application-specific instruction sets, the RV32EC_P2 is adaptable to various embedded applications. Enhancements include wait-for-interrupt commands for reduced power usage during inactivity and multiple timer interfaces. This versatility, along with integrated GNU and Eclipse tools, makes the RV32EC_P2 a prime choice for efficient, low-power technology integrations.
The iCan PicoPop® System on Module (SOM) by Oxytronic is an ultra-compact computing solution designed for high-performance and space-constrained environments within the aerospace industry. Utilizing the Xilinx Zynq UltraScale+ MPSoC, this module delivers significant processing power ideal for complex signal processing and other demanding tasks. This module's design caters to embedded system applications, offering robust capabilities in avionics where size, weight, and power efficiency are critical considerations. It provides core functionalities that support advanced video processing, making it a pivotal component for those requiring cutting-edge technological support in minimal form factors. Oxytronic ensures that the iCan PicoPop® maintains compatibility with a wide range of peripherals, facilitating easy integration into existing systems. Its architectural innovation signifies Oxytronic's understanding of aviation challenges, providing solutions that are both technically superior and practically beneficial for modern aerospace applications.
The RAIV General Purpose GPU (GPGPU) epitomizes versatility and cutting-edge technology in the realm of data processing and graphics acceleration. It serves as a crucial technology enabler for various prominent sectors that are central to the fourth industrial revolution, such as autonomous driving, IoT, virtual reality/augmented reality (VR/AR), and sophisticated data centers. By leveraging the RAIV GPGPU, industries are able to process vast amounts of data more efficiently, which is paramount for their growth and competitive edge. Characterized by its advanced architectural design, the RAIV GPU excels in managing substantial computational loads, which is essential for AI-driven processes and complex data analytics. Its adaptability makes it suitable for a wide array of applications, from enhancing automotive AI systems to empowering VR environments with seamless real-time interaction. Through optimized data handling and acceleration, the RAIV GPGPU assists in realizing smoother and more responsive application workflows. The strategic design of the RAIV GPGPU focuses on enabling integrative solutions that enhance performance without compromising on power efficiency. Its functionality is built to meet the high demands of today’s tech ecosystems, fostering advancements in computational efficiency and intelligent processing capabilities. As such, the RAIV stands out not only as a tool for improved graphical experiences but also as a significant component in driving innovation within tech-centric industries worldwide. Its pioneering architecture thus supports a multitude of applications, ensuring it remains a versatile and indispensable asset in diverse technological landscapes.
The ONNC Calibrator is engineered to ensure high precision in AI System-on-Chips using post-training quantization (PTQ) techniques. This tool enables architecture-aware quantization, which helps maintain 99.99% precision even with fixed-point architecture, such as INT8. Designed for diverse heterogeneous multicore setups, it supports multiple engines within a single chip architecture and employs rich entropy calculation techniques. A major advantage of the ONNC Calibrator is its efficiency; it significantly reduces the time required for quantization, taking only seconds to process standard computer vision models. Unlike re-training methods, PTQ is non-intrusive, maintains network topology, and adapts based on input distribution to provide quick and precise quantization suitable for modern neural network frameworks such as ONNX and TensorFlow. Furthermore, the Calibrator's internal precision simulator uses hardware control registers to maintain precision, demonstrating less than 1% precision drop in most computer vision models. It adapts flexibly to various hardware through its architecture-aware algorithms, making it a powerful tool for maintaining the high performance of AI systems.
Bluespec's Portable RISC-V Cores offer a versatile and adaptable solution for developers seeking cross-platform compatibility with support for FPGAs from Achronix, Xilinx, Lattice, and Microsemi. These cores come with support for operating systems like Linux and FreeRTOS, providing developers with a seamless and open-source toolset for application development. By leveraging Bluespec’s extensive compatibility and open-source frameworks, developers can benefit from efficient, versatile RISC-V application deployment.
Tensix Neo is a high-performance processor designed to accelerate AI tasks with remarkable efficiency. By optimizing for performance per watt, it caters to AI developers needing robust technology for power-intense projects. Its architectural design supports a wide range of precision formats, ensuring that varying AI workloads are managed effectively. Central to its design is a specialized Network-on-Chip (NoC) that facilitates highly efficient data transfer and communication, enabling scalable AI solutions. This NoC allows the processor to evolve alongside an ever-changing landscape of AI models and applications, making it an asset for developers focused on scalability. Tensix Neo is particularly suited for environments where adaptability and performance are crucial, such as large-scale data processing centers and real-time computational tasks. It provides the technological backbone needed for developing next-gen AI systems that require flexible and powerful processing capabilities.
The Trifecta-GPU is a sophisticated family of COTS PXIe/CPCIe GPU Modules by RADX Technologies, designed for substantial computational acceleration and ease of use in PXIe/CPCIe platforms. Powered by the NVIDIA RTX A2000 Embedded GPU, it boasts up to 8.3 FP32 TFLOPS performance, becoming a preferred choice for modular Test & Measurement (T&M) and Electronic Warfare (EW) systems. It integrates seamlessly into systems, supporting MATLAB, Python, and C/C++ programming, making it versatile for signal processing, machine learning, and deep learning inference applications. A highlight of the Trifecta-GPU is its remarkable computing prowess coupled with its design that fits within power and thermal constraints of legacy and modern chassis. It is available in both single and dual-slot variants, with the capability to dissipate power effectively, allowing users to conduct fast signal analysis and execute machine learning algorithms directly where data is acquired within the system. With its peak performance setting new standards for cost-effective compute acceleration, the Trifecta-GPU also supports advanced computing frameworks, ensuring compatibility with a myriad of applications and enhancing signal classification and geolocation tasks. Its hardware capabilities are complemented by extensive software interoperability, supporting both Windows and Linux environments, further cementing its position as a top-tier solution for demanding applications.
VisualSim Architect serves as a comprehensive platform for modeling and simulating complex systems, offering engineers a robust framework to analyze system performance, power, and functionality. The platform boasts a vast library of basic modeling constructs and supports multi-core execution, providing flexibility to integrate with external tools and languages. This integration helps in assembling graphical models using pre-defined, parameterized Technology IP blocks. These blocks are instrumental in simulating various use cases, optimizing architecture specifications, and generating detailed performance reports. One of the significant advantages of VisualSim Architect is its ability to forecast potential risks in system development, both from technical and business perspectives. It assists engineers in identifying and mitigating risks that could lead to product failures or underperformance. By facilitating early-stage design optimizations, VisualSim Architect effectively shortens the time-to-market for new products. The platform is also designed to be operating system-agnostic, running seamlessly on Windows, Linux, and Mac OS/X platforms, which ensures broad accessibility for diverse user bases. Moreover, VisualSim Architect supports a collaborative development environment, allowing system models to be shared and viewed within a web browser. This capability fosters internal and external collaboration, making it easier for teams to discuss and refine ongoing projects. The system’s batch mode further enables large-scale system analysis through offline scripting and results storage, ensuring scalability and efficiency in modeling tasks.
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