All IPs > Platform Level IP > Multiprocessor / DSP
In the realm of semiconductor IP, the Multiprocessor and Digital Signal Processor (DSP) category plays a crucial role in enhancing the processing performance and efficiency of a vast array of modern electronic devices. Semiconductor IPs in this category are designed to support complex computational tasks, enabling sophisticated functionalities in consumer electronics, automotive systems, telecommunications, and more. With the growing need for high-performance processing in a compact and energy-efficient form, multiprocessor and DSP IPs have become integral to product development across industries.
The multiprocessor IPs are tailored to provide parallel processing capabilities, which significantly boost the computational power required for intensive applications. By employing multiple processing cores, these IPs allow for the concurrent execution of multiple tasks, leading to faster data processing and improved system performance. This is especially vital in applications such as gaming consoles, smartphones, and advanced driver-assistance systems (ADAS) in vehicles, where seamless and rapid processing is essential.
Digital Signal Processors are specialized semiconductor IPs used to perform mathematical operations on signals, allowing for efficient processing of audio, video, and other types of data streams. DSPs are indispensable in applications where real-time data processing is critical, such as noise cancellation in audio devices, image processing in cameras, and signal modulation in communication systems. By providing dedicated hardware structures optimized for these tasks, DSP IPs deliver superior performance and lower power consumption compared to general-purpose processors.
Products in the multiprocessor and DSP semiconductor IP category range from core subsystems and configurable processors to specialized accelerators and integrated solutions that combine processing elements with other essential components. These IPs are designed to help developers create cutting-edge solutions that meet the demands of today’s technology-driven world, offering flexibility and scalability to adapt to different performance and power requirements. As technology evolves, the importance of multiprocessor and DSP IPs will continue to grow, driving innovation and efficiency across various sectors.
The second generation of BrainChip's Akida platform expands upon its predecessor with enhanced features for even greater performance, efficiency, and accuracy in AI applications. This platform leverages advanced 8-bit quantization and advanced neural network support, including temporal event-based neural nets and vision transformers. These advancements allow for significant reductions in model size and computational requirements, making the Akida 2nd Generation a formidable component for edge AI solutions. The platform effectively supports complex neural models necessary for a wide range of applications, from advanced vision tasks to real-time data processing, all while minimizing cloud interaction to protect data privacy.
The CXL 3.1 Switch by Panmnesia is a high-performance solution facilitating flexible and scalable inter-device connectivity. Designed for data centers and HPC systems, this switch supports extensive device integration, including memory, CPUs, and accelerators, thanks to its advanced connectivity features. The switch's design allows for complex networking configurations, promoting efficient resource utilization while ensuring low-latency communication between connected devices. It stands as an essential component in disaggregated compute environments, driving down latency and operational costs.
Axelera AI has crafted a PCIe AI acceleration card, powered by their high-efficiency quad-core Metis AIPU, to tackle complex AI vision tasks. This card provides an extraordinary 214 TOPS, enabling it to process the most demanding AI workloads. Enhanced by the Voyager SDK's streamlined integration capabilities, this card promises quick deployment while maintaining superior accuracy and power efficiency. It is tailored for applications that require high throughput and minimal power consumption, making it ideal for edge computing.
The NMP-750 is a high-performance accelerator designed for edge computing, particularly suited for automotive, AR/VR, and telecommunications sectors. It boasts an impressive capacity of up to 16 TOPS and 16 MB local memory, powered by a RISC-V or Arm Cortex-R/A 32-bit CPU. The three AXI4 interfaces ensure seamless data transfer and processing. This advanced accelerator supports multifaceted applications such as mobility control, building automation, and multi-camera processing. It's designed to cope with the rigorous demands of modern digital and autonomous systems, offering substantial processing power and efficiency for intensive computational tasks. The NMP-750's ability to integrate into smart systems and manage spectral efficiency makes it crucial for communications and smart infrastructure management. It helps streamline operations, maintain effective energy management, and facilitate sophisticated AI-driven automation, ensuring that even the most complex data flows are handled efficiently.
The NMP-750 is a high-performance accelerator designed for edge computing, particularly suited for automotive, AR/VR, and telecommunications sectors. It boasts an impressive capacity of up to 16 TOPS and 16 MB local memory, powered by a RISC-V or Arm Cortex-R/A 32-bit CPU. The three AXI4 interfaces ensure seamless data transfer and processing. This advanced accelerator supports multifaceted applications such as mobility control, building automation, and multi-camera processing. It's designed to cope with the rigorous demands of modern digital and autonomous systems, offering substantial processing power and efficiency for intensive computational tasks. The NMP-750's ability to integrate into smart systems and manage spectral efficiency makes it crucial for communications and smart infrastructure management. It helps streamline operations, maintain effective energy management, and facilitate sophisticated AI-driven automation, ensuring that even the most complex data flows are handled efficiently.
The Tianqiao-70 is engineered for ultra-low power consumption while maintaining robust computational capabilities. This commercial-grade 64-bit RISC-V CPU core presents an ideal choice for scenarios demanding minimal power usage without conceding performance. It is primarily designed for emerging mobile applications and devices, providing both economic and environmental benefits. Its architecture prioritizes low energy profiles, making it perfect for a wide range of applications, including mobile computing, desktop devices, and intelligent IoT systems. The Tianqiao-70 fits well into environments where conserving battery life is a priority, ensuring that devices remain operational for extended periods without needing frequent charging. The core maintains a focus on energy efficiency, yet it supports comprehensive computing functions to address the needs of modern, power-sensitive applications. This makes it a flexible component in constructing a diverse array of SoC solutions and meeting specific market demands for sustainability and performance.
RaiderChip's GenAI v1 is a pioneering hardware-based generative AI accelerator, designed to perform local inference at the Edge. This technology integrates optimally with on-premises servers and embedded devices, offering substantial benefits in privacy, performance, and energy efficiency over traditional hybrid AI solutions. The design of the GenAI v1 NPU streamlines the process of executing large language models by embedding them directly onto the hardware, eliminating the need for external components like CPUs or internet connections. With its ability to support complex models such as the Llama 3.2 with 4-bit quantization on LPDDR4 memory, the GenAI v1 achieves unprecedented efficiency in AI token processing, coupled with energy savings and reduced latency. What sets GenAI v1 apart is its scalability and cost-effectiveness, significantly outperforming competitive solutions such as Intel Gaudi 2, Nvidia's cloud GPUs, and Google's cloud TPUs in terms of memory efficiency. This solution maximizes the number of tokens generated per unit of memory bandwidth, thus addressing one of the primary limitations in generative AI workflow. Furthermore, the adept memory usage of GenAI v1 reduces the dependency on costly memory types like HBM, opening the door to more affordable alternatives without diminishing processing capabilities. With a target-agnostic approach, RaiderChip ensures the GenAI v1 can be adapted to various FPGAs and ASICs, offering configuration flexibility that allows users to balance performance with hardware costs. Its compatibility with a wide range of transformers-based models, including proprietary modifications, ensures GenAI v1's robust placement across sectors requiring high-speed processing, like finance, medical diagnostics, and autonomous systems. RaiderChip's innovation with GenAI v1 focuses on supporting both vanilla and quantized AI models, ensuring high computation speeds necessary for real-time applications without compromising accuracy. This capability underpins their strategic vision of enabling versatile and sustainable AI solutions across industries. By prioritizing integration ease and operational independence, RaiderChip provides a tangible edge in applying generative AI effectively and widely.
The NMP-350 is a cutting-edge endpoint accelerator designed to optimize power usage and reduce costs. It is ideal for markets like automotive, AIoT/sensors, and smart appliances. Its applications span from driver authentication and predictive maintenance to health monitoring. With a capacity of up to 1 TOPS and 1 MB of local memory, it incorporates a RISC-V/Arm Cortex-M 32-bit CPU and supports three AXI4 interfaces. This makes the NMP-350 a versatile component for various industrial applications, ensuring efficient performance and integration. Developed as a low-power solution, the NMP-350 is pivotal for applications requiring efficient processing power without inflating energy consumption. It is crucial for mobile and battery-operated devices where every watt conserved adds to the operational longevity of the product. This product aligns with modern demands for eco-friendly and cost-effective technologies, supporting enhanced performance in compact electronic devices. Technical specifications further define its role in the industry, exemplifying how it brings robust and scalable solutions to its users. Its adaptability across different applications, coupled with its cost-efficiency, makes it an indispensable tool for developers working on next-gen AI solutions. The NMP-350 is instrumental for developers looking to seamlessly incorporate AI capabilities into their designs without compromising on economy or efficiency.
The Yitian 710 Processor is an advanced Arm-based server chip developed by T-Head, designed to meet the extensive demands of modern data centers and enterprise applications. This processor boasts 128 high-performance Armv9 CPU cores, each coupled with robust caches, ensuring superior processing speeds and efficiency. With a 2.5D packaging technology, the Yitian 710 integrates multiple dies into a single unit, facilitating enhanced computational capability and energy efficiency. One of the key features of the Yitian 710 is its memory subsystem, which supports up to 8 channels of DDR5 memory, achieving a peak bandwidth of 281 GB/s. This configuration guarantees rapid data access and processing, crucial for high-throughput computing environments. Additionally, the processor is equipped with 96 PCIe 5.0 lanes, offering a dual-direction bandwidth of 768 GB/s, enabling seamless connectivity with peripheral devices and boosting system performance overall. The Yitian 710 Processor is meticulously crafted for applications in cloud services, big data analytics, and AI inference, providing organizations with a robust platform for their computing needs. By combining high core count, extensive memory support, and advanced I/O capabilities, the Yitian 710 stands as a cornerstone for deploying powerful, scalable, and energy-efficient data processing solutions.
This ultra-compact and high-speed H.264 core is engineered for FPGA platforms, boasting industry-leading size and performance. Capable of providing 1080p60 H.264 Baseline support, it accommodates various customization needs, including different pixel depths and resolutions. The core is particularly noted for its minimal latency of less than 1ms at 1080p30, a significant advantage over competitors. Its flexibility allows integration with a range of FPGA systems, ensuring efficient compression without compromising on speed or size. In one versatile package, users have access to a comprehensive set of encoding features including variable and fixed bit-rate options. The core facilitates simultaneous processing of multiple video streams, adapting to various compression ratios and frame types (I and P frames). Its support for advanced video input formats and compliance with ITAR guidelines make it a robust choice for both military and civilian applications. Moreover, the availability of low-cost evaluation licenses invites experimentation and custom adaptation, promoting broad application and ease of integration in diverse projects. These cores are especially optimized for low power consumption, drawing minimal resources in contrast to other market offerings due to their efficient FPGA design architecture. They include a suite of enhanced features such as an AXI wrapper for simple system integration and significantly reduced Block RAM requirements. Embedded systems benefit from its synchronous design and wide support for auxiliary functions like simultaneous stream encoding, making it a versatile addition to complex signal processing environments.
The Chimera GPNPU by Quadric redefines AI computing on devices by combining processor flexibility with NPU efficiency. Tailored for on-device AI, it tackles significant machine learning inference challenges faced by SoC developers. This licensable processor scales massively offering performance from 1 to 864 TOPs. One of its standout features is the ability to execute matrix, vector, and scalar code in a single pipeline, essentially merging the functionalities of NPUs, DSPs, and CPUs into a single core. Developers can easily incorporate new ML networks such as vision transformers and large language models without the typical overhead of partitioning tasks across multiple processors. The Chimera GPNPU is entirely code-driven, empowering developers to optimize their models throughout a device's lifecycle. Its architecture allows for future-proof flexibility, handling newer AI workloads as they emerge without necessitating hardware changes. In terms of memory efficiency, the Chimera architecture is notable for its compiler-driven DMA management and support for multiple levels of data storage. Its rich instruction set optimizes both 8-bit integer operations and complex DSP tasks, providing full support for C++ coded projects. Furthermore, the Chimera GPNPU integrates AXI Interfaces for efficient memory handling and configurable L2 memory to minimize off-chip access, crucial for maintaining low power dissipation.
The eSi-3250 32-bit RISC processor core excels in applications needing efficient caching structures and high-performance computation, thanks to its support for both instruction and data caches. This core targets applications where slower memory technologies or higher core/bus clock ratios exist, by leveraging configurable caches which reduce power consumption and boost performance. This advanced processor design integrates a wide range of arithmetic capabilities, supporting IEEE-754 floating-point functions and 32-bit SIMD operations to facilitate complex data processing. It uses an optional memory management unit (MMU) for virtual memory implementation and memory protection, enhancing its functional safety in various operating environments.
The eSi-3200 is a versatile 32-bit RISC processor core that combines low power usage with high performance, ideal for embedded control applications using on-chip memory. Its structure supports a wide range of computational tasks with a modified-Harvard architecture that allows simultaneous instruction and data fetching. This design facilitates deterministic performance, making it perfect for real-time control. The eSi-3200 processor supports extensive arithmetic operations, offering optional IEEE-754 floating-point units for both single-precision and SIMD instructions which optimize parallel data processing. Its compatibility with AMBA AXI or AHB interconnects ensures easy integration into various systems.
The NMP-550 is tailored for enhanced performance efficiency, serving sectors like automotive, mobile, AR/VR, drones, and robotics. It supports applications such as driver monitoring, image/video analytics, and security surveillance. With a capacity of up to 6 TOPS and 6 MB local memory, this accelerator leverages either a RISC-V or Arm Cortex-M/A 32-bit CPU. Its three AXI4 interface support ensures robust interconnections and data flow. This performance boost makes the NMP-550 exceptionally suited for devices requiring high-frequency AI computations. Typical use cases include industrial surveillance and smart robotics, where precise and fast data analysis is critical. The NMP-550 offers a blend of high computational power and energy efficiency, facilitating complex AI tasks like video super-resolution and fleet management. Its architecture supports modern digital ecosystems, paving the way for new digital experiences through reliable and efficient data processing capabilities. By addressing the needs of modern AI workloads, the NMP-550 stands as a significant upgrade for those needing robust processing power in compact form factors.
The RISC-V Core-hub Generators from InCore are tailored for developers who need advanced control over their core architectures. This innovative tool enables users to configure core-hubs precisely at the instruction set and microarchitecture levels, allowing for optimized design and functionality. The platform supports diverse industry applications by facilitating the seamless creation of scalable and customizable RISC-V cores. With the RISC-V Core-hub Generators, InCore empowers users to craft their own processor solutions from the ground up. This flexibility is pivotal for businesses looking to capitalize on the burgeoning RISC-V ecosystem, providing a pathway to innovation with reduced risk and cost. Incorporating feedback from leading industry partners, these generators are designed to lower verification costs while accelerating time-to-market for new designs. Users benefit from InCore's robust support infrastructure and a commitment to simplifying complex chip design processes. This product is particularly beneficial for organizations aiming to integrate RISC-V technology efficiently into their existing systems, ensuring compatibility and enhancing functionality through intelligent automation and state-of-the-art tools.
The Avispado core is a 64-bit in-order RISC-V processor that provides an excellent balance of performance and power efficiency. With a focus on energy-conscious designs, Avispado facilitates the development of machine learning applications and is prime for environments with limited silicon resources. It leverages Semidynamics' innovative Gazzillion Misses™ technology to address challenges with sparse tensor weights, enhancing energy efficiency and operational performance for AI tasks. Structured to support multiprocessor configurations, Avispado is integral in systems requiring cache coherence and high memory throughput. It is particularly suitable for setups aimed at recommendation systems due to its ability to manage numerous outstanding memory requests, thanks to its advanced memory interface architectures. Integration with Semidynamics' Vector Unit enriches its offering, allowing dense computations and providing optimal performance in handling vector tasks. The ability to engage with Linux-ready environments and support for RISC-V Vector Specification 1.0 ensures that Avispado integrates seamlessly into existing frameworks, fostering innovative applications in fields like data centers and beyond.
The eSi-3264 is a cutting-edge 32/64-bit processor core that incorporates SIMD DSP extensions, making it suitable for applications requiring both efficient data parallelism and minimal silicon footprint. Designed for high-accuracy DSP tasks, this processor's multifunctional capabilities target audio processing, sensor hubs, and complex arithmetic operations. The eSi-3264 processor supports sizeable instruction and data caches, which significantly enhance system performance when accessing slower external memory sources. With dual and quad MAC operations that include 64-bit accumulation, it enhances DSP execution, applying 8, 16, and 32-bit SIMD instructions for real-time data handling and minimizing CPU load.
The Jotunn8 is engineered to redefine performance standards for AI datacenter inference, supporting prominent large language models. Standing as a fully programmable and algorithm-agnostic tool, it supports any algorithm, any host processor, and can execute generative AI like GPT-4 or Llama3 with unparalleled efficiency. The system excels in delivering cost-effective solutions, offering high throughput up to 3.2 petaflops (dense) without relying on CUDA, thus simplifying scalability and deployment. Optimized for cloud and on-premise configurations, Jotunn8 ensures maximum utility by integrating 16 cores and a high-level programming interface. Its innovative architecture addresses conventional processing bottlenecks, allowing constant data availability at each processing unit. With the potential to operate large and complex models at reduced query costs, this accelerator maintains performance while consuming less power, making it the preferred choice for advanced AI tasks. The Jotunn8's hardware extends beyond AI-specific applications to general processing (GP) functionalities, showcasing its agility. By automatically selecting the most suitable processing paths layer-by-layer, it optimizes both latency and power consumption. This provides its users with a flexible platform that supports the deployment of vast AI models under efficient resource utilization strategies. This product's configuration includes power peak consumption of 180W and an impressive 192 GB on-chip memory, accommodating sophisticated AI workloads with ease. It aligns closely with theoretical limits for implementation efficiency, accentuating VSORA's commitment to high-performance computational capabilities.
The Dynamic Neural Accelerator (DNA) II offers a groundbreaking approach to enhancing edge AI performance. This neural network architecture core stands out due to its runtime reconfigurable architecture that allows for efficient interconnections between compute components. DNA II supports both convolutional and transformer network applications, accommodating an extensive array of edge AI functions. By leveraging scalable performance, it makes itself a valuable asset in the development of systems-on-chip (SoC) solutions. DNA II is spearheaded by EdgeCortix's patented data path architecture, focusing on technical optimization to maximize available computing resources. This architecture uniquely allows DNA II to maintain low power consumption while flexibly adapting to various task demands across diverse AI models. Its higher utilization rates and faster processing set it apart from traditional IP core solutions, addressing industry demands for more efficient and effective AI processing. In concert with the MERA software stack, DNA II optimally sequences computation tasks and resource distribution, further refining efficiency and effectiveness in processing neural networks. This integration of hardware and software not only aids in reducing on-chip memory bandwidth usage but also enhances the parallel processing ability of the system, catering to the intricate needs of modern AI computing environments.
The GenAI v1-Q from RaiderChip brings forth a specialized focus on quantized AI operations, reducing memory requirements significantly while maintaining impressive precision and speed. This innovative accelerator is engineered to execute large language models in real-time, utilizing advanced quantization techniques such as Q4_K and Q5_K, thereby enhancing AI inference efficiency especially in memory-constrained environments. By offering a 276% boost in processing speed alongside a 75% reduction in memory footprint, GenAI v1-Q empowers developers to integrate advanced AI capabilities into smaller, less powerful devices without sacrificing operational quality. This makes it particularly advantageous for applications demanding swift response times and low latency, including real-time translation, autonomous navigation, and responsive customer interactions. The GenAI v1-Q diverges from conventional AI solutions by functioning independently, free from external network or cloud auxiliaries. Its design harmonizes superior computational performance with scalability, allowing seamless adaptation across variegated hardware platforms including FPGAs and ASIC implementations. This flexibility is crucial for tailoring performance parameters like model scale, inference velocity, and power consumption to meet exacting user specifications effectively. RaiderChip's GenAI v1-Q addresses crucial AI industry needs with its ability to manage multiple transformer-based models and confidential data securely on-premises. This opens doors for its application in sensitive areas such as defense, healthcare, and financial services, where confidentiality and rapid processing are paramount. With GenAI v1-Q, RaiderChip underscores its commitment to advancing AI solutions that are both environmentally sustainable and economically viable.
The Tyr Superchip is engineered to tackle the most daunting computational challenges in edge AI, autonomous driving, and decentralized AIoT applications. It merges AI and DSP functionalities into a single, unified processing unit capable of real-time data management and processing. This all-encompassing chip solution handles vast amounts of sensor data necessary for complete autonomous driving and supports rapid AI computing at the edge. One of the key challenges it addresses is providing massive compute power combined with low-latency outputs, achieving what traditional architectures cannot in terms of energy efficiency and speed. Tyr chips are surrounded by robust safety protocols, being ISO26262 and ASIL-D ready, making them ideally suited for the critical standards required in automotive systems. Designed with high programmability, the Tyr Superchip accommodates the fast-evolving needs of AI algorithms and supports modern software-defined vehicles. Its low power consumption, under 50W for higher-end tasks, paired with a small silicon footprint, ensures it meets eco-friendly demands while staying cost-effective. VSORA’s Superchip is a testament to their innovative prowess, promising unmatched efficiency in processing real-time data streams. By providing both power and processing agility, it effectively supports the future of mobility and AI-driven automation, reinforcing VSORA’s position as a forward-thinking leader in semiconductor technology.
The Ultra-Low-Power 64-Bit RISC-V Core by Micro Magic, Inc. is engineered to operate efficiently with minimal power consumption, making it a standout solution for high-performance applications. This processor core is capable of running at an impressive 5GHz, yet it only consumes 10mW at 1GHz, illustrating its capability to deliver exceptional performance while keeping power usage to a minimum. Ideal for scenarios where energy efficiency is crucial, it leverages advanced design techniques to reduce voltage alongside high-speed processing. Maximizing power efficiency without compromising speed, this RISC-V core is suited for a wide array of applications ranging from IoT devices to complex computing systems. Its design allows it to maintain performance even at lower power inputs, a critical feature in sectors that prioritize energy savings and sustainability. The core's architecture supports full configurability, catering to diverse design needs across different technological fields. In addition to its energy-efficient design, the core offers robust computational capabilities, making it a competitive choice for companies looking to implement high-speed, low-power processing solutions in their product lines. The flexibility and power of this core accentuate Micro Magic's commitment to delivering top-tier semiconductor solutions that meet the evolving demands of modern technology.
Functioning as a comprehensive cross-correlator, the XCM_64X64 facilitates efficient and precise signal processing required in synthetic radar receivers and advanced spectrometers. Designed on IBM's 45nm SOI CMOS technology, it supports ultra-low power operation at about 1.5W for the entire array, with a sampling performance of 1GSps across a bandwidth of 10MHz to 500MHz. The ASIC is engineered to manage high-throughput data channels, a vital component for high-energy physics and space observation instruments.
ISELED Technology introduces a revolutionary approach to automotive interior lighting with smart digital RGB LEDs. These LEDs facilitate dynamic lighting solutions by embedding a sophisticated driver directly with the LED, enabling unique features such as pre-calibration and independent temperature compensation. This innovation allows for significant simplification of the overall lighting system architecture as the intricate calibration tasks are handled at the LED module level. The ISELED system supports an expansive 4K address space, offering seamless integration into daisy-chained configurations and precise color control through a straightforward digital command interface. This approach not only enhances visual quality but also reduces the complexity typically associated with RGB LED configurations, eliminating the need for separate power management or additional calibration setups. ISELED’s robust design is particularly beneficial in automotive environments, where durability and dependability are crucial. The technology also extends to ILaS systems, providing interconnected networks of LEDs and sensors that are both energy-efficient and capable of rapid diagnostics and reconfiguration. In essence, ISELED technology allows automotive designers unprecedented flexibility and control over vehicle interior lighting designs.
Dillon Engineering's 2D FFT Core is specifically developed for applications involving two-dimensional data processing, perfect for implementations in image processing and radar signal analysis. This FFT Core operates by processing data in a layered approach, enabling it to concurrently handle two-dimensional data arrays. It effectively leverages internal and external memory, maximizing throughput while minimizing the impact on bandwidth, which is crucial in handling large-scale data sets common in imaging technologies. Its ability to process data in two dimensions simultaneously offers a substantial advantage in applications that require comprehensive analysis of mass data points, including medical imaging and geospatial data processing. With a focus on flexibility, the 2D FFT Core, designed using the ParaCore Architect, offers configurable data processing abilities that can be tailored to unique project specifications. This ensures that the core can be adapted to meet a range of application needs while maintaining high-performance standards that Dillon Engineering is renowned for.
The SAKURA-II AI accelerator is designed specifically to address the challenges of energy efficiency and processing demands in edge AI applications. This powerhouse delivers top-tier performance while maintaining a compact and low-power silicon architecture. The key advantage of SAKURA-II is its capability to handle vision and Generative AI applications with unmatched efficiency, thanks to the integration of the Dynamic Neural Accelerator (DNA) core. This core exhibits run-time reconfigurability that supports multiple neural network models simultaneously, adapting in real-time without compromising on speed or accuracy. Focusing on the demanding needs of modern AI applications, the SAKURA-II easily manages models with billions of parameters, such as Llama 2 and Stable Diffusion, all within a mere power envelope of 8W. It supports a large memory bandwidth and DRAM capacity, ensuring smooth handling of complex workloads. Furthermore, its multiple form factors, including modules and cards, allow for versatile system integration and rapid development, significantly shortening the time-to-market for AI solutions. EdgeCortix has engineered the SAKURA-II to offer superior DRAM bandwidth, allowing for up to 4x the DRAM bandwidth of other accelerators, crucial for low-latency operations and nimbly executing large-scale AI workflows such as Language and Vision Models. Its architecture promises higher AI compute utilization than traditional solutions, thus delivering significant energy efficiency advantages.
The XCM_64X64_A is a powerful array designed for cross-correlation operations, integrating 128 ADCs each capable of 1GSps. Targeted at high-precision synthetic radar and radiometer systems, this ASIC delivers ultra-low power consumption around 0.5W, ensuring efficient performance over a wide bandwidth range from 10MHz to 500MHz. Built on IBM's 45nm SOI CMOS technology, it forms a critical component in systems requiring rapid data sampling and intricate signal processing, all executed with high accuracy, making it ideal for airborne and space-based applications.
The M3000 Graphics Processor offers a comprehensive solution for 3D rendering, providing high efficiency and quality output in graphical processing tasks. It paves the way for enhancing visual performance in devices ranging from gaming consoles to sophisticated simulation systems. This processor supports an array of graphic formats and resolutions, rendering high-quality 3D visuals efficiently. Its robust architecture is designed to handle complex visual computations, making it ideal for industries that require superior graphical interfaces and detailed rendering capabilities. As part of its user-friendly design, the M3000 is compatible with established graphic APIs, allowing for easy integration and broad utility within existing technology structures. The processor serves as a benchmark for innovations in 3D graphical outputs, ensuring optimal end-user experiences in digital simulation and entertainment environments.
The Spiking Neural Processor T1 is an innovative ultra-low power microcontroller designed for always-on sensing applications, bringing intelligence directly to the sensor edge. This processor utilizes the processing power of spiking neural networks, combined with a nimble RISC-V processor core, to form a singular chip solution. Its design supports next-generation AI and signal processing capabilities, all while operating within a very narrow power envelope, crucial for battery-powered and latency-sensitive devices. This microcontroller's architecture supports advanced on-chip signal processing capabilities that include both Spiking Neural Networks (SNNs) and Deep Neural Networks (DNNs). These processing capabilities enable rapid pattern recognition and data processing similar to how the human brain functions. Notably, it operates efficiently under sub-milliwatt power consumption and offers fast response times, making it an ideal choice for devices such as wearables and other portable electronics that require continuous operation without significant energy draw. The T1 is also equipped with diverse interface options, such as QSPI, I2C, UART, JTAG, GPIO, and a front-end ADC, contained within a compact 2.16mm x 3mm, 35-pin WLCSP package. The device boosts applications by enabling them to execute with incredible efficiency and minimal power, allowing for direct connection and interaction with multiple sensor types, including audio and image sensors, radar, and inertial units for comprehensive data analysis and interaction.
The SiFive Intelligence X280 processor is crafted for the demands of AI and ML within edge computing environments. It integrates high-performance scalar and vector computing capabilities, making it ideal for data-heavy AI tasks like management, object detection, and speech processing. The X280 leverages the RISC-V architecture's open standards, bringing a high level of customizability and performance efficiency to AI applications. Equipped with SiFive's Matrix Engine, the X280 is capable of handling sophisticated AI workloads with its impressive maximum throughput of 16 TOPS for INT8 operations. This performance is achieved without compromising on power efficiency, maintaining a small footprint that makes it suitable for diverse deployment scenarios. The processor's scalability is a key feature, supporting vector lengths up to 512 bits to accommodate the demands of intensive machine learning operations. SiFive Intelligence X280 stands out for its role in reshaping the possibilities of AI at the edge, pushing forward the capabilities of machine learning with a comprehensive software and hardware integration. This approach ensures that the X280 can handle emerging AI challenges with ease, presenting a formidable solution for today's AI-driven applications.
The TCP/UDP/IP Network Protocol Accelerator Platform (NPAP) is designed to expedite data transmission while ensuring low latency across Ethernet links. With high-bandwidth capabilities, this platform supports a range of Ethernet speeds from 1G to 100G. The solution benefits from custom hardware acceleration, offloading TCP/UDP/IP tasks to FPGAs, thus freeing up CPU resources for other computational tasks. Significant improvements in network throughput and latency reduction are achieved by integrating complete TCP/UDP/IP connectivity into FPGAs, essential for high-performance applications without using a CPU at all. The NPAP platform offers a highly modular TCP/UDP/IP stack, adaptable to various processing environments. Capable of operating at full line rates in both FPGA (70 Gbps) and ASIC (over 100 Gbps) domains, the platform features 128-bit wide bi-directional data paths and streaming interfaces. It supports scalable processing with multiple parallel TCP engines, allowing seamless operations in data centers and SmartNICs while providing deterministic performance thanks to embedded hardware processing. An additional feature of NPAP is its comprehensive integration within a remote evaluation system. Users can test the platform's capabilities remotely through a dedicated lab, aiding in rapid evaluation without the need for extensive on-site hardware setups. This makes it highly beneficial for applications such as networked storage, iSCSI systems, and automotive backbones, where high data throughput and minimal delay are critical requirements.
The Universal Chiplet Interconnect Express (UCIe) by Extoll is a cutting-edge technology designed to meet the increasing demand for seamless integration of chiplets within a system. UCIe offers a highly efficient interconnect framework that underpins the foundational architecture of heterogeneous systems, enabling enhanced interoperability and performance across various chip components. UCIe distinguishes itself by offering an ultra-low power profile, making it a preferred option for power-sensitive applications. Its design focuses on facilitating high bandwidth data transfer, essential for modern computing environments that require the handling of vast amounts of data with speed and precision. Furthermore, UCIe supports a diverse range of process nodes, ensuring it integrates well with existing and emerging technologies. This innovation plays a pivotal role in accelerating the transition to advanced chiplet-based architectures, enabling developers to create systems that are both scalable and efficient. By providing a robust interconnect solution, UCIe helps reduce overall system complexity, lowers development costs, and improves design flexibility — making it an indispensable tool for forward-thinking semiconductor designs.
The eSi-ADAS IP suite is tailored to enhance radar processing for Advanced Driver Assistance Systems (ADAS). It includes a powerful radar co-processor engine that boosts the performance of radar systems used in automotive, drone, and UAV applications. The IP has gained adoption by prominent automotive suppliers and finds use in production vehicles, illustrating its reliability and effectiveness in real-world conditions. Key functionalities of eSi-ADAS encapsulate a wide range of radar hardware accelerators which enhance radar's performance capabilities, ensuring precise situational awareness.
The SiFive Performance family is tailored for maximum throughput in datacenter workloads, serving environments from web servers to networking and storage. This collection of processors boasts 64-bit, Out of Order (OoO) cores optimized for energy-efficient, high-performance computation. Designed to handle AI workloads with specific vector engines, the Performance processors offer a scalable core architecture, ranging from three-wide to six-wide out-of-order configurations. The P870-D processor, a standout in the Performance series, is engineered for datacenters and AI, supporting scalable compute density across multiple cores. Among other products, the Performance family includes the P650, P550, and P450, each offering varying multi-core and pipeline structures to cater to different workload needs. The blend of top-tier performance, compact footprint, and cost efficiency makes these processors an optimal choice for modern high-performance applications and environments. SiFive's Performance series is built to not only meet but surpass the demands of various markets, including mobile, consumer, datacenter, and industrial automation. It represents SiFive's commitment to advancing the scope of RISC-V technology, pushing boundaries in high-performance processing through careful design and innovation.
The Nerve IIoT Platform by TTTech Industrial is engineered to bridge the gap between real-time data and IT functionalities in industrial environments. This platform allows machine builders and operators to effectively manage edge computing needs with a cloud-managed approach, ensuring safe and flexible deployment of applications and data handling. At its core, Nerve is designed to deliver real-time data processing capabilities that enhance operational efficiency. This platform is distinguished by its integration with off-the-shelf hardware, providing scalability from gateways to industrial PCs. Its architecture supports virtual machines and network protocols such as CODESYS and Docker, thereby enabling a diverse range of functionalities. Nerve’s modular system allows users to license features as needed, optimizing both edge and cloud operations. Additionally, Nerve delivers substantial business benefits by increasing machine performance and generating new digital revenue streams. It supports remote management and updates, reducing service costs and downtime, while improving cybersecurity through standards compliant measures. Enterprises can use Nerve to connect multiple machines globally, facilitating seamless integration into existing infrastructures and expanding digital capabilities. Overall, Nerve positions itself as a formidable IIoT solution that combines technical sophistication with practical business applications, merging the physical and digital worlds for smarter industry operations.
The Software-Defined High PHY from AccelerComm is designed for adaptability and high efficiency across ARM processor architectures. This product brings flexibility in software-defined radio applications by facilitating easy optimization for different platforms, considering power and capacity requirements. It allows integration without hardware acceleration based on the needs of specific deployments.\n\nA key feature of the Software-Defined High PHY is its capability for customization. Users can tailor this IP to work optimally across various platforms, either independently or coupled with hardware-accelerated functionalities. This ensures the high-performance needed for modern network demands is met without unnecessary resource consumption.\n\nPerfect for scenarios needing O-RAN compliance, this PHY solution supports high adaptability and scalability for different use cases. It is ideal for developers who require robust communication solutions tuned for efficient execution in varying environmental conditions, contributing to lower latency and higher throughput in network infrastructures.
The ZIA DV700 Series is a high-performance AI processor designed by Digital Media Professionals Inc., providing extensive capabilities for deep learning inference on the edge. It is optimized for executing sophisticated neural network models efficiently, accommodating a wide range of AI applications. By incorporating advanced floating-point precision processing, the DV700 series enhances accuracy in areas where computational precision is pivotal. This processor series is particularly tailored for deployment in systems requiring reliable real-time decision-making capabilities, such as robotics and autonomous vehicles. It supports a variety of neural network frameworks, allowing for seamless integration with existing AI models and architectures, thus expanding its deployment flexibility in adaptive technology environments. The series also includes an adaptable software development kit to facilitate easy implementation and iterative testing of AI models. By supporting prevalent AI frameworks like TensorFlow and Caffe, it empowers developers to optimize their models for maximum performance and efficiency. The ZIA DV700 Series stands out as a competitive edge solution in high-stakes technological applications, ensuring superior operational standards in demanding projects.
The RISC-V Core IP developed by AheadComputing Inc. is designed to deliver exceptional performance for advanced computing applications. This processor is engineered to harness the full potential of the RISC-V architecture, providing a balance of power efficiency and processing capability that caters to the needs of modern computing environments. By leveraging the open-source RISC-V standard, this processor offers flexibility and customization opportunities, making it a versatile choice for various industries. AheadComputing's RISC-V Core IP is crafted with a focus on scalability and adaptability, ensuring that it can be integrated into a wide range of devices, from consumer electronics to complex industrial systems. The processor's architecture allows for simplifying hardware design while maintaining high performance, which is essential for applications that require quick data processing and seamless multitasking. The technical prowess of this RISC-V processor is evident in its ability to boost IPC (Instructions Per Cycle) performance, setting new benchmarks for speed and reliability. With a keen eye on the future, AheadComputing continues to refine its processor technology to align with emerging trends and demands, positioning its RISC-V Core IP as a key component in the evolution of future-ready computing solutions.
Dyumnin's RISCV SoC is built around a robust 64-bit quad-core server class RISC-V CPU, offering various subsystems that cater to AI/ML, automotive, multimedia, memory, and cryptographic needs. This SoC is notable for its AI accelerator, including a custom CPU and tensor flow unit designed to expedite AI tasks. Furthermore, the communication subsystem supports a wide array of protocols like PCIe, Ethernet, and USB, ensuring versatile connectivity. As for the automotive sector, it includes CAN and SafeSPI IPs, reinforcing its utility in diverse applications such as automotive systems.
A2e Technologies' JPEG FPGA cores are designed to deliver robust image compression across a wide range of FPGA systems. These cores support high-resolution JPEG baseline functionality with true grayscale support, making them ideal for various multimedia applications. Engineer-friendly, these cores facilitate swift deployment with interfaces that ensure easy integration into existing platforms. Offering remarkable speed, the JPEG FPGA Encoder compresses up to 140 Million pixels per second for different image formats using a Xilinx Spartan 6 FPGA, while requiring less than 500 slices. It incorporates multiple configurations to suit diverse video input needs, balancing a small form factor with maximum efficiency. The flexibility to handle image sizes up to 16K x 16K further underscores their adaptability, while the high-speed JPEG decoding capabilities ensure a seamless user experience for post-processing tasks. The cores adhere to JPEG compliance standards, with a range of features including support for different JPEG formats, fixed entropy tables, and programmable quantization tables for optimized image quality. By maintaining a consistent focus on performance and efficiency, A2e Technologies' JPEG FPGA cores hold a distinct edge in scenarios demanding rapid processing and low power consumption. Their modularity and customization options enhance their utility across various sectors including industrial automation, medical imaging, and digital multimedia applications.
The WiseEye2 AI solution by Himax represents a significant leap forward in AI-enhanced sensing for smart devices. Designed for low-power operation, this solution integrates a specialized CMOS image sensor with the HX6538 microcontroller to deliver high-performance AI capabilities with minimal energy consumption. This makes it ideal for battery-powered devices that require continual operation, facilitating a new generation of always-on AI solutions without the typical drain on battery life. Thanks to its ARM-based Cortex M55 CPU and Ethos U55 NPU, WiseEye2 offers robust processing while maintaining a compact profile. Its multi-layer power management architecture not only maximizes energy efficiency but also supports the latest advancements in AI processing, allowing for faster and more accurate inference. Additionally, its industrial-grade security features ensure that data remains protected, catering particularly well to applications in personal computing devices. By enhancing capabilities such as user presence detection and improving facial recognition functionalities, WiseEye2 helps devices intelligently interact with users over various scenarios, whether in smart home setups, security domains, or personal electronics. This blend of smart functionality with energy conscientiousness reflects Himax's commitment to innovating sustainable technology solutions.
Monolithic Microsystems represents a technological leap in integrated system design, featuring multiple micro-engineered elements within a single chip. This system leverages advanced CMOS technology to unify electronic, photonic, and micromechanical devices, creating a compact and efficient platform suited for a variety of applications. By integrating different functionalities within a single substrate, these Microsystems can enhance performance while reducing the overall system footprint. They are increasingly being used in fields such as telecommunications, medical devices, and consumer electronics, where precision, reliability, and miniaturization are of paramount importance.
The Cobra platform, based on the Xilinx Kintex-7 architecture, serves as a versatile development environment for testing and iterative designs of various IPs. This platform is tailored to optimize the prototyping and development processes by providing a high-performance FPGA foundation. The Kintex-7 series is known for its balance of high performance and logic capacity, making it suitable for a range of applications where precision and efficiency are crucial. Cobra facilitates seamless integration and testing of DisplayPort solutions, offering developers a convenient platform to validate designs prior to ASIC production. It supports comprehensive data management, encryption-verification processes, and multimedia operations all in one framework, reducing the design cycle and overall project costs. The platform is also equipped with advanced features for real-time signal processing and enhanced data throughput, catering to industries from automotive to broadcast technology. The Cobra platform, thus, accelerates the development timeline while continuing to maintain high fidelity and robust functionality necessary in modern electronic design workflows.
The RAIV General Purpose GPU (GPGPU) epitomizes versatility and cutting-edge technology in the realm of data processing and graphics acceleration. It serves as a crucial technology enabler for various prominent sectors that are central to the fourth industrial revolution, such as autonomous driving, IoT, virtual reality/augmented reality (VR/AR), and sophisticated data centers. By leveraging the RAIV GPGPU, industries are able to process vast amounts of data more efficiently, which is paramount for their growth and competitive edge. Characterized by its advanced architectural design, the RAIV GPU excels in managing substantial computational loads, which is essential for AI-driven processes and complex data analytics. Its adaptability makes it suitable for a wide array of applications, from enhancing automotive AI systems to empowering VR environments with seamless real-time interaction. Through optimized data handling and acceleration, the RAIV GPGPU assists in realizing smoother and more responsive application workflows. The strategic design of the RAIV GPGPU focuses on enabling integrative solutions that enhance performance without compromising on power efficiency. Its functionality is built to meet the high demands of today’s tech ecosystems, fostering advancements in computational efficiency and intelligent processing capabilities. As such, the RAIV stands out not only as a tool for improved graphical experiences but also as a significant component in driving innovation within tech-centric industries worldwide. Its pioneering architecture thus supports a multitude of applications, ensuring it remains a versatile and indispensable asset in diverse technological landscapes.
The Digital Radio (GDR) from GIRD Systems is an advanced software-defined radio (SDR) platform that offers extensive flexibility and adaptability. It is characterized by its multi-channel capabilities and high-speed signal processing resources, allowing it to meet a diverse range of system requirements. Built on a core single board module, this radio can be configured for both embedded and standalone operations, supporting a wide frequency range. The GDR can operate with either one or two independent transceivers, with options for full or half duplex configurations. It supports single channel setups as well as multiple-input multiple-output (MIMO) configurations, providing significant adaptability in communication scenarios. This flexibility makes it an ideal choice for systems that require rapid reconfiguration or scalability. Known for its robust construction, the GDR is designed to address challenging signal processing needs in congested environments, making it suitable for a variety of applications. Whether used in defense, communications, or electronic warfare, the GDR's ability to seamlessly switch configurations ensures it meets the evolving demands of modern communications technology.
Tensix Neo is a high-performance processor designed to accelerate AI tasks with remarkable efficiency. By optimizing for performance per watt, it caters to AI developers needing robust technology for power-intense projects. Its architectural design supports a wide range of precision formats, ensuring that varying AI workloads are managed effectively. Central to its design is a specialized Network-on-Chip (NoC) that facilitates highly efficient data transfer and communication, enabling scalable AI solutions. This NoC allows the processor to evolve alongside an ever-changing landscape of AI models and applications, making it an asset for developers focused on scalability. Tensix Neo is particularly suited for environments where adaptability and performance are crucial, such as large-scale data processing centers and real-time computational tasks. It provides the technological backbone needed for developing next-gen AI systems that require flexible and powerful processing capabilities.
The Trifecta-GPU is a sophisticated family of COTS PXIe/CPCIe GPU Modules by RADX Technologies, designed for substantial computational acceleration and ease of use in PXIe/CPCIe platforms. Powered by the NVIDIA RTX A2000 Embedded GPU, it boasts up to 8.3 FP32 TFLOPS performance, becoming a preferred choice for modular Test & Measurement (T&M) and Electronic Warfare (EW) systems. It integrates seamlessly into systems, supporting MATLAB, Python, and C/C++ programming, making it versatile for signal processing, machine learning, and deep learning inference applications. A highlight of the Trifecta-GPU is its remarkable computing prowess coupled with its design that fits within power and thermal constraints of legacy and modern chassis. It is available in both single and dual-slot variants, with the capability to dissipate power effectively, allowing users to conduct fast signal analysis and execute machine learning algorithms directly where data is acquired within the system. With its peak performance setting new standards for cost-effective compute acceleration, the Trifecta-GPU also supports advanced computing frameworks, ensuring compatibility with a myriad of applications and enhancing signal classification and geolocation tasks. Its hardware capabilities are complemented by extensive software interoperability, supporting both Windows and Linux environments, further cementing its position as a top-tier solution for demanding applications.
VisualSim Architect serves as a comprehensive platform for modeling and simulating complex systems, offering engineers a robust framework to analyze system performance, power, and functionality. The platform boasts a vast library of basic modeling constructs and supports multi-core execution, providing flexibility to integrate with external tools and languages. This integration helps in assembling graphical models using pre-defined, parameterized Technology IP blocks. These blocks are instrumental in simulating various use cases, optimizing architecture specifications, and generating detailed performance reports. One of the significant advantages of VisualSim Architect is its ability to forecast potential risks in system development, both from technical and business perspectives. It assists engineers in identifying and mitigating risks that could lead to product failures or underperformance. By facilitating early-stage design optimizations, VisualSim Architect effectively shortens the time-to-market for new products. The platform is also designed to be operating system-agnostic, running seamlessly on Windows, Linux, and Mac OS/X platforms, which ensures broad accessibility for diverse user bases. Moreover, VisualSim Architect supports a collaborative development environment, allowing system models to be shared and viewed within a web browser. This capability fosters internal and external collaboration, making it easier for teams to discuss and refine ongoing projects. The system’s batch mode further enables large-scale system analysis through offline scripting and results storage, ensuring scalability and efficiency in modeling tasks.
The Atrevido core is a highly customizable 64-bit out-of-order RISC-V processor. It is adaptable for multiprocessor environments, supporting 2/3/4-wide configurations. Designed for intensive machine learning and HPC applications, it integrates seamlessly with vector units, capitalizing on its inherent capability to manage sparse datasets and reduce memory latency through Semidynamics' proprietary Gazzillion Misses™ technology. The core supports high-bandwidth memory systems, making it ideal for environments requiring efficient data handling and processing. Atrevido's architecture includes a range of sophisticated features such as direct support for unaligned accesses and comprehensive register renaming capabilities. Further, its compatibility with standard Linux environments and support for RISC-V vector specifications underscore its versatility. Applications in AI use its ability to decode multiple instructions per cycle, supporting both complex matrix operations and real-time processing needs. The core's capability to integrate with Semidynamics' Vector Unit offers additional computing power, enhancing its performance in tasks requiring parallel data processing. This combination makes it suitable for dense computational tasks, such as those found in recommendation systems and key-value stores, providing a robust platform that scales efficiently across various industry needs.
The Pipelined FFT Core by Dillon Engineering is architected to provide continuous processing capabilities for streaming FFT calculations. It adopts a linear, pipe-like structure where each calculation stage directly passes data to the next, ensuring that real-time data can flow uninterrupted through the pipeline. This makes it an ideal choice for real-time applications requiring minimal latency, such as live audio and video streaming, and high-frequency financial trading platforms. By maintaining a streamlined data pathway, the core minimizes delays traditionally associated with FFT computation, enhancing overall system responsiveness. Adopting a serial processing approach, the Pipelined FFT Core utilizes a single butterfly per rank in its design, optimizing for applications where resources are limited, but speed remains crucial. Dillon's design ensures that even with high-complexity data loads, the core performs reliably, making it a valuable component for modern digital systems.
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