All IPs > Multimedia > AV1
AV1 semiconductor IPs have become a pivotal component in the realm of multimedia processing. As a next-generation video codec developed by the Alliance for Open Media (AOMedia), AV1 is designed to deliver high-quality video experiences at remarkably efficient bitrates. This makes it particularly appealing for applications that demand top-tier video quality without compromising on data transmission efficiency, such as streaming services, video conferencing platforms, and various forms of digital media broadcasting.
In the rapidly evolving tech landscape, the demand for efficient data processing and transmission is paramount. AV1 semiconductor IPs offer an innovative solution by significantly reducing the bandwidth requirements for video streaming. This enables smoother delivery of high-resolution content over constrained networks, making AV1 an attractive choice for content providers aiming to deliver superior user experiences. Additionally, the open-source nature of AV1 allows for widespread adoption and adaptation across various applications and platforms.
Products within this category typically include encoder and decoder IP cores optimized for AV1 video processing. These cores are engineered to handle complex encoding tasks that efficiently compress video data without sacrificing quality, playing a crucial role in enabling high-definition streaming even at lower bitrates. As digital media consumption continues to surge, AV1 semiconductor IPs are expected to play an integral role in supporting the technological backbone necessary for emerging multimedia applications, mobile devices, and smart TVs.
Moreover, as part of a broader ecosystem, AV1 complements existing multimedia systems by providing a scalable and cost-effective solution for next-level video coding. This IP's inclusion in multimedia product offerings bridges the gap between burgeoning consumer demands and the technological requirements of the digital age. Its implementation not only ensures compatibility with modern standards but also provides a future-proof option for developers and manufacturers investing in cutting-edge multimedia solutions.
ISPido represents a fully configurable RTL Image Signal Processing Pipeline, adhering to the AMBA AXI4 standards and tailored through the AXI4-LITE protocol for seamless integration with systems such as RISC-V. This advanced pipeline supports a variety of image processing functions like defective pixel correction, color filter interpolation using the Malvar-Cutler algorithm, and auto-white balance, among others. Designed to handle resolutions up to 7680x7680, ISPido provides compatibility for both 4K and 8K video systems, with support for 8, 10, or 12-bit depth inputs. Each module within this pipeline can be fine-tuned to fit specific requirements, making it a versatile choice for adapting to various imaging needs. The architecture's compatibility with flexible standards ensures robust performance and adaptability in diverse applications, from consumer electronics to professional-grade imaging solutions. Through its compact design, ISPido optimizes area and energy efficiency, providing high-quality image processing while keeping hardware demands low. This makes it suitable for battery-operated devices where power efficiency is crucial, without sacrificing the processing power needed for high-resolution outputs.
The KL720 AI SoC stands out for its excellent performance-to-power ratio, designed specifically for real-world applications where such efficiency is critical. Delivering nearly 0.9 TOPS per Watt, this chip underlines significant advancement in Kneron's edge AI capabilities. The KL720 is adept for high-performance devices like cutting-edge IP cameras, smart TVs, and AI-driven consumer electronics. Its architecture, based on the ARM Cortex M4 CPU, facilitates high-quality image and video processing, from 4K imaging to natural language processing, thereby advancing capabilities in devices needing rigorous computational work without draining power excessively.
The JPEG XS Encoder/Decoder by TMC is a cutting-edge compression solution that provides virtually lossless, low-latency encoding ideal for modern video applications requiring high-speed data handling. It's particularly suited for environments where rapid transmission of high-resolution images is crucial, such as in remote sensing and real-time video analytics. Leveraging the efficiency of JPEG XS, TMC's solution excels in delivering high-quality image compression without sacrificing clarity or speed. TMC's JPEG XS solution facilitates efficient broadcasting, telemedicine, and video production workflows. It manages large-volume data by supporting a wide array of image formats and resolutions, making it versatile across multiple domains. The encoder and decoder maintain high throughput performance, even when compactly implemented in FPGA hardware, significantly minimizing costs by eliminating the need for external memory. The design's simplicity ensures easy integration into existing systems, shortening development timelines and enabling faster time-to-market. This solution supports ISO/IEC21122-1 and offers flexible compression settings that can be tailored to specific needs, enhancing both functionality and adaptability across various technological landscapes.
The HDR Core is engineered to deliver enhanced dynamic range image processing by amalgamating multiple exposures to preserve image details in both bright and dim environments. It has the ability to support 120dB HDR through the integration of sensors like IMX585 and OV10640, among others. This core applies motion compensation alongside detection algorithms to mitigate ghosting effects in HDR imaging. It operates by effectively combining staggered based, dual conversion gain, and split pixel HDR sensor techniques to achieve realistic image outputs with preserved local contrast. The core adapts through frame-based HDR processing even when used with non-HDR sensors, demonstrating flexibility across various imaging conditions. Tone mapping is utilized within the HDR Core to adjust the high dynamic range image to fit the display capabilities of devices, ensuring color accuracy and local contrast are maintained without introducing noise, even in low light conditions. This makes the core highly valuable in applications where image quality and accuracy are paramount.
This highly integrated core from Soft Mixed Signal Corporation combines advanced technologies to deliver a robust gigabit Ethernet transceiver designed for both fiber and copper mediums. The transceiver is compliant with IEEE 802.3z standards and incorporates unique features such as a 10-bit controller interface for bidirectional data paths, ensuring reliable and fast data transmission. It integrates various high-speed drivers along with clock recovery digital logic, phase-locked and delay-locked loop architectures, serializer/deserializer modules, and low-jitter PECL interfaces. This makes it an ideal solution for network systems requiring consistent performance under demanding conditions. The transceiver is tailored for low cost and low power CMOS processes, offering both 75 and 50 Ohm termination compatibility, and includes optional embedded Bit Error Rate Testing (BER), enhancing its utility in complex environments. It is mainly designed to optimize data alignment and ensure effective jitter performance, positioning it as a distinctive asset for advanced Ethernet networking solutions.
HEVC/H.265 Main/Main10/ Main Still Picture Profile @L5.2 AVC/H.264 BP/CBP/MP/HP/HP10 @L5.2 Capable of encoding up to 8K ((8192x4096) A 32-bit AMBA3 APB bus for host CPU system control 128-bit AMBA3 AXI for data transfer (Optionally, additional secondary AXI) Latency tolerance Low power consumption Programmability Configurable IP Multi-instances Frame buffer compression (CFrame) Rotation & Mirroring Bit-depth & chroma sub-sample conversion Background detection 3DNR Lambda table QP Map Custom mode decision, etc.
The Advanced Video Transmission Toolkit (FV-VTT) from FastVDO is a cutting-edge solution designed to simulate video encoding, forward error correction (FEC), transmission channels, and video quality assessment. This toolkit supports popular video standards like H.264, H.265, H.266, and AV1, along with advanced FECs such as Polar, LDPC, and Turbo codes used in Wifi and 5G standards. Incorporating diverse channel models like AWGN, Rayleigh fading, and burst error channels, FV-VTT is a comprehensive package for video transmission analysis. By accurately simulating varying conditions and assessing received video quality, this toolkit aids in the development of robust video transmission systems capable of maintaining fidelity across different environments. FastVDO's toolkit is instrumental for developers and researchers focused on optimizing video communication technologies, offering insights to improve video delivery and quality in real-world applications. This innovative product embodies FastVDO's commitment to advancing multimedia communication standards, providing powerful tools for video engineers.
The G-Series Controller from MEMTECH is designed for applications requiring high memory bandwidth, such as graphics processing, AI video processing, and gaming. This GDDR6 solution supports dual 16-channel configurations with speeds reaching up to 20 Gbps, making it an ideal solution for compute-intensive tasks that demand swift data handling and processing. Advanced scheduling engines enhance its efficiency by optimizing throughput, while hardware auto-initialization and comprehensive error correction modes ensure error-free operation and data integrity. G-Series Controllers boast a DFI 5.0 interface, allowing easy integration with memory systems and reducing development complexities. G-Series Controllers are crafted to meet high-performance computing and graphics needs within tight power budgets, delivering enhancements in latency and speed without requiring a large footprint. As a fully optimized controller, it provides exceptional performance for advanced computing environments where power and space are precious resources.
HEVC/H.265 - Main/Main10 Profile @L5.1 AVC/H.264 - BP/CBP/MP/HP/HP10 Profile @ L5.2 Capable of decoding up to 4K60fps (8192x4096) A 32-bit APB bus and 128-bit AMBA3 AXI buses (w/ additional secondary AXI) Burst Write Back Map converter Low delay Low power consumption Configurable IP Latency tolerance Programmability Multi-instances Frame buffer compression (CFrame) Secondary AXI interfaces Downscaler (on-the-fly mode)
Video Codec Standard HEVC/H.265: Main profile @ L5.1 High tier AVC/H.264: Baseline/Constrained Baseline/Main/High profile @ L5.2 Performance 4K60fps@500MHz Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (Optional AXI can be used to alleviate bandwidth usage.)
Video Codec Standard AV1: Main profile @ L5.1 HEVC: Main/Main10 profile, Main/Main 10 Still Picture profile @ L5.1 High tier AVC: Baseline/Constrained Baseline/Main/High/High 10 profile @ L5.2 (Interlaced coding tools are not supported) Performance 4K60fps@500MHz Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P/B picture encoding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer * Optional AXI can be used to alleviate bandwidth usage
The H.264 Encoder from VISENGI sets a benchmark for high-performance video compression, designed with precision to excel in delivering industry-leading pixel throughput rates. This state-of-the-art encoder uniquely enables UltraHD 4K 60fps on lower-end FPGAs and supports 8K 30fps on mid-tier devices such as the Arria 10 and Zynq FPGAs. With two distinct variants, the compact H264E-I caters to applications needing smaller IP cores without external memory dependencies, while the H264E-P offers enhanced compression for applications requiring optimized data management. Both variants encode more than 5.2 pixels per cycle, ensuring unparalleled speed and efficiency in video processing.\n\nVersatility is a core component of VISENGI's H.264 Encoder, supporting resolutions from QVGA to 8K. The single-engine design promotes minimal latency, crucial for real-time video applications, while maintaining full color fidelity with color subsampling options including 4:4:4, 4:2:2, and 4:2:0 inputs. This guarantees vibrant, true-to-life color reproduction. The Encoder's adaptability extends to real-time control features such as configurable VBR/CBR modes, allowing users comprehensive command over video quality and data size, maximizing resource use and compatibility.\n\nExemplifying cutting-edge flexibility, VISENGI's H.264 Encoder is prepared for future advancements beyond the current maximum level 6.2 of H.264 specifications. Its design incorporates advanced parallel encoding capabilities with streamlined industry-standard interfaces, such as AXI-Lite and AXI3/4. The model emphasizes comprehensive user control options, ensuring superior video compression suited to dynamic technological landscapes.
MPEG-H Audio, pioneered by Fraunhofer IIS, is an advanced audio solution tailored for the evolving demands of television and virtual reality (VR) environments. It enhances user experiences by delivering immersive 3D soundscapes and providing greater interactivity through personalizable features. For broadcasters, MPEG-H Audio offers a remarkably flexible setup, allowing for seamless integration with existing broadcasting systems while ensuring compatibility with various formats and platforms. One of its standout features is the ability to adapt audio output to specific environments or user preferences, such as adjusting the volume of commentary during a sports broadcast or enhancing dialogue clarity in films. This is achieved through the system's object-based audio technology, enabling precise sound positioning and dynamic adjustments in real-time. MPEG-H Audio also supports a wide range of operating environments, from high-definition TVs to intricate VR setups, including headsets and specialized sound systems. It is designed with forward compatibility in mind, which means it is well-prepared for integration with future audio advancements and standards. Across the globe, MPEG-H Audio is recognized as a key component for delivering high-quality audio experiences, emphasizing Fraunhofer IIS's leadership in audio technology innovation.
Video Codec Standard AV1: Main profile @ L5.1 Main tier 50Mbps HEVC/H.265: Main/Main 10 profile @ L5.1 High tier AVC/H.264: Baseline/Constrained Baseline/Main/High/High10 profile @ L5.2 (Interlaced coding tools are not supported.) VP9 (Decoder only): Profile 0 and Profile 2 (12-bit not supported) Performance 4K60fps@500MHz with a single-core Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (Optional AXI can be used to alleviate bandwidth usage.)
TicoRAW FPGA/ASIC IP Cores are at the forefront of RAW image compression, offering exceptional efficiency for handling high-resolution image and video data. Ideal for use with next-generation image sensors, these IP cores maximize image quality while minimizing the bandwidth required for data transmission and storage. The distinctive feature of TicoRAW is its ability to maintain the highest levels of detail and color integrity across the luminance and chrominance spectrum, making it perfectly suited for high-dynamic-range imaging and high frame rate environments. This performance is critical in industries such as digital cinema, broadcasting, and surveillance, where preserving RAW data quality is paramount. Additionally, TicoRAW enables real-time processing with low power consumption, making it an excellent choice for portable and embedded applications. It supports a wide range of resolutions and frame rates, up to 200 megapixels, ensuring compatibility with various modern imaging devices. The ability to integrate seamlessly into existing workflows makes it a staple for professionals looking to advance their imaging capabilities significantly.
Video Codec Standard AV1: Main profile @ L6 High tier HEVC/H.265: Main/Main10 profile @ L6 High tier AVC/H.264: Baseline/Constrained Baseline/Main/High/High 10 profile @ L6 Performance 4K120fps@500MHz with a dual-core 4K240fps@1GHz or 8K60fps@1GHz with a dual-core Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (Optional AXI can be used to alleviate bandwidth usage.)
Video Codec Standard AV1: Main/High profile @ L6 Main tier 50Mbps Professional profile except 12-bit @ L6 Main tier 50Mbps Mono/YUV420/YUV422/YUV444 8-/10-bit HEVC/H.265: Main/Main 10/Main 4:2:2 10 profile @ L6 High tier Main 4:4:4/Main 4:4:4 10 profile @ L6 High tier (Only support 4:2:0 coding tools, high precision weighted prediction, and chroma QP offset list) AVC/H.264: Baseline/Constrained Baseline/Main/High/High10 profile @ L6 High 10 Intra/High 4:2:2/High 4:2:2 Intra profile with frame_mbs_only_flag = 1 @ L6 High 4:4:4 Predictive/High 4:4:4 Intra/CAVLC 4:4:4 Intra profile @ L6 with: frame_mbs_only_flag = 1 bit_depth_luma ≤ 10 bit_depth_chroma ≤ 10 frame_mbs_only_flag = 1 and qpprime_y_zero_transform_bypass_flag = 0 VP9 (Decoder only): Profile 0 and Profile 2 (12-bit not supported), YUV420 8/10-bit Performance 4K120fps@500MHz with a dual-core 4K240fps@1GHz or 8K60fps@1GHz with a dual-core Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Rotate/Mirror Down-scaler Crop Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (optional AXI can be used to alleviate bandwidth usage.)
The Video Anonymization tool by Gyrus AI offers privacy protection by automatically masking or blurring personal data in video content. Ideal for ensuring compliance with regulations such as GDPR, this technology enables secure analysis and sharing without compromising video integrity. Its AI-driven capabilities detect and obscure faces, number plates, and other sensitive information, making it indispensable for sectors requiring confidentiality. This tool uses intelligent filters to apply blur dynamically, tailoring the intensity based on the detected objects' distance and size. Beyond simple blurring, it can replace faces with synthetic characters, maintaining essential non-identifying attributes like age, gender, and expression. These features ensure that analyses like emotion and gaze tracking remain possible while preserving anonymity. Gyrus AI's solution is designed to handle large volumes of video efficiently, achieving rapid processing speeds with minimal human intervention. The result is a substantial reduction in labor and time costs, as it streamlines the anonymization process without sacrificing accuracy. Additionally, the integration capabilities ensure smooth deployment into existing workflows, making it a robust choice for organizations needing swift and reliable privacy solutions.
Video Codec Standard HEVC: Main/Main Still Picture profile @ L5.1 High tier AVC: Baseline/Constrained Baseline/Main/High profiles @ L5.2 Performance 4K60fps@500MHz Max resolution: 8192 x 4096 Min resolution: 256 x 128 Bit depth: 8-bit Features Multi-instances Frame-buffer compression (CFrame) In-loop filter Rotation & Mirroring Bit depth & chroma sample format conversion Lossless coding Background coding Down-scaler (On-the-fly mode) MapConverter 3DNR, etc. Interface 32-bit AMBA3 APB bus 128-bit AMBA3 AXI buses Primary AXI interface and an optional secondary AXI interface
Video Codec Standard HEVC/H.265: Main profile @ L5.1 High tier AVC/H.264: Baseline/Constrained Baseline/Main/High profile @ L5.2 Performance 4K60fps@500MHz with a single-core Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (Optional AXI can be used to alleviate bandwidth usage.)
The JPEG 2000 CODEC by intoPIX provides an advanced compression solution designed for high-fidelity image and video applications. With its superior compression algorithms, the JPEG 2000 CODEC achieves excellent video quality at variable bit rates, making it highly effective for applications that demand both efficiency and fidelity. Supporting a wide range of color spaces and resolutions, from standard definition to Ultra HD 8K, the codec excels in digital cinema, broadcast, and archival storage needs. Its progressive compression capability provides users with the flexibility to decode images at various quality levels depending on bandwidth and storage constraints. The JPEG 2000 CODEC is known for its robustness in handling large files and its resilience to error, providing high reliability for critical media applications. It seamlessly integrates with other technologies, supporting easy adaptation to evolving media environments and ensuring intoPIX’s JPEG 2000 solutions remain at the forefront of media processing technologies.
The TicoXS FPGA/ASIC IP Cores from intoPIX represent a groundbreaking technology for high-efficiency video compression. These IP cores utilize the JPEG XS standard to deliver ultra-low latency and visually lossless compression, making them ideal for latency-sensitive applications such as live production and broadcasting. The technology is engineered to operate at the speed of light, offering a near-zero latency experience. TicoXS is incredibly efficient in terms of resource usage, allowing for the implementation in even the smallest FPGA and ASIC devices while ensuring high-quality image outputs. The compression technology supports a range of video resolutions from HD to 8K, with flexibility in color sampling and bit depths, covering diverse industry needs from professional audio-visual environments to automotive and machine vision applications. Moreover, intoPIX's TicoXS provides significant compression without compromising visual quality, thanks to its lightweight coding approach. This allows organizations to maintain bandwidth efficiency, saving costs associated with data transport and storage. The IP cores are highly configurable, supporting various pixel formats, frame rates, and networking standards, facilitating easy integration into existing and future video processing workflows.
Video Codec Standard AV1: Main profile @ L6 Main tier 50Mbps HEVC/H.265: Main/Main10 profile @ L6 High tier AVC/H.264: Baseline/Constrained Baseline/Main/High/High 10 profile @ L6 VP9 (Decoder only): Profile 0 and Profile 2 (12-bit not supported) Performance 4K120fps@500MHz with a dual-core 4K240fps@1GHz or 8K60fps@1GHz with a dual-core Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (Optional AXI can be used to alleviate bandwidth usage.)
Video Codec Standard AV1: Main Profile @ L5.1 Performance 4K60fps@500MHz Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit-depth and YUV format conversion of the source picture Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer * Optional AXI can be used to alleviate bandwidth usage
Decoding/Encoding Tools Support Extended Sequential ISO/IEC 10918-1 JPEG compliance Support one or three color components Three components in a scan (interleaved only) 8-bit and 12-bit samples for each component Support 4:2:0, 4:2:2, 4:4:0, 4:4:4 and 4:0:0 color formats Max. six 8x8 blocks in one MCU Support NV12/NV16/NV24 (CbCr Interleaved), NV21/NV61/NV42 (CrCb Interleaved) Support from 16 x 16 to 32K x 32K (32,768 x 32,768) image size Packed mode is supported 12-bit PPM format is supported Value-added Features Partial mode for encoding and decoding On-the-fly rotator/mirror ROI(Region of Interest) for decoding On-the-fly downsampler for decoding Color format converting for decoding Performance Decode up to 290M pix/s for 4:2:0 color format Encode up to 290M pix/s for 4:2:0 color format Operating clock frequency: 200MHz Ease of integration AMBA 32-bit APB (w/ PREADY) interface for communication with a host processor AMBA 64-bit AXI interface for the external memory
Supported standards for Decoder ISO/IEC23008-2 HEVC/H.265, ITU-T Rec. H.265 Main/Main10 Profile L5.1 AVC/H.264 BP/CBP/MP/HP/HP10 Profile @ L5.2 AVS2 Main/Main10 Profile @L8.0.60 Main performance 4K(3840x2160) 60fps @ 450MHz Max. resolution: 8192x4096 Features Frame buffer compression (CFrame) Embedded Post-processing (w/Down-scaler) Low delay Low power consumption Latency tolerance Interface AMBA 32-bit APB interface for Host CPU AMBA 128-bit AXI interface for the external memory
Brief specification HEVC/H.265 Main/Main10 Profile @L5.1 AV1 Main Profile @ L5.1 VP9 Profile 0/ Profile 2 @L5.1 AVC/H.264 BP/CBP/MP/HP/HP10 Profile @ L5.2 AVS2 Main/Main10 Profile @L8.0.60 Main performance 4K(3840x2160) 60fps @ 450MHz Max. resolution: 8192x4096 System I/F A 32-bit APB bus and 128-bit AMBA3 AXI buses (w/additional Secondary AXI) Burst Write Back (BWB) Features Frame buffer compression (CFrame) Embedded Post-processing (w/Down-scaler) Low delay Low power consumption Latency tolerance
HEVC/H.265 Main/Main10 Profile @L5.1 AVC/H.264 BP/CBP/MP/HP/HP10 Profile @ L5.2 VP9 Profile 0/Profile 2 (HBD) AVS2 Main10 Profile @L8.0.60 Capable of decoding up to 4Kp60 (8192x4096) A 32-bit APB bus and 128-bit AMBA3 AXI buses (w/ additional secondary AXI) Burst Write Back Map converter Low delay Low power consumption Configurable IP Latency tolerance Programmability Multi-instances Frame buffer compression (CFrame) Downscaler (on-the-fly mode)
High-resolution Image Processing IP Performance 4K60p@400MHz (600MHz for display interface) Features Support various color format : YUV420, YUV422, YUV444, and RGB Up-/Down-scaler x1/8~x8 : selectable scaler algorithm with Bi-cubic and Lanczos Two scalers, connected to DRAM and display/direct I/F respectively, operating at different ratios at the same time (configurable to one scaler option) Color space conversion : YUV2RGB and RGB2YUV, coefficient downloadable Optional features Crop and digital zoom : scaling on cropped region Flip : horizontal and vertical 3rd Party interfaces: such as AFBC v1.2 and PVRIC v4 (support output only) Interface Display Interface : 3 channels for components with vertical/horizontal sync signal (ITU-R BT.601 compatible) Direct Interface (optional feature) : On-the-fly interface based on ready-valid protocol Support CF10 (Chips&Media’s Frame buffer compression) for Chips&Media video codec Support AFBC v1.2 and PVRIC v4 (optional feature) for output of MAPI
H.264, MVC, VP8, MPEG-1/2/4, VC-1, AVS, AVS+, H.263, Sorenson Decoding and encoding support at 1080p 60fps Supported standards for Decoder ISO/IEC 14496-10 AVC/H.264 BP/MP/HP@L4.2 ISO/IEC 14496-10/5 MVC Stereo High Profile@L4.1 ISO/IEC 14496-2 MPEG-4 SP,ASP@L6 SMPTE 421M-2006 VC-1 SP/MP/AP@L3 ISO/IEC 13818-2 MPEG-2 MP@HL ITU-T H.263(Annex I,J,K,T) AVS Jizhun @L6.2 AVS+ Guangdian @L6.2 On2 VP8 Sorenson Spark Theora Supported standards for Encoder ISO/IEC 14496-10 AVC/H.264 BP/MP/HP@L4.2 ISO/IEC 14496-10/5 MVC Stereo High Profile@L4.1 ISO/IEC 14496-2 MPEG-4 SP@L6 ITU-T H.263(Annex J,K,T) Supported Max. Resolution Supports up to 2048x2048 resolution Performance Single-stream H.264 HD(1920x1080p) 30fps decoding at <133MHz core clock H.264 HD(1920x1080p) 60fps decoding at <266MHz core clock H.264 HD(1920x1080p) 30fps encoding at <133MHz core clock H.264 HD(1920x1080p) 60fps encoding at <266MHz core clock Multi-stream Dual H.264 HD(1920x1080p) 30fps decoding at <266MHz core clock Dual H.264 HD(1920x1080p) 30fps encoding at <266MHz core clock 6SD/D1(NTSC&PAL) 30fps decoding at <133MHz core clock Full HD(1080p) encoding and decoding at <266MHz core clock Encoding Tools Selective [+/-64,+/-48] Quarter-pel and half-pel accuracy motion estimation using a full- search algorithm Flexible bit-rate control CBR VBR Fixed QP CABAC/CAVLC for AVC/H.264 Built-in pre- rotation/mirroring function 90xn degree rotation Vertical/horizontal mirroring Decoding Tools CABAC/CAVLC for AVC/H.264 MPEG-4 AC/DC prediction AVC/H.264 intra-prediction In-loop deblocking filter for H.264, H.263, and AVS Overlapped smoothing filter for VC-1 Built-in post-processing function 90xn degree rotation Vertical/horizontal mirroring De-ringing De-blocking filter for MPEG-2/4 Interface AMBA 32-bit APB interface for Host CPU AMBA 64-bit AXI interface for the external memory
The TM7606/7 Series is a sophisticated low-latency video transmission system optimized for use over general communication networks like the Internet or mobile infrastructures. This system accommodates two-channel video transmission and is equipped with features such as visibility enhancement and SRT functions, making it an ideal solution for remote control operations and diverse monitoring tasks. Compatible with SDI and HDMI inputs and outputs, the system achieves a low latency of 0.1 seconds, ensuring seamless and high-quality video transmission. Its compact design, weighing under 2.1 lbs and measuring only 1.69 x 5.12 x 6.69 inches, offers portability without compromising performance. The encoder supports dual 3G-SDI input channels with dual encoding capabilities, allowing for the simultaneous compression of video streams with different quality settings. The decoder offers dual HDMI outputs, delivering flexibility in playback. Moreover, the advanced visibility enhancement functionality corrects image issues such as blackouts and whiteouts, enhancing clarity even under challenging conditions. The system's SRT capability mitigates packet loss, crucial for maintaining video integrity during transmission. The TM7606/7 is supported by TMC's proprietary codec, ensuring data security and compatibility with other TMC systems.
H.264, MVC, VP8, MPEG-1/2/4, VC-1, AVS, AVS+, H.263, and Sorenson decoder HW IP for 2Kp60, 4:2:0 Standards AVC/H.264 BP/CBP/MP/HP L.4.1 Max: 1920x1088; Min: 16x16 MVC SHP L.4.1 Max: 1920x1088; Min: 16x16 MPEG-4 SP/ASP L.5 Max: 1920x1088; Min: 16x16 H.263 Profile 3 Max: 1920x1088; Min: 16x16 VC-1 SP/MP/AP L.3 Max: 1920x1088 or 2048x1024 Min: 16x16 MPEG-1/2 MP L.high Max: 1920x1088; Min: 16x16 Sorenson Spark Max: 1920x1088; Min: 16x16 VP8 WebM/WebP Max: 1920x1088; Min: 16x16 Theora Max: 1920x1088; Min: 16x16 AVS Jizhun/Guangdian L6.2 Max: 1920x1088; Min: 16x16 Features Frame buffer compression (CFrame) Low delay decoding Configurable IP Programmability Low power consumption Frame-based processing Multi-instances Latency tolerance Burst Write Back Down-scaler (on-the-fly mode) Map converter MPEG-2/4 De-ringing Built-in de-blocking filter A 32-bit AMBA3 APB bus and 64-bit AMBA3 AXI buses (w/additional Secondary AXI buses)
Video Codec Standard HEVC: Main/Main10 profile @ L6 High tier AVC: Baseline/Constrained Baseline/Main/High/High 10 profile @ L6 (Interlaced coding tools are not supported) Performance 4K120fps@500MHz or 8K60fps@1GHz Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P/B picture encoding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer *Optional AXI can be used to alleviate bandwidth usage
Video Codec Standard HEVC: Main/Main Still Picture profile @ L5.1 High tier AVC: Baseline/Constrained Baseline/Main/High profiles @ L5.2 Performance 4K60fps@500MHz Max resolution: 8192 x 4096 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Multi-instances Frame-buffer compression (CFrame) In-loop filter Rotation & Mirroring Bit depth & chroma sample format conversion Lossless coding Background coding MapConverter 3DNR, etc. Interface 32-bit AMBA3 APB bus 128-bit AMBA3 AXI buses Primary AXI interface and an optional secondary AXI interface
Video Codec Standard HEVC: Main/Main Still Picture profile @ L5.1 High tier AVC: Baseline/Constrained Baseline/Main/High profiles @ L5.2 Performance 4K60fps@500MHz Max resolution: 8192 x 4096 Min resolution: 256 x 128 Bit depth: 8-bit Features Multi-instances Frame-buffer compression (CFrame) In-loop filter Rotation & Mirroring Bit depth & chroma sample format conversion Lossless coding Background coding 3DNR, etc. Interface 32-bit AMBA3 APB bus 128-bit AMBA3 AXI buses Primary AXI interface and an optional secondary AXI interface
Video Codec Standard HEVC/H.265: Main/Main 10 profile @ L6 High tier AVC/H.264: Baseline/Constrained Baseline/Main/High/High 10 profile @ L6 Performance 4K120fps@500MHz or 8K30fps@500MHz with a dual-core 4K240fps@1GHz or 8K60fps@1GHz with a dual-core Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit-depth and YUV format conversion of the source picture Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (optional AXI can be used to alleviate bandwidth usage.)
Allegro DVT offers a state-of-the-art AV1 Decoder that provides support for 12-bit pixel depth and 4:4:4 chroma subsampling, catering to high-end video processing needs. This decoder is optimized for new-generation applications that demand excellent video clarity and color fidelity. AV1, being an open and royalty-free video coding format, is pivotal for efficient video streaming and high-definition video delivery. The decoder is designed to handle substantial video data rates and resolutions, providing a solution for applications from online streaming to broadcast media. With enhanced processing capabilities, it ensures that users can take full advantage of the AV1 format, experiencing the best possible visual detail within the smallest data footprint. Its architecture emphasizes minimizing power consumption while maximizing performance, making it suitable for a variety of platforms seeking to incorporate cutting-edge video standards. Developers striving for high-quality video playback in bandwidth-limited scenarios will find this decoder incredibly valuable.
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