All IPs > Graphic & Peripheral > Receiver/Transmitter
The Receiver/Transmitter semiconductor IP category is a vital component of the Graphics & Peripheral domain, offering crucial connectivity solutions for a wide range of electronic devices. These IPs are designed to support seamless communication between various hardware elements, ensuring efficient data transfer and processing. As the demand for high-speed data exchange continues to rise, the importance of robust Receiver and Transmitter circuits becomes increasingly evident, making this category indispensable for modern electronics.
Semiconductor IPs in this category are engineered to handle diverse applications, such as integrating peripheral devices like monitors, keyboards, and mice with main computing units. These IPs enable the transmission and reception of data signals through various communication protocols, such as HDMI, USB, and Ethernet, among others. Moreover, they facilitate the translation of these signals into formats that different devices can interpret and utilize effectively, thus enhancing device interoperability and performance.
Products in the Receiver/Transmitter category are crafted to meet the stringent demands of modern graphics and peripheral interfaces. They include transceivers and integrated circuits that are capable of managing high-definition audio and video signals, ensuring that media-rich content is delivered with the highest fidelity and efficiency. Furthermore, these semiconductor IPs are critical in reducing latency and improving data throughput, which are essential for applications such as gaming, streaming, and interactive media.
By leveraging the latest advancements in semiconductor technology, the Receiver/Transmitter IPs help manufacturers create devices that offer exceptional connectivity while maintaining power efficiency. This makes them ideal for developing the next generation of smart gadgets, consumer electronics, and computing peripherals, ensuring that they remain competitive in a rapidly evolving technological landscape. As such, these IPs play a pivotal role in shaping the future of connected devices, offering both enhanced performance and greater flexibility in design.
The AI Camera Module from Altek is a versatile, high-performance component designed to meet the increasing demand for smart vision solutions. This module features a rich integration of imaging lens design and combines both hardware and software capacities to create a seamless operational experience. Its design is reinforced by Altek's deep collaboration with leading global brands, ensuring a top-tier product capable of handling diverse market requirements. Equipped to cater to AI and IoT interplays, the module delivers outstanding capabilities that align with the expectations for high-resolution imaging, making it suitable for edge computing applications. The AI Camera Module ensures that end-user diversity is meaningfully addressed, offering customization in device functionality which supports advanced processing requirements such as 2K and 4K video quality. This module showcases Altek's prowess in providing comprehensive, all-in-one camera solutions which leverage sophisticated imaging and rapid processing to handle challenging conditions and demands. The AI Camera's technical blueprint supports complex AI algorithms, enhancing not just image quality but also the device's interactive capacity through facial recognition and image tracking technology.
The Aries fgOTN processor family is engineered according to the ITU-T G.709.20 fgOTN standard. This line of processors handles a variety of signals, including E1/T1, FE/GE, and STM1/STM4, effectively monitoring and managing alarms and performance metrics. Aries processors excel at fine-grain traffic aggregation, efficiently channeling fgODUflex traffic across OTN lines to support Ethernet, SDH, PDH client services. Their capacity to map signals to fgODUflex containers, which are then multiplexed into higher order OTN signals, demonstrates their versatility and efficiency. By allowing cascaded configurations with other Aries devices or Apodis processors, Aries products optimize traffic routes through OTN infrastructures, positioning them as essential components in optical networking and next-generation access scenarios.
xcore.ai by XMOS is a groundbreaking solution designed to bring intelligent functionality to the forefront of semiconductor applications. It enables powerful real-time execution of AI, DSP, and control functionalities, all on a single, programmable chip. The flexibility of its architecture allows developers to integrate various computational tasks efficiently, making it a fitting choice for projects ranging from smart audio devices to automated industrial systems. With xcore.ai, XMOS provides the technology foundation necessary for swift deployment and scalable application across different sectors, delivering high performance in demanding environments.
The PRBS Generator, Checker, and Error Counter is a robust tool designed to handle high-speed data processing tasks with precision. It supports multiple PRBS orders, namely 7, 15, and 31, to facilitate versatile data error checking and generation capabilities. This IP is engineered to ensure a high degree of accuracy in error detection, providing reliable performance in various applications. With differential CMOS data and clock inputs and outputs, it offers flexibility and compatibility with a range of systems, and includes a power-down mode to optimize energy usage. Built on TSMC's 28HPC process, this IP achieves typical data rates of 36 Gbps, with a minimum threshold of 32 Gbps, all while maintaining a typical consumption of 80 mA. It occupies an area ranging from 67×142 µm to 67×71 µm. With power scaling relative to the data rate, this IP ensures efficient operation, making it suitable for high-performance applications in telecommunications and data transmission. This IP provides multiple customization options to fit specific client needs, thanks to its scalable footprint that varies with its PRBS configurations. Its versatility and robust design make it an excellent choice for clients seeking high-speed error checking solutions that seamlessly integrate into existing infrastructures.
The KL520 marks Kneron's foray into the edge AI landscape, offering an impressive combination of size, power efficiency, and performance. Armed with dual ARM Cortex M4 processors, this chip can operate independently or as a co-processor to enable AI functionalities such as smart locks and security monitoring. The KL520 is adept at 3D sensor integration, making it an excellent choice for applications in smart home ecosystems. Its compact design allows devices powered by it to operate on minimal power, such as running on AA batteries for extended periods, showcasing its exceptional power management capabilities.
The PDM-to-PCM Converter from Archband Labs leads in transforming pulse density modulation signals into pulse code modulation signals. This converter is essential in applications where high fidelity of audio signal processing is vital, including digital audio systems and communication devices. Archband’s solution ensures accurate conversion, preserving the integrity and clarity of the original audio. This converter is crafted to seamlessly integrate with a wide array of systems, offering flexibility and ease-of-use in various configurations. Its robust design supports a wide range of input frequencies, making it adaptable to different signal environments. The PDM-to-PCM Converter also excels in minimizing latency and reducing overhead processing times. It’s engineered for environments where precision and sound quality are paramount, ensuring that audio signals remain crisp and undistorted during conversion processes.
Silicon Creations crafts highly reliable LVDS interfaces designed to meet diverse application needs, going from bi-directional I/Os to specialized uni-directional configurations. Spanning process compatibilities from 90nm CMOS to advanced 7nm FinFET, these interfaces are a cornerstone for high-speed data communication systems, thriving particularly in video data transmission and chip-to-chip communications. Supporting robust data rates over multiple channels, the LVDS Interfaces guarantee flexible programmability and protocol compatibility with standards such as FPD-Link and Camera-Link. They capitalize on proven PLL and CDR architectures for superior signal integrity and error-free data transfers. Operating efficiently in various technology nodes, they remain highly effective across collaborative chipset environments. The interfaces are fortified with adaptable features like dynamic phase alignment to stabilize data sequences and on-die termination options for superior signal integrity. Their proven record places them as a critical enabler in applications where consistent high-speed data transfer is paramount, demonstrating Silicon Creations’ prowess in delivering industry-leading communication solutions.
eSi-Connect offers an extensive suite of AMBA-compliant peripheral IPs designed to streamline SoC integration. This suite encompasses versatile memory controllers, standard off-chip interface support, and essential control functions. Its configurability and compatibility with low-level software drivers make it suitable for real-time deployment in complex system architectures, promoting reliable connectivity across various applications.
The Apodis family of Optical Transport Network processors adheres to ITU-T standards, offering a comprehensive suite for signal termination, processing, and multiplexing. Designed to handle both SONET/SDH and Ethernet client services, these processors map signals to Optical Transport Network (OTN), empowering versatile any-port, any-service configurations. Apodis processors are notable for their capacity to support up to 16 client ports and four 10G OTN line ports, delivering bandwidth scalability up to 40G, crucial for wireless backhaul and fronthaul deployments. With a robust, non-blocking OTN switching fabric, Apodis facilitates seamless client-to-line and line-to-line connections while optimally managing network bandwidth. This adaptability makes the Apodis processors an ideal choice for next-generation access networks and optical infrastructures.
aiSim 5 is at the forefront of automotive simulation, providing a comprehensive environment for the validation and verification of ADAS and AD systems. This innovative simulator integrates AI and physics-based digital twin technology, creating an adaptable and realistic testing ground that accommodates diverse and challenging environmental scenarios. It leverages advanced sensor simulation capabilities to reproduce high fidelity data critical for testing and development. The simulator's architecture is designed for modularity, allowing seamless integration with existing systems through C++ and Python APIs. This facilitates a wide range of testing scenarios while ensuring compliance with ISO 26262 ASIL-D standards, which is a critical requirement for automotive industry trust. aiSim 5 offers developers significant improvements in testing efficiency, allowing for runtime performance adjustments with deterministic outcomes. Some key features of aiSim 5 include the ability to simulate varied weather conditions with real-time adaptable environments, a substantial library of 3D assets, and built-in domain randomization features through aiFab for synthetic data generation. Additionally, its innovative rendering engine, aiSim AIR, enhances simulation realism while optimizing computational resources. This tool serves as an ideal solution for companies looking to push the boundaries of ADAS and AD testing and deployment.
This IP core is engineered for applications where minimal latency is of paramount importance. The Ultra-Low Latency 10G Ethernet MAC features an optimized architecture to provide rapid data transmission and reception capabilities, ensuring that all processes occur smoothly and efficiently. It is tailored specifically for real-time operations where every millisecond counts, like high-frequency trading and real-time monitoring systems. By focusing on reducing latency, this Ethernet MAC core delivers exceptional performance, making it an excellent choice for demanding environments that cannot afford delayed communication. The core's architecture reduces overhead and maximizes throughput, leveraging Chevin Technology's advanced design expertise to minimize signal interference and processing delays. Its seamless integration with both AMD and Intel FPGA platforms makes it versatile for a variety of implementations across industry sectors. Moreover, it's designed to maintain optimal performance while managing high data loads, showcasing a consistent ability to handle extensive network traffic efficiently.
The Chipchain C100 is a pioneering solution in IoT applications, providing a highly integrated single-chip design that focuses on low power consumption without compromising performance. Its design incorporates a powerful 32-bit RISC-V CPU which can reach speeds up to 1.5GHz. This processing power ensures efficient and capable computing for diverse IoT applications. This chip stands out with its comprehensive integrated features including embedded RAM and ROM, making it efficient in both processing and computing tasks. Additionally, the C100 comes with integrated Wi-Fi and multiple interfaces for transmission, broadening its application potential significantly. Other notable features of the C100 include an ADC, LDO, and a temperature sensor, enabling it to handle a wide array of IoT tasks more seamlessly. With considerations for security and stability, the Chipchain C100 facilitates easier and faster development in IoT applications, proving itself as a versatile component in smart devices like security systems, home automation products, and wearable technology.
This core is designed for high-performance applications requiring robust Ethernet connectivity with a high data throughput. The 10G Ethernet MAC and PCS solutions are developed to reliably handle speeds up to 10Gbps, optimizing the interface between Ethernet transmission and physical network layers. These IPs provide key functionality that helps maintain efficient data handling and transfer across networks, ensuring minimal latency and maximum productivity. Featuring refined architecture and robust design, this solution integrates seamlessly into FPGA frameworks, especially targeting Intel and AMD platforms. Its compatibility and reliability make it ideal for advanced networking tasks in a broad range of applications—from data centers to complex cloud infrastructures. The efficient management of data streams through this MAC and PCS combination ensures high-speed communication and responsiveness critical to high-demand environments. Its plug-and-play usability allows it to be quickly incorporated into existing systems, providing a flexible solution that maintains the scalability and performance needs of high-end systems. Additionally, Chevin Technology's expertise ensures that these cores come with comprehensive support tailored to enhance product integration and deployment efficiency.
The 2D FFT core is designed to efficiently handle two-dimensional FFT processing, ideal for applications in image and video processing where data is inherently two-dimensional. This core is engineered to integrate both internal and external memory configurations, which optimize data handling for complex multimedia processing tasks, ensuring a high level of performance is maintained throughout. Utilizing sophisticated algorithms, the 2D FFT core processes data through two FFT engines. This dual approach maximizes throughput, typically limiting bottlenecks to memory bandwidth constraints rather than computational delays. This efficiency is critical for applications handling large volumes of multimedia data where real-time processing is a requisite. The capacity of the 2D FFT core to adapt to varying processing environments marks its versatility in the digital processing landscape. By ensuring robust data processing capabilities, it addresses the challenges of dynamic data movement, providing the reliability necessary for multimedia systems. Its strategic design supports the execution of intensive computational tasks while maintaining the operational flow integral to real-time applications.
The Scorpion family of processors offers support for OSU containers as per the CCSA and IEEE standards, particularly the OSUflex standard. These processors accommodate various client-side signals, including E1/T1, FE/GE, and STM1/STM4, ensuring robust performance monitoring and optional Ethernet rate limitation. Scorpion processors can adeptly map these client signals to OSU or ODU containers, which are subsequently multiplexed to OTU-1 lines. Known for their flexibility and efficiency in handling diverse traffic types, Scorpion processors serve as foundational elements for advancements in access networks and optical service units, ensuring sustained performance in increasingly complex networking environments.
The DisplayPort 1.4 IP-core offered by Parretto B.V. is a compact yet potent solution for DisplayPort connectivity needs. Supporting a range of link rates from 1.62 to 8.1 Gbps, this IP-core accommodates varied setups with ease, including embedded DisplayPort (eDP) applications. It provides support for multiple lane configurations and both native video and AXI stream interfaces. The inclusion of Single and Multi Stream transport modes enhances its versatility for different video applications. Tailored for modern FPGA devices, the core supports a comprehensive video format range, including RGB and various YCbCr colorspaces. A standout feature is the secondary data packet interface, enabling audio and metadata transport alongside video signals. This makes it a full-fledged solution for video-centric applications, complemented by a Video Toolbox geared for video processing tasks like timing and test pattern generation. Parretto ensures the IP-core's adaptability by offering it with a thin host driver and API for seamless integration. The core is compatible with an extensive list of FPGA devices, such as AMD UltraScale+ and Intel Arria 10 GX. Customers benefit from the availability of source code via GitHub, promoting easier customization and deep integration into diverse systems. Comprehensive documentation supports the IP-core, ensuring efficient setup and utilization.
The GNSS ICs AST 500 and AST GNSS-RF are crafted by Accord Software & Systems as part of their extensive lineup of GNSS-centric products. These ICs are pivotal for applications requiring precision navigation, especially where stringent environmental and operational parameters are paramount. Built for robustness and accuracy, these ICs thrive under challenging conditions, providing users with reliable GPS and GNSS solutions. The AST 500 and AST GNSS-RF are tailored for seamless integration into complex systems, ensuring they meet the high demands of precision and performance. They offer enhanced capabilities for both time-sensitive and location-critical applications across various sectors, including aerospace, defense, and commercial industries. These integrated circuits leverage Accord's cutting-edge technology to maintain precise positioning and timing, which is essential for applications demanding unfailing synchronization and navigation. These ICs support various navigation systems and are designed to accommodate multiple constellation signals, including GPS, GLONASS, and more. Their comprehensive design encompasses complete GNSS functionality, which includes signal acquisition, tracking, and data output, ensuring continuous performance even in environments with high interference or dynamics. Providing both user-friendly integration and exceptional performance, these ICs form the backbone for Accord's reliable GNSS modules. In addition to interoperability across a range of navigation systems, the ICs are optimized for low-power consumption, making them suitable for portable and power-sensitive applications. This energy efficiency, coupled with advanced signal processing capabilities, ensures that the AST 500 and AST GNSS-RF remain at the forefront of GNSS technology.
Tailored for high efficiency, the NMP-550 accelerator advances performance in the fields of automotive, mobile, AR/VR, and more. Designed with versatility in mind, it finds applications in driver monitoring, video analytics, and security through its robust capabilities. Offering up to 6 TOPS of processing power, it includes up to 6 MB of local memory and a choice of RISC-V or Arm Cortex-M/A 32-bit CPU. In environments like drones, robotics, and medical devices, the NMP-550's enhanced computational skills allow for superior machine learning and AI functions. This is further supported by its ability to handle comprehensive data streams efficiently, making it ideal for tasks such as image analytics and fleet management. The NMP-550 exemplifies how AiM Future harnesses cutting-edge technology to develop powerful processors that meet contemporary demands for higher performance and integration into a multitude of smart technologies.
The ISPido on VIP Board solution is designed for the Lattice Semiconductor's VIP (Video Interface Platform) board, offering real-time, high-quality image processing. It supports automatic configuration selection at boot, ensuring a balanced output or alternatively, it provides a menu interface for manual adjustments. Key features include input from two Sony IMX 214 sensors and output in HDMI format with 1920 x 1080p resolution using YCrCb 4:2:2 color space. This system supports run-time calibration via a serial port, allowing users to customize gamma tables, convolution filters, and other settings to match specific application needs. The innovative setup facilitates streamlined image processing for efficient deployment across applications requiring high-definition video processing.
D2D® Technology, developed by ParkerVision, is a revolutionary approach to RF conversion that transforms how wireless communication operates. This technology eliminates traditional intermediary stages, directly converting RF signals to digital data. The result is a more streamlined and efficient communication process that reduces complexity and power consumption. By bypassing conventional analog-to-digital conversion steps, D2D® achieves higher data accuracy and reliability. Its direct conversion approach not only enhances data processing speeds but also minimizes energy usage, making it an ideal solution for modern wireless devices that demand both performance and efficiency. ParkerVision's D2D® technology continues to influence a broad spectrum of wireless applications. From improving the connectivity in smartphones and wearable devices to optimizing signal processing in telecommunication networks, D2D® is a cornerstone of ParkerVision's technological offerings, illustrating their commitment to advancing communication technology through innovative RF solutions.
The Mixed-Signal CODEC offered by Archband Labs integrates advanced analog and digital audio processing to deliver superior sound quality. Designed for a variety of applications such as portable audio devices, automotive systems, and entertainment systems, this CODEC provides efficiency and high performance. With cutting-edge technologies, it handles complex signal conversions with minimal power consumption. This CODEC supports numerous interface standards, making it a versatile component in numerous audio architectures. It's engineered to offer precise sound reproduction and maintains audio fidelity across all use cases. The integrated components within the CODEC streamline design processes and reduce the complexity of audio system implementations. Furthermore, the Mixed-Signal CODEC incorporates features that support high-resolution audio, ensuring compatibility with high-definition sound systems. It's an ideal choice for engineers looking for a reliable and comprehensive audio processing solution.
The RISCV SoC developed by Dyumnin Semiconductors is engineered with a 64-bit quad-core server-class RISCV CPU, aiming to bridge various application needs with an integrated, holistic system design. Each subsystem of this SoC, from AI/ML capabilities to automotive and multimedia functionalities, is constructed to deliver optimal performance and streamlined operations. Designed as a reference model, this SoC enables quick adaptation and deployment, significantly reducing the time-to-market for clients. The AI Accelerator subsystem enhances AI operations with its collaboration of a custom central processing unit, intertwined with a specialized tensor flow unit. In the multimedia domain, the SoC boasts integration capabilities for HDMI, Display Port, MIPI, and other advanced graphic and audio technologies, ensuring versatile application across various multimedia requirements. Memory handling is another strength of this SoC, with support for protocols ranging from DDR and MMC to more advanced interfaces like ONFI and SD/SDIO, ensuring seamless connectivity with a wide array of memory modules. Moreover, the communication subsystem encompasses a broad spectrum of connectivity protocols, including PCIe, Ethernet, USB, and SPI, crafting an all-rounded solution for modern communication challenges. The automotive subsystem, offering CAN and CAN-FD protocols, further extends its utility into automotive connectivity.
The High Speed Data Bus (HSDB) IP Core offers a robust hardware implementation featuring PHY and MAC layers, optimized for high-speed data transmission. This IP core ensures seamless integration and supports F-22 compatible interface implementations, making it indispensable for advanced military communication systems. This core is instrumental in providing high throughput and low latency, crucial for applications that manage complex data transmissions. Its design caters to environments that require secure and efficient data handling, meeting the rigorous requirements of modern defense systems. The HSDB IP Core is particularly suited for situations where data integrity and transmission speed are pivotal, addressing the needs of platforms reliant on effective real-time communications. Its deployment aids in stabilizing operations across varied legacy and state-of-the-art systems, offering flexibility and reliability.
Certus Semiconductor's Digital I/O solutions are engineered to meet various GPIO/ODIO standards. These versatile libraries offer support for standards such as I2C, I3C, SPI, JEDEC CMOS, and more. Designed to withstand extreme conditions, these I/Os incorporate features like ultra-low power consumption, multiple drive strengths, and high levels of ESD protection. These attributes make them suitable for applications requiring resilient performance under harsh conditions. Certus Semiconductor’s offerings also include a variety of advanced features like RGMII-compliant IO cells, offering flexibility for different project needs.
ISPido is a comprehensive image signal processing (ISP) pipeline that is fully configurable via the AXI4-LITE protocol. It features a complete ISP pipeline incorporating modules for defective pixel correction, color filter array interpolation using the Malvar-Cutler algorithm, and a series of image enhancements. These include convolution filters, auto-white balance, color correction matrix, gamma correction, and color space conversion between RGB and YCbCr formats. ISPido supports resolutions up to 7680x7680, ensuring compatibility with ultra-high-definition applications, up to 8K resolution systems. It is engineered to comply with the AMBA AXI4 standards, offering versatility and easy integration into various systems, whether for FPGA, ASIC, or other hardware configurations.
The Camera ISP Core is designed to optimize image signal processing by integrating sophisticated algorithms that produce sharp, high-resolution images while requiring minimal logic. Compatible with RGB Bayer and monochrome image sensors, this core handles inputs from 8 to 14 bits and supports resolutions from 256x256 up to 8192x8192 pixels. Its multi-pixel processing capabilities per clock cycle allow it to achieve performance metrics like 4Kp60 and 4Kp120 on FPGA devices. It uses AXI4-Lite and AXI4-Stream interfaces to streamline defect correction, lens shading correction, and high-quality demosaicing processes. Advanced noise reduction features, both 2D and 3D, are incorporated to handle different lighting conditions effectively. The core also includes sophisticated color and gamma corrections, with HDR processing for combining multiple exposure images to improve dynamic range. Capabilities such as auto focus and saturation, contrast, and brightness control are further enhanced by automatic white balance and exposure adjustments based on RGB histograms and window analyses. Beyond its core features, the Camera ISP Core is available with several configurations including the HDR, Pro, and AI variations, supporting different performance requirements and FPGA platforms. The versatility of the core makes it suitable for a range of applications where high-quality real-time image processing is essential.
Silicon Creations' Bi-Directional LVDS Interfaces are engineered to offer high-speed data transmission with exceptional signal integrity. These interfaces are designed to complement FPGA-to-ASIC conversions and include broad compatibility with industry standards like FPD-Link and Camera-Link. Operating efficiently over processes from 90nm to 12nm, the LVDS interfaces achieve data rates exceeding 3Gbps using advanced phase alignment techniques. A standout feature of this IP is its capability to handle independent LVCMOS input and output functions while maintaining high compatibility with TIA/EIA644A standards. The bi-directional nature allows for seamless data flow in chip-to-chip communications, essential for modern integrated circuits requiring high data throughput. The design is further refined with trimmable on-die termination, enhancing signal integrity during operations. The LVDS interfaces are versatile and highly programmable, meeting bespoke application needs with ease. The interfaces ensure robust error rate performance across varying phase selections, making them ideal for video data applications, controllers, and other high-speed data interfaces where reliability and performance are paramount.
ISELED Technology is an innovative solution for automotive lighting, integrating smart RGB LED control and communication capabilities into compact, efficient modules. These modules support precise color calibration and temperature compensation, leveraging a digital communication protocol to ensure consistent lighting quality. The system is engineered to facilitate seamless integration into automotive lighting applications, enhancing aesthetic appeal and operational efficiency.
The eSPI Master/Slave Controller adheres to the Enhanced Serial Peripheral Interface (eSPI) specification, facilitating communication either as a master or slave device within the eSPI protocol. It provides support for both the transaction and link layers of the eSPI bus, making it suitable for integration with a range of AMBA-compliant interconnect systems like AXI or AHB. This controller is particularly adept at bridging communications between various SPI devices and internal processing units, ensuring robust data exchange in complex system architectures.
The ArrayNav Adaptive GNSS Solution ushers in an era of enhanced automotive navigation, leveraging advanced adaptive antenna technology. This solution expertly applies multiple antennas to increase antenna gain and diversity, offering substantial advancements in navigation precision and operational consistency within complex environments. By integrating array-based technology, ArrayNav is tailored to improve the sensitivity and coverage necessary for sophisticated automotive systems. ArrayNav's use of adaptive antennas translates to significant reductions in issues such as multipath fading, which often affects navigation accuracy in urban canyons. With these enhancements, the solution ensures more reliable performance, boosting accuracy even in challenging terrains or when faced with potential signal interference. This solution has been specifically engineered for applications that demand robustness and precision, such as automotive advanced driver-assistance systems (ADAS). By employing the ArrayNav technology, users can benefit from higher degrees of jamming resistance, leading to safer and more accurate navigation results across a broad range of environments.
The DB9000AXI Display Controller is engineered to interface seamlessly with Frame Buffer Memory via the AMBA AXI protocol, offering support for a wide range of display resolutions from basic QVGA up to advanced 8K panels. Besides baseline display capabilities, advanced versions feature enhanced processing attributes such as multiple overlay windows, hardware cursor functions, and high dynamic range (HDR) imaging. With features like Color Space Conversion and programmable resolution settings, this IP core meets diverse display demands across numerous applications.
In smartphone applications, ActLight’s Dynamic PhotoDetector (DPD) offers a step-change in photodetection technology, enhancing features such as proximity sensing and ambient light detection. This high sensitivity sensor, with its ability to detect subtle changes in light, supports functions like automatic screen brightness adjustments and energy-efficient proximity sensing. Designed for low voltage operation, the DPD effectively reduces power consumption, making it suitable for high-performance phones without increasing thermal load. The technology also facilitates innovative applications like 3D imaging and eye-tracking, adding richness to user experiences in gaming and augmented reality.
The Xilinx Serial PROM Programmer by Roman-Jones is a competitive solution designed to streamline the programming process for Xilinx Serial PROM devices. This acclaimed programmer is recognized for its affordability and ease of use, demonstrating exceptional compatibility with any Xilinx Serial PROM part. It operates through a simple parallel port interface, obviating the need for specialized interface cards. Users can benefit from software support across multiple platforms, including DOS and various Windows versions, and the device is powered conveniently by a 9-volt battery, eliminating the requirement for an AC adapter. This product includes an external programmer coupled with proprietary interface software, which has received certification and endorsement from Xilinx. Its setup is straightforward, allowing for seamless co-existence with existing printer connections using an AB switchbox. The package supports a range of industry-standard file formats such as Intel Hex, Motorola S-Record, and Binary files crafted by Xilinx compilers, catering to diverse programming needs. Further enhancing its utility, the programmer includes options for socket adapters, enabling compatibility with varying package types including the 8-pin DIP and additional configurations. This adaptability ensures the programmer fulfills a wide array of customization requirements, making it a versatile tool for any electronics professional working with Xilinx Serial PROMs.
The FPGA Lock Core is an innovative FPGA solution designed to secure FPGAs and hardware against unauthorized access and counterfeiting, leveraging a Microchip ATSHA204A crypto authentication IC. It reads a unique ID, generates a 256-bit challenge, and uses secure hashing to verify the hardware's authenticity, ensuring hardware integrity in sensitive applications like military and medical fields. This solution allows hardware protection against IP theft by enforcing authentication and disables FPGA functionality if unauthorized access is detected. The core utilizes minimal logic resources and one FPGA pin, communicating through a bidirectional open drain link. The clarity of this system is enhanced by providing the core in VHDL, allowing users to thoroughly understand its functionality, supported by example designs on Cyclone10 and Artix 7 boards, catering to both Intel and Xilinx FPGA platforms. Complementing this security measure is the Key Writer Core, which allows programming of custom secret keys into the ATSHA204A in situ on assembled boards, ensuring a seamless integration with the FPGA Lock system. Available for various FPGA platforms, the Efinix version, distributed with TRS Star, expands its applicability, with webinars and user guides offering in-depth implementation insights.
The Camera PHY Interface for Advanced Processes by CURIOUS Corporation is designed to meet the demanding needs of modern imaging technology. This interface enables high-speed data transmission, catering to advanced process nodes required to support contemporary camera sensors. The interface efficiently handles various protocols, ensuring seamless integration with cutting-edge camera technologies. This makes it an ideal choice for applications where rapid data transfer and high-resolution image processing are necessary. The interface is engineered with sophisticated technology that provides reliable performance across multiple camera systems. Known for its adaptability, the Camera PHY Interface caters to diverse application needs by supporting various camera types and integration scenarios. This versatility plays a crucial role in fulfilling the requirements of high-performance imaging devices, ensuring superior camera functionality. Aside from its robust design, the interface also includes advanced features to support high-speed operations, making it capable of handling complex imaging tasks with ease. This positions the Camera PHY Interface as a pivotal component in the assembly of sophisticated and dynamic imaging systems, ensuring optimal functionality and performance.
Analog Bits provides robust I/O solutions that are essential for the efficient transfer of signals between semiconductor devices and their external environment. These input/output interfaces are designed to meet the most demanding performance criteria, ensuring fast data rates and minimal signal distortion. Their I/O IP solutions can accommodate a variety of protocols, including high-speed digital interfaces and analog conversions, offering versatility and support for applications such as networking, data processing, and consumer electronics. By optimizing the signal integrity and electromagnetic compatibility, these I/Os enhance the overall system performance. Equipped with advanced features for low power consumption, these I/Os contribute to reducing the overall energy footprint of semiconductor devices, making them ideal for battery-operated devices and environmentally sensitive applications. Analog Bits' I/Os are comprehensively integrated to function seamlessly within mixed-signal environments, further broadening their application range.
The Orion MFH IP Cores are designed for optimal performance in 4G mobile fronthaul networks, compliant with the ITU-T specifications for CPRI signal multiplexing. They adeptly handle various CPRI options, ranging from 2.4576 Gbps to 12.16512 Gbps, ensuring high compatibility and performance. Featuring both muxponder and transponder configurations, Orion cores facilitate the efficient mapping and transport of CPRI signals via Optical Transport Network infrastructures, ideal for modern telecommunications frameworks. Their advanced capabilities enable telecommunications providers to enhance their network reliability and service delivery, adapting seamlessly to different fronthaul scenarios.
Certus Semiconductor's Analog I/O offerings bring ultra-low capacitance and robust ESD protection to the forefront. These solutions are crafted to handle extreme voltage conditions while securing signal integrity by minimizing impedance mismatches. Key features include integrated ESD and power clamps, support for broad RF frequencies, and the ability to handle signal swings below ground. Ideal for high-speed RF applications, these Analog I/Os provide superior protection and performance, aligning with the most demanding circuit requirements.
Naneng Microelectronics offers a versatile Universal High-Speed SERDES capable of operating in a broad range of speeds from 1Gbps to 12.5Gbps. This SERDES is engineered to provide seamless and agile data transmission, underpinning critical communications infrastructure in various applications. The high-speed capabilities of this serializer/deserializer underline its suitability for high-performance networking solutions. Its flexible deployment options make it an ideal candidate for integration in a variety of system architectures, promoting a balance between speed and signal integrity. The design includes robust features to counter signal degradation and maintain the integrity of transmitted data, ensuring reliable operation across extensive data networks. Support for high data rates ensures this SERDES component meets and exceeds industry standards, delivering enhanced data throughput and supporting next-generation electronic systems. With adaptability at its core, the Universal High-Speed SERDES exemplifies comprehensive technological solutions in the semiconductor industry.
The JESD204B Multi-Channel PHY from Naneng Microelectronics is designed to meet the rigorous demands of high-speed data transmission. Featuring a data rate capability of up to 12.5Gbps, this physical layer multi-channel interface supports a wide array of applications requiring reliable and efficient data transfer. Its versatile architecture ensures seamless integration into complex systems, providing robust performance benefits in the field of data communications. A comprehensive design enhances usability and flexibility, allowing customization for specific industrial needs. This PHY is particularly adept in high-density environments, ensuring precision synchronization across multiple channels, critical for signal integrity in today's intricate electronic ecosystems. Furthermore, the solution's efficient layout allows for ease of interoperability with existing infrastructure, reducing integration costs and time-to-market for end-users. This makes the JESD204B Multi-Channel PHY an attractive choice for enterprises aiming for optimal performance in digital communication systems without compromising efficiency.
The Origin E1 is a streamlined neural processing unit designed specifically for always-on applications in personal electronics and smart devices such as smartphones and security systems. This processor focuses on delivering highly efficient AI performance, achieving around 18 TOPS per watt. With its low power requirements, the E1 is ideally suited for tasks demanding continuous data sampling, such as camera operations in smart surveillance systems where it runs on less than 20mW of power. Its packet-based architecture ensures efficient resource utilization, maintaining high performance with lower power and area consumption. The E1's adaptability is enhanced through customizable options, allowing it to meet specific PPA requirements effectively, making it the go-to choice for applications seeking to improve user privacy and experience by minimizing external memory use.
DolphinWare IPs is a versatile portfolio of intellectual property solutions that enable efficient SoC design. This collection includes various control logic components such as FIFO, arbiter, and arithmetic components like math operators and converters. In addition, the logic components span counters, registers, and multiplexers, providing essential functionalities for diverse industrial applications. The IPs in this lineup are meticulously designed to ensure data integrity, supported by robust verification IPs for AXI4, APB, SD4.0, and more. This comprehensive suite meets the stringent demands of modern electronic designs, facilitating seamless integration into existing design paradigms. Beyond their broad functionality, DolphinWare’s offerings are fundamental to applications requiring specific control logic and data integrity solutions, making them indispensable for enterprises looking to modernize or expand their product offerings while ensuring compliance with industry standards.
ParkerVision's Energy Sampling Technology is a state-of-the-art solution in RF receiver design. It focuses on achieving high sensitivity and dynamic range by implementing energy sampling techniques. This technology is critical for modern wireless communication systems, allowing devices to maintain optimal signal reception while consuming less power. Its advanced sampling methods enable superior performance in diverse applications, making it a preferred choice for enabling efficient wireless connectivity. The energy sampling technology is rooted in ParkerVision's expertise in matched filter concepts. By applying these concepts, the technology enhances the modulation flexibility of RF systems, thereby expanding its utility across a wide range of wireless devices. This capability not only supports devices in maintaining consistent connectivity but also extends their battery life due to its low energy requirements. Overall, ParkerVision's energy sampling technology is a testament to their innovative approach in RF solutions. It stands as an integral part of their portfolio, addressing the industry's demand for high-performance and energy-efficient wireless technology solutions.
The MIPITM SVTPlus-8L-F is a cutting-edge serial video transmitter designed for FPGAs. This transmitter adheres to CSI2 rev 2.0 and DPHY rev 1.2, featuring 8 lanes and capable of handling data rates of up to 12Gbps. It's engineered for high-performance video applications, boasting robust processing capabilities. Its support for advanced transmission protocols ensures seamless integration and compatibility with a wide range of video systems.
The Pipelined FFT core delivers streamlined continuous data processing capabilities with an architecture designed for pipelined execution of FFT computations. This core is perfectly suited for use in environments where data is fed continuously and needs to be processed with minimal delays. Its design minimizes memory footprint while ensuring high-speed data throughput, making it invaluable for real-time signal processing applications. By structurally arranging computations into a pipeline, the core facilitates a seamless flow of operations, allowing for one-step-after-another processing of data. The efficiency of the pipelining process reduces the system's overall latency, ensuring that data is processed as quickly as it arrives. This functionality is especially beneficial in time-sensitive applications where downtime can impact system performance. The compact design of the Pipelined FFT core integrates well into systems requiring consistent data flow and reduced resource allocation. It offers effective management of continuous data streams, supporting critical applications in areas such as real-time monitoring and control systems. By ensuring rapid data turnover, this core enhances system efficiency and contributes significantly to achieving strategic processing objectives.
The Tentiva Video FMC (FPGA Mezzanine Card) by Parretto B.V. is designed to enhance FPGA capability with advanced video functionalities. This module integrates effortlessly into various FPGA platforms, providing users with extended features for video input/output processing. Whether it's for development or field applications, Tentiva promises reliability and superior performance. Functionality-wise, this mezzanine card is adept at handling high-definition video streams, making it ideal for broadcast and media applications. It supports multiple video standards, ensuring that interfacing with different video input/output sources is seamless. The Tentiva Video FMC is thus tailored for developers looking to expand their FPGA's video processing capabilities without compromising on performance metrics. The design of Tentiva Video FMC aligns with industry standards, ensuring that developers leverage a scalable and maintainable platform. By supporting plug-and-play with numerous FPGA development boards, it eliminates the hassle of compatibility issues, providing a straightforward path to enhanced video applications. Available accessories and complementary software further streamlining its integration into existing systems, affording users the flexibility to tailor solutions to specific project requirements.
The ISDB-T 1-Segment Tuner from RF Integration is specially crafted to cater to digital broadcasting needs, particularly for mobile and handheld devices. This tuner is integral to receiving broadcast signals compliant with the ISDB-T standard, ensuring you have access to digital television and other mobile multimedia services. Designed with emphasis on power efficiency, the tuner is well-suited for use in a variety of portable devices, including smartphones and tablets, where battery life is a critical concern. It manages to combine low power usage with high performance, ensuring clear reception and processing of broadcast signals even in challenging conditions. The tuner's architecture incorporates advanced RF components that facilitate excellent signal acquisition and fidelity, essential for an enjoyable viewing experience. RF Integration's expertise in RF and analog designs is evident in this product, ensuring it stands out in the competitive field of digital broadcast technology. With the capability to handle fluctuating signal conditions, the ISDB-T 1-Segment Tuner is a reliable component for any modern media device.
The MIPITM SVRPlus2500 provides an efficient solution for high-speed 4-lane video reception. It's compliant with CSI2 rev 2.0 and DPHY rev 1.2 standards, designed to facilitate easy timing closure with a low clock rating. This receiver supports PRBS, boasts calibration capabilities, and offers a versatile output of 4/8/16 pixels per clock. It features 16 virtual channels and 1:16 input deserializers per lane, handling data rates up to 10Gbps, making it ideal for complex video processing tasks.
With an emphasis on performance, the MIPITM SVTPlus2500 is a robust 4-lane video transmitter adhering to CSI2 rev 2.0 and DPHY rev 1.2 standards. It facilitates timing closure with its low clock rating and supports PRBS for precise data management. The transmitter can handle 8/16 pixel inputs per clock and offers programmable timing parameters. Equipped with 16 virtual channels, this IP is engineered for high-speed video transmission.
The UltraLong FFT core is specifically optimized for Xilinx FPGAs, designed to handle extensive data processing tasks with efficiency. With an architecture that accommodates large-scale FFT applications, this core is engineered to maximize throughput while minimizing memory usage. Ideal for creating high-speed data processing pipelines, the UltraLong FFT core supports advanced signal processing with unparalleled speed and accuracy, providing a reliable solution for real-time applications that demand robust performance. This FFT core integrates seamlessly with external memory systems, utilizing dual FFT engines to achieve maximum data throughput, which is typically constrained only by the bandwidth of the memory. The two FFT engines operate in tandem, allowing for rapid data computation, making it perfect for high-end computation needs. Additionally, the design's flexibility allows for easy adaptation to various signal processing demands, ensuring it meets the specific requirements of different applications. The UltraLong FFT core's design is this finely tuned integration capability, which leverages external memory and custom control logic, effectively streamlining data handling challenges. This makes it highly suited for industries requiring precise control over data transformation and real-time data processing. Whether employed in digital communication or image processing, this core offers the computational prowess necessary to maintain efficiency across complex datasets.
Join the world's most advanced semiconductor IP marketplace!
It's free, and you'll get all the tools you need to discover IP, meet vendors and manage your IP workflow!
No credit card or payment details required.
Join the world's most advanced AI-powered semiconductor IP marketplace!
It's free, and you'll get all the tools you need to advertise and discover semiconductor IP, keep up-to-date with the latest semiconductor news and more!
Plus we'll send you our free weekly report on the semiconductor industry and the latest IP launches!