All IPs > Graphic & Peripheral > Receiver/Transmitter
The Receiver/Transmitter semiconductor IP category is a vital component of the Graphics & Peripheral domain, offering crucial connectivity solutions for a wide range of electronic devices. These IPs are designed to support seamless communication between various hardware elements, ensuring efficient data transfer and processing. As the demand for high-speed data exchange continues to rise, the importance of robust Receiver and Transmitter circuits becomes increasingly evident, making this category indispensable for modern electronics.
Semiconductor IPs in this category are engineered to handle diverse applications, such as integrating peripheral devices like monitors, keyboards, and mice with main computing units. These IPs enable the transmission and reception of data signals through various communication protocols, such as HDMI, USB, and Ethernet, among others. Moreover, they facilitate the translation of these signals into formats that different devices can interpret and utilize effectively, thus enhancing device interoperability and performance.
Products in the Receiver/Transmitter category are crafted to meet the stringent demands of modern graphics and peripheral interfaces. They include transceivers and integrated circuits that are capable of managing high-definition audio and video signals, ensuring that media-rich content is delivered with the highest fidelity and efficiency. Furthermore, these semiconductor IPs are critical in reducing latency and improving data throughput, which are essential for applications such as gaming, streaming, and interactive media.
By leveraging the latest advancements in semiconductor technology, the Receiver/Transmitter IPs help manufacturers create devices that offer exceptional connectivity while maintaining power efficiency. This makes them ideal for developing the next generation of smart gadgets, consumer electronics, and computing peripherals, ensuring that they remain competitive in a rapidly evolving technological landscape. As such, these IPs play a pivotal role in shaping the future of connected devices, offering both enhanced performance and greater flexibility in design.
The ADQ35 digitizer is designed for high-throughput applications, featuring a dual-channel configuration capable of achieving a sampling rate up to 10 GSPS. This 12-bit digitizer is tailored for applications that require simultaneous data streams and efficient high-speed data transfer, making it ideal for use in advanced signal analysis.
The AI Camera Module from Altek Corporation is a testament to their prowess in integrating complex imaging technologies. With substantial expertise in lens design and an adeptness for soft-hard integration capabilities, Altek partners with top global brands to supply a variety of AI-driven cameras. These cameras meet diverse customer demands in AI+IoT differentiation, edge computing, and high-resolution image requisites of 2K to 4K quality. This module's ability to seamlessly engage with the latest AI algorithms makes it ideal for smart environments requiring real-time data analysis and decision-making capabilities.
The Mixed-Signal CODEC by Archband integrates advanced audio and voice processing capabilities, designed to deliver high-fidelity sound in a compact form. This technology supports applications across various audio devices, ensuring quality performance even at low power consumption levels. With its ability to handle both mono and stereo channels, it is perfectly suited for modern audio systems.
As the SoC that placed Kneron on the map, the KL520 AI SoC continues to enable sophisticated edge AI processing. It integrates dual ARM Cortex M4 CPUs, ideally serving as an AI co-processor for products like smart home systems and electronic devices. It supports an array of 3D sensor technologies including structured light and time-of-flight cameras, which broadens its application in devices striving for autonomous functionalities. Particularly noteworthy is its ability to maximize power savings, making it feasible to power some devices on low-voltage battery setups for extended operational periods. This combination of size and power efficiency has seen the chip integrated into numerous consumer product lines.
Archband's PDM-to-PCM Converter is a versatile module designed to facilitate digital audio transformation. By converting Pulse Density Modulated audio signals into Pulse Code Modulated signals, this converter enhances audio clarity and fidelity in modern digital interfaces. It suits applications where efficient data streaming and noise reduction are critical, such as in high-quality audio devices and communications technology.
Silicon Creations crafts highly reliable LVDS interfaces designed to meet diverse application needs, going from bi-directional I/Os to specialized uni-directional configurations. Spanning process compatibilities from 90nm CMOS to advanced 7nm FinFET, these interfaces are a cornerstone for high-speed data communication systems, thriving particularly in video data transmission and chip-to-chip communications. Supporting robust data rates over multiple channels, the LVDS Interfaces guarantee flexible programmability and protocol compatibility with standards such as FPD-Link and Camera-Link. They capitalize on proven PLL and CDR architectures for superior signal integrity and error-free data transfers. Operating efficiently in various technology nodes, they remain highly effective across collaborative chipset environments. The interfaces are fortified with adaptable features like dynamic phase alignment to stabilize data sequences and on-die termination options for superior signal integrity. Their proven record places them as a critical enabler in applications where consistent high-speed data transfer is paramount, demonstrating Silicon Creations’ prowess in delivering industry-leading communication solutions.
The Aries fgOTN processor family is engineered according to the ITU-T G.709.20 fgOTN standard. This line of processors handles a variety of signals, including E1/T1, FE/GE, and STM1/STM4, effectively monitoring and managing alarms and performance metrics. Aries processors excel at fine-grain traffic aggregation, efficiently channeling fgODUflex traffic across OTN lines to support Ethernet, SDH, PDH client services. Their capacity to map signals to fgODUflex containers, which are then multiplexed into higher order OTN signals, demonstrates their versatility and efficiency. By allowing cascaded configurations with other Aries devices or Apodis processors, Aries products optimize traffic routes through OTN infrastructures, positioning them as essential components in optical networking and next-generation access scenarios.
The xcore.ai platform from XMOS is engineered to revolutionize the scope of intelligent IoT by offering a powerful yet cost-efficient solution that combines high-performance AI processing with flexible I/O and DSP capabilities. At its heart, xcore.ai boasts a multi-threaded architecture with 16 logical cores divided across two processor tiles, each equipped with substantial SRAM and a vector processing unit. This setup ensures seamless execution of integer and floating-point operations while facilitating high-speed communication between multiple xcore.ai systems, allowing for scalable deployments in varied applications. One of the standout features of xcore.ai is its software-defined I/O, enabling deterministic processing and precise timing accuracy, which is crucial for time-sensitive applications. It integrates embedded PHYs for various interfaces such as MIPI, USB, and LPDDR, enhancing its adaptability in meeting custom application needs. The device's clock frequency can be adjusted to optimize power consumption, affirming its cost-effectiveness for IoT solutions demanding high efficiency. The platform's DSP and AI performances are equally impressive. The 32-bit floating-point pipeline can deliver up to 1600 MFLOPS with additional block floating point capabilities, accommodating complex arithmetic computations and FFT operations essential for audio and vision processing. Its AI performance reaches peaks of 51.2 GMACC/s for 8-bit operations, maintaining substantial throughput even under intensive AI workloads, making xcore.ai an ideal candidate for AI-enhanced IoT device creation.
The Apodis family of Optical Transport Network processors adheres to ITU-T standards, offering a comprehensive suite for signal termination, processing, and multiplexing. Designed to handle both SONET/SDH and Ethernet client services, these processors map signals to Optical Transport Network (OTN), empowering versatile any-port, any-service configurations. Apodis processors are notable for their capacity to support up to 16 client ports and four 10G OTN line ports, delivering bandwidth scalability up to 40G, crucial for wireless backhaul and fronthaul deployments. With a robust, non-blocking OTN switching fabric, Apodis facilitates seamless client-to-line and line-to-line connections while optimally managing network bandwidth. This adaptability makes the Apodis processors an ideal choice for next-generation access networks and optical infrastructures.
ISPido on VIP Board is a customized runtime solution tailored for Lattice Semiconductors’ Video Interface Platform (VIP) board. This setup enables real-time image processing and provides flexibility for both automated configuration and manual control through a menu interface. Users can adjust settings via histogram readings, select gamma tables, and apply convolutional filters to achieve optimal image quality. Equipped with key components like the CrossLink VIP input bridge board and ECP5 VIP Processor with ECP5-85 FPGA, this solution supports dual image sensors to produce a 1920x1080p HDMI output. The platform enables dynamic runtime calibration, providing users with interface options for active parameter adjustments, ensuring that image settings are fine-tuned for various applications. This system is particularly advantageous for developers and engineers looking to integrate sophisticated image processing capabilities into their devices. Its runtime flexibility and comprehensive set of features make it a valuable tool for prototyping and deploying scalable imaging solutions.
The Orion MFH IP Cores are designed for optimal performance in 4G mobile fronthaul networks, compliant with the ITU-T specifications for CPRI signal multiplexing. They adeptly handle various CPRI options, ranging from 2.4576 Gbps to 12.16512 Gbps, ensuring high compatibility and performance. Featuring both muxponder and transponder configurations, Orion cores facilitate the efficient mapping and transport of CPRI signals via Optical Transport Network infrastructures, ideal for modern telecommunications frameworks. Their advanced capabilities enable telecommunications providers to enhance their network reliability and service delivery, adapting seamlessly to different fronthaul scenarios.
DolphinWare IPs is a versatile portfolio of intellectual property solutions that enable efficient SoC design. This collection includes various control logic components such as FIFO, arbiter, and arithmetic components like math operators and converters. In addition, the logic components span counters, registers, and multiplexers, providing essential functionalities for diverse industrial applications. The IPs in this lineup are meticulously designed to ensure data integrity, supported by robust verification IPs for AXI4, APB, SD4.0, and more. This comprehensive suite meets the stringent demands of modern electronic designs, facilitating seamless integration into existing design paradigms. Beyond their broad functionality, DolphinWare’s offerings are fundamental to applications requiring specific control logic and data integrity solutions, making them indispensable for enterprises looking to modernize or expand their product offerings while ensuring compliance with industry standards.
Flexibilis Ethernet Switch (FES) is engineered as a triple-speed Ethernet Layer 2 switch IP, capable of gigabit forwarding on each port. Its design ensures compatibility with IEEEv2's end-to-end transparent clock, enhancing clock information reliability across expansive networks. FES provides flexible connectivity options, supporting various Media Independent Interfaces and optional adapters for different interfaces, enabling seamless integration with host systems and external PHY devices. The switch's core is a multi-gigabit forwarding engine supporting up to twelve full-duplex gigabit Ethernet ports, employing Weighted Random Early Detection to prioritize critical data streams during congestion. Additional features like VLAN tagging, packet filtering, and PTP synchronization further solidify FES's credentials for robust, high-availability Ethernet communications.
Functioning as a comprehensive cross-correlator, the XCM_64X64 facilitates efficient and precise signal processing required in synthetic radar receivers and advanced spectrometers. Designed on IBM's 45nm SOI CMOS technology, it supports ultra-low power operation at about 1.5W for the entire array, with a sampling performance of 1GSps across a bandwidth of 10MHz to 500MHz. The ASIC is engineered to manage high-throughput data channels, a vital component for high-energy physics and space observation instruments.
RegSpec is a comprehensive register specification tool that excels in generating Control Configuration and Status Register (CCSR) code. The tool is versatile, supporting various input formats like SystemRDL, IP-XACT, and custom formats via CSV, Excel, XML, or JSON. Its ability to output in formats such as Verilog RTL, System Verilog UVM code, and SystemC header files makes it indispensable for IP designers, offering extensive features for synchronization across multiple clock domains and interrupt handling. Additionally, RegSpec automates verification processes by generating UVM code and RALF files useful in firmware development and system modeling.
The ADQ35-WB RF digitizer is crafted for high-performance data acquisition with versatility at its core. It offers users a dual-channel capability with an impressive sample rate of up to 10 GSPS, and it extends its performance with a usable analog bandwidth reaching 9 GHz. This makes it a formidable option for professionals demanding precision and accuracy in RF signal digitization.
ISPido represents a fully configurable RTL Image Signal Processing Pipeline, adhering to the AMBA AXI4 standards and tailored through the AXI4-LITE protocol for seamless integration with systems such as RISC-V. This advanced pipeline supports a variety of image processing functions like defective pixel correction, color filter interpolation using the Malvar-Cutler algorithm, and auto-white balance, among others. Designed to handle resolutions up to 7680x7680, ISPido provides compatibility for both 4K and 8K video systems, with support for 8, 10, or 12-bit depth inputs. Each module within this pipeline can be fine-tuned to fit specific requirements, making it a versatile choice for adapting to various imaging needs. The architecture's compatibility with flexible standards ensures robust performance and adaptability in diverse applications, from consumer electronics to professional-grade imaging solutions. Through its compact design, ISPido optimizes area and energy efficiency, providing high-quality image processing while keeping hardware demands low. This makes it suitable for battery-operated devices where power efficiency is crucial, without sacrificing the processing power needed for high-resolution outputs.
The MIPITM CSI2MUX-A1F is an innovative video multiplexor designed to manage and aggregate multiple video streams effortlessly. It supports CSI2 rev 1.3 and DPHY rev 1.2 standards, handling inputs from up to four CSI2 cameras and producing a single aggregated video output. With data rates of 4 x 1.5Gbps, it is optimal for applications requiring efficient video stream management and consolidation.
With an emphasis on performance, the MIPITM SVTPlus2500 is a robust 4-lane video transmitter adhering to CSI2 rev 2.0 and DPHY rev 1.2 standards. It facilitates timing closure with its low clock rating and supports PRBS for precise data management. The transmitter can handle 8/16 pixel inputs per clock and offers programmable timing parameters. Equipped with 16 virtual channels, this IP is engineered for high-speed video transmission.
The I/O solutions by Analog Bits encompass differential clocking, signaling, and crystal oscillator IPs. These low-power, high-quality signaling technologies are designed to minimize transistor usage while maximizing signaling performance. With solutions that are silicon-proven and customizable, these IPs are highly efficient and support various die-to-die communication needs.
The MIPITM V-NLM-01 is a specialized non-local mean image noise reduction product designed to enhance image quality through sophisticated noise reduction techniques. This hardware core features a parameterized search-window size and adjustable bits per pixel, ensuring a high degree of customization and efficiency. Supporting HDMI with resolutions up to 2048×1080 at 30 to 60 fps, it is ideally suited for applications requiring image enhancement and processing.
The XCM_64X64_A is a powerful array designed for cross-correlation operations, integrating 128 ADCs each capable of 1GSps. Targeted at high-precision synthetic radar and radiometer systems, this ASIC delivers ultra-low power consumption around 0.5W, ensuring efficient performance over a wide bandwidth range from 10MHz to 500MHz. Built on IBM's 45nm SOI CMOS technology, it forms a critical component in systems requiring rapid data sampling and intricate signal processing, all executed with high accuracy, making it ideal for airborne and space-based applications.
The MIPITM SVRPlus2500 provides an efficient solution for high-speed 4-lane video reception. It's compliant with CSI2 rev 2.0 and DPHY rev 1.2 standards, designed to facilitate easy timing closure with a low clock rating. This receiver supports PRBS, boasts calibration capabilities, and offers a versatile output of 4/8/16 pixels per clock. It features 16 virtual channels and 1:16 input deserializers per lane, handling data rates up to 10Gbps, making it ideal for complex video processing tasks.
The ADQ7DC stands out with its high-resolution 14-bit digitization capability, providing users with a single or dual-channel configuration for enhanced flexibility. Its formidable 10 GSPS sampling speed offers compelling performance for applications requiring high fidelity data conversion, allowing for intricate RF signal capture and analysis.
aiData introduces a fully automated data pipeline designed to streamline the workflow of automotive Machine Learning Operations (MLOps) for ADAS and autonomous driving development. Recognizing the enormous task of processing millions of kilometers of driving data, aiData employs automation from data collection to curation, annotation, and validation, enhancing the efficiency of data scientists and engineers. This crafted pipeline not only facilitates faster prototyping but also ensures higher quality in deploying machine learning models for autonomous applications. Key components of aiData include the aiData Versioning System, which provides comprehensive transparency and traceability over the data handling process, from recording to training dataset creation. This system efficiently manages metadata, which is integral for diverse use-cases, through advanced scene and context-based querying. In conjunction with the aiData Recorder, aiData automates data collection with precise sensor calibration and synchronization, significantly improving the quality of data for testing and validation. The aiData Auto Annotator further enhances operational efficiency by handling the traditionally labor-intensive process of data annotation using sophisticated AI algorithms. This process extends to multi-sensor data, offering high precision in dynamic and static object detection. Moreover, aiData Metrics tool evaluates neural network performance against baseline requirements, instantly detecting data gaps to optimize future data collection strategies. This makes aiData an essential tool for companies looking to enhance AI-driven driving solutions with robust, real-world data.
The C100 from Chipchain is a highly integrated, low-power consumption single-chip solution tailored for IoT applications. Featuring an advanced 32-bit RISC-V CPU capable of operating at speeds up to 1.5GHz, it houses embedded RAM and ROM for efficient processing and computational tasks. This chip's core strength lies in its multifunctional nature, integrating Wi-Fi, various transmission interfaces, an ADC, LDO, and temperature sensors, facilitating a streamlined and rapid application development process. The C100 chip is engineered to support a diverse set of applications, focusing heavily on expanding IoT capabilities with enhanced control and connectivity features. Beyond its technical prowess, the C100 stands out with its high-performance wireless microcontrollers, designed specifically for the burgeoning IoT market. By leveraging various embedded technologies, the C100 enables simplified, fast, and adaptive application deployment across a wide array of sectors including security, healthcare, smart home devices, and digital entertainment. The chip’s integrated features ensure it can meet the rigorous demands of modern IoT applications, characterized by high integration and reliability. Moreover, the C100 represents a leap forward in IoT product development with its extensive focus on energy efficiency, compact size, and secure operations. Providing a complete IoT solution, this chip is instrumental in advancing robust IoT ecosystems, driving innovation in smart connectivity. Its comprehensive integration provides IoT developers with a significant advantage, allowing them to develop solutions that are not only high-performing but also ensure sustainability and user safety.
As part of the advanced communication toolkit, the DSER12G addresses the need for robust data/clock recovery and deserialization at rates between 8.5Gb/s to 11.3Gb/s. Prominent in 10GbE, OC-192, and equivalent setups, it boasts ultra-low power design principles grounded in IBM's 65nm technology. Supporting high noise immunity and compact integration, it is a cornerstone in systems requiring efficient data management and communications interfaces across various digital infrastructures.
The Digital I/O offerings from Certus Semiconductor are meticulously designed to cater to a wide range of GPIO/ODIO standards involving various protocols such as I2C, I3C, and SPI among others. These solutions support 1.2V, 1.8V, 2.5V, 3.3V, and 5V configurations, ensuring adaptability across numerous nodes and foundries. They boast features such as ultra-low power consumption, minimal leakage, and multiple drive strengths, making them suitable for diverse applications. Advanced Electronic Distribution Systems (ESD) protection is a standout feature, capable of withstanding severe ESD stress way beyond common levels. The design includes comprehensive compliance with popular standards like eMMC, RGMII, and LPDDR, providing robustness in various scenarios. The Digital I/O solutions are engineered to be highly resilient, capable of adapting to challenging environmental and operational conditions while maintaining impressive performance metrics. These digital IO designs are complemented by a strong support for rad-hard applications, designed for high reliability and minimal failure rates even in extreme conditions. Certus's digital IO solutions embody a strategic blend of power efficiency and advanced ESD protection that guarantees exceptional performance across a myriad of implementations.
The RWM6050 Baseband Modem from Blu Wireless is integral to their high bandwidth, high capacity mmWave solutions. Designed for cost-effectiveness and power efficiency, this modem forms a central component of multi-gigabit radio interfaces. It provides robust connectivity for access and backhaul markets through its notable flexibility and high performance. Partnering with mmWave RF chipsets, the RWM6050 delivers flexible channelisation modes and modulation coding capabilities, enabling it to handle extensive bandwidth requirements and achieve multi-gigabit data rates. This is supported by dual modems that include a mixed-signal front-end, enhancing its adaptability across a vast range of communications environments. Key technical features include integrated network synchronization and a programmable real-time scheduler. These features, combined with advanced beam forming support and digital front-end processing, make the RWM6050 a versatile tool in optimizing connectivity solutions. The modem's specifications ensure high efficiency in various network topologies, highlighting its role as a crucial asset in contemporary telecommunications settings.
The Advanced Flexibilis Ethernet Controller (AFEC) is a versatile triple-speed Ethernet controller IP block ideal for programmable hardware and ASIC applications. AFEC, in conjunction with Ethernet PHY devices, delivers comprehensive Ethernet Network Interface Controller functionality. It features an MII/GMII interface for seamless Ethernet PHY device connection, supporting gigabit transfer rates. AFEC's design reduces CPU workload by employing DMA transfers and scatter-gather techniques for efficient data management, while providing timestamping capabilities with IEEE 1588 support. Standard AFEC components include triple-speed operation, direct SFP module integration, and CRC error handling, making it ideal for diverse networking applications.
The FaintStar sensor is engineered primarily for medium to high precision star tracking applications, including navigation and rendezvous tasks in aerospace settings. Characterized by its 1020 x 1020 pixel array and a 10μm pitch, it includes 12-bit A-to-D conversion, ensuring significant detail in imaging precision. The sensor’s design is robust and reliable, evident in its Flight-proven Technology Readiness Level 9 (TRL9) status, affirming its tested and trusted use in critical missions. An important feature of the FaintStar is its 'light-to-centroids' image processing capability, which is highly attuned to the needs of aerospace navigation, providing accurate and reliable data processing needed for space applications. The sensor includes connectivity options via a SpaceWire LVDS command/data interface, capable of 40Mb/s and 80Mb/s speeds, facilitating seamless communication. Its construction is specifically tailored to withstand the challenging conditions of space, highlighting radiation tolerance including Total Ionizing Dose (TiD), proton sensitivity, and Single Event Effects (SEE) data are verified. Being ITAR-free enhances its accessibility for international collaborations, while it meets the standards set by ESCC 2269000-evaluated and ESCC 9020 flight model procurement, ensuring compliance and reliability in operational use.
The second-generation MIPITM SVRPlus-8L-F is a high performance serial video receiver built for FPGAs. Complying with CSI2 revision 2.0 and DPHY revision 1.2 standards, it supports 8 lanes and 16 virtual channels, offering efficient communication with 12Gbps data throughput. This receiver comes with features like 4 pixel output per clock, calibration support, and communication error statistics, making it suitable for high-speed video transmission and processing applications.
D2D® Technology, also known as Direct-to-Data, revolutionizes RF communication by bypassing traditional methods for a more integrated solution. By converting RF signals directly to baseband data and vice versa, it optimizes the efficiency and performance of RF conversion processes. This technology excels in simplifying the transmission and reception of signals across numerous wireless applications, including mobile telephony, Wi-Fi, and Internet of Things (IoT). Protected by an extensive suite of global patents, ParkerVision's D2D® facilitates high-performance RF-to-IF conversion, minimizing power consumption and maximizing data throughput. With increasing demands for 4G and forthcoming 5G applications, D2D® stands out for providing robust solutions in managing high data rates and sustaining powerful signal integrity over wide frequency bands. This direct conversion method enables more compact, cost-effective RF environments, crucial for minimizing device size and power use. ParkerVision's D2D® Technology has significantly contributed to the evolution of wireless communication by making RF receivers far more efficient and effective. By enabling devices to process vast amounts of data rapidly and reliably, this innovation continues to shape the functionality and design of modern wireless devices, driving further technological advancements in RF integrated circuits and system-on-chip solutions.
The Bluetooth Digital Clock from the Levo Series by Primex stands as a versatile solution for institutions requiring wireless and precise time synchronization. With its low-energy Bluetooth technology, this clock forms a mesh network that ensures consistent time updates across diverse locations within facilities. Designed particularly for schools, hospitals, and business settings, it supports the creation of a synchronized environment where every second matters. Its wireless nature significantly reduces installation costs and complexities, freeing facilities from the need for extensive cabling. The Levo Series clocks automatically update time, making them ideal for settings that require instantaneous adjustments, such as schools transitioning between periods or hospitals coordinating shifts. Additionally, the digital display offers clear and easy readability, which is essential in environments with high foot traffic. The synchronization with Primex's OneVue Sync technology further underscores its reliability, providing peace of mind that accurate timekeeping is always maintained. The Levo Series marries advanced technology with practical functionality, making them indispensable in environments that cannot afford time discrepancies.
The Camera ISP Core is designed to optimize image signal processing by integrating sophisticated algorithms that produce sharp, high-resolution images while requiring minimal logic. Compatible with RGB Bayer and monochrome image sensors, this core handles inputs from 8 to 14 bits and supports resolutions from 256x256 up to 8192x8192 pixels. Its multi-pixel processing capabilities per clock cycle allow it to achieve performance metrics like 4Kp60 and 4Kp120 on FPGA devices. It uses AXI4-Lite and AXI4-Stream interfaces to streamline defect correction, lens shading correction, and high-quality demosaicing processes. Advanced noise reduction features, both 2D and 3D, are incorporated to handle different lighting conditions effectively. The core also includes sophisticated color and gamma corrections, with HDR processing for combining multiple exposure images to improve dynamic range. Capabilities such as auto focus and saturation, contrast, and brightness control are further enhanced by automatic white balance and exposure adjustments based on RGB histograms and window analyses. Beyond its core features, the Camera ISP Core is available with several configurations including the HDR, Pro, and AI variations, supporting different performance requirements and FPGA platforms. The versatility of the core makes it suitable for a range of applications where high-quality real-time image processing is essential.
Enclustra's Universal Drive Controller is a comprehensive motor control solution encompassing support for DC, brushless, and stepper motors. It features a field-oriented control for BLDC motors, a trajectory planner, and complete position control, eliminating the need for additional drive controller chips. By reducing both the CPU load and system cost, this IP facilitates efficient motor control suitable for multiple applications, including robotics and automation. Seamlessly integrating with standard FPGA development tools, it provides robust support for DC and BLDC motors by allowing autonomous management, making it an ideal choice for reducing development times and costs in motion control systems.
The Scorpion family of processors offers support for OSU containers as per the CCSA and IEEE standards, particularly the OSUflex standard. These processors accommodate various client-side signals, including E1/T1, FE/GE, and STM1/STM4, ensuring robust performance monitoring and optional Ethernet rate limitation. Scorpion processors can adeptly map these client signals to OSU or ODU containers, which are subsequently multiplexed to OTU-1 lines. Known for their flexibility and efficiency in handling diverse traffic types, Scorpion processors serve as foundational elements for advancements in access networks and optical service units, ensuring sustained performance in increasingly complex networking environments.
Certus Semiconductor's Analog I/O solutions deliver state-of-the-art protection through ultra-low capacitance and extreme ESD protection. Designed for high-speed SerDes and RF applications, these products ensure that signal integrity and impedance matching are not compromised. The Analog I/O offerings from Certus are driven by innovation, featuring less than 50 fF capacitance solutions apt for today's advanced technological demands. These analog solutions are equipped to tolerate signal swings below ground, capable of providing robust ESD protection withstanding over 16kV HBM. In addition to these capabilities, they possess high temperature tolerance and can endure aggressive operational environments, making them an ideal fit for sectors demanding high reliability and rugged performance. The comprehensive design integrates IO, ESD, and power clamps into significant macro cells for optimal performance. Certus Semiconductor ensures that their analog solutions are adaptable, scalable, and ready to meet future demands in high-speed and high-frequency applications.
The INAP590T is a cutting-edge digital multi-channel SerDes transmitter specifically crafted for high-speed infotainment applications. Found in the APIX3 suite, this component is built to ensure seamless interactions between HDMI interfaces and APIX2 technology, featuring HDCP support for secure content transmission. This transmitter facilitates a DC-balanced, low latency point-to-point link, perfect for applications requiring robust data transmission like immersive in-car entertainment systems. Capable of handling dual high-definition content streams and supporting resolutions up to 1920x1080 at 30Hz, the INAP590T is ideal for modern display technologies within vehicles. It includes multiple interface options and supports comprehensive full-duplex communication channels, allowing for flexible system design and integration. Furthermore, the robust diagnostic features ensure optimal operation and readily identify potential issues for proactive maintenance. Designed for scalability and forward compatibility, the INAP590T supports extensive bandwidth requirements and is packaged for installation convenience. The integration of Ethernet interfaces, along with GPIO configurations, enables versatile connectivity options to meet diverse automotive needs, ensuring broad applicability across current and next-generation vehicles.
Designed for high-capacity data transfer over fiber optic networks, the SER12G facilitates 32:1 serialization for robust telecommunications. Capable of sustaining data rates from 8.5Gb/s to 11.3Gb/s, this module is essential for SONET/SDH and 10GbE operations, embracing IBM's 65nm CMOS technology. The design boasts low power requirements and integrates CMU and frac N PLL, making it suitable for both line and host side transmission, effectively enhancing data throughput and signal integrity.
The DisplayPort 1.4 provides a comprehensive solution for DisplayPort needs by offering both source (DPTX) and sink (DPRX) configurations. It supports various link rates from 1.62 Gbps to 8.1 Gbps, including embedded DisplayPort (eDP) rates. This versatility makes it ideal for a wide range of applications, including those requiring either Single Stream Transport (SST) or Multi Stream Transport (MST). With support for dual and quad pixels per clock, as well as 8 & 10-bit video in RGB and YUV 4:4:4 color spaces, the DisplayPort 1.4 is well-equipped to handle high-resolution video tasks. The robust features of DisplayPort 1.4 include a Secondary Data Packet Interface designed for audio and metadata transport, ensuring comprehensive support for multimedia applications. Parretto also enhances the IP with a Video Toolbox containing a timing generator, test pattern generator, and video clock recovery functions. These components facilitate seamless integration and operational efficiency within a wide array of systems. This product supports numerous FPGA devices, such as AMD UltraScale+, Intel Cyclone 10 GX, and Lattice CertusPro-NX, giving users flexibility in their choice of hardware. The availability of source code on GitHub allows users to tailor the IP specifically to their design requirements, broadening the scope of customization and ensuring a perfect fit in various applications.
MIPI CSI-2 Receiver IP is designed to seamlessly integrate with modern image sensors, supporting high-speed data transfers. This receiver is compliant with the MIPI Alliance specification and is optimized for low power consumption, making it ideal for mobile and IoT devices. It features robust error detection and correction capabilities, ensuring data integrity during transmission. The architecture allows for flexible scalability, accommodating a variety of data rates and resolutions. With streamlined integration processes and supporting major foundry nodes, this IP is well-suited for diverse applications ranging from high-end smartphones to advanced automotive systems.
Energy Sampling Technology represents a groundbreaking approach to RF receivers, focusing on direct-conversion methods. Historically, super-heterodyne technology dominated but proved inefficient for modern low-power CMOS applications. ParkerVision shifted paradigms with energy sampling, improving frequency down-conversion using a matched-filter correlator. This innovation enhances sensitivity, bandwidth, and dynamic range while minimizing RF signal division between I/Q paths. The resultant receivers boast reduced power consumption and enhanced accuracy in demodulation, making them highly suitable for compact CMOS implementations. This technology enables multimode receivers that adapt to shrinking CMOS geometries and supply voltages, fostering greater integration in devices. By streamlining design redundancies, the silicon footprint diminishes, and fewer external resonant structures are needed. This streamlined approach is not only cost-effective but also supports the evolving standards from GSM to LTE in various applications like smartphones, embedded modems, and tablets. Benefits including lower power usage, high sensitivity, and ease of integration make it a versatile solution across different wireless communication standards. With applications expanding into GSM, EDGE, CDMA, UMTS, and TD-CDMA, this technology supports energy-efficient RF receiver solutions, producing longer battery life and robust connectivity with less interference. It remains a vital aspect of producing compact, high-performance wireless communication devices suitable for the newest generation of smartphones.
The MIPITM SVTPlus-8L-F is a cutting-edge serial video transmitter designed for FPGAs. This transmitter adheres to CSI2 rev 2.0 and DPHY rev 1.2, featuring 8 lanes and capable of handling data rates of up to 12Gbps. It's engineered for high-performance video applications, boasting robust processing capabilities. Its support for advanced transmission protocols ensures seamless integration and compatibility with a wide range of video systems.
Silicon Creations' Bi-Directional LVDS Interfaces are engineered to offer high-speed data transmission with exceptional signal integrity. These interfaces are designed to complement FPGA-to-ASIC conversions and include broad compatibility with industry standards like FPD-Link and Camera-Link. Operating efficiently over processes from 90nm to 12nm, the LVDS interfaces achieve data rates exceeding 3Gbps using advanced phase alignment techniques. A standout feature of this IP is its capability to handle independent LVCMOS input and output functions while maintaining high compatibility with TIA/EIA644A standards. The bi-directional nature allows for seamless data flow in chip-to-chip communications, essential for modern integrated circuits requiring high data throughput. The design is further refined with trimmable on-die termination, enhancing signal integrity during operations. The LVDS interfaces are versatile and highly programmable, meeting bespoke application needs with ease. The interfaces ensure robust error rate performance across varying phase selections, making them ideal for video data applications, controllers, and other high-speed data interfaces where reliability and performance are paramount.
Sentire Radar by IMST is an advanced radar solution designed to provide precise environmental mapping and object identification in various conditions. Utilizing sophisticated processing algorithms, the radar can distinguish between different objects and adjust dynamically for conditions such as rain, fog, or darkness. This makes it suitable for use in automotive and security applications, where precision and reliability are crucial.
Bridging complex data communication requirements, the SERDES12G offers comprehensive serialization/deserialization capabilities, supporting 32:1 and 1:32 operations at speeds of 8.5Gb/s to 11.3Gb/s. With robust low power features, its design leverages IBM's 65nm technology, vital for SONET/SDH and XFI protocols in modern telecommunication systems. By integrating CDR and CMU, it provides high performance and stability, ensuring seamless data handling across a wide array of applications.
iCEVision facilitates rapid prototyping and evaluation of connectivity features using the Lattice iCE40 UltraPlus FPGA. Designers can take advantage of exposed I/Os for quick implementation and validation of solutions, while enjoying compatibility with common camera interfaces such as ArduCam CSI and PMOD. This flexibility is complemented by software tools such as the Lattice Diamond Programmer and iCEcube2, which allow designers to reprogram the onboard SPI Flash and develop custom solutions. The platform comes preloaded with a bootloader and an RGB demo application, making it quick and easy for users to begin experimenting with their projects. Its design includes features like a 50mmx50mm form factor, LED applications, and multiple connectivity options, ensuring broad usability across various rapid prototyping scenarios. With its user-friendly setup and comprehensive toolkit, iCEVision is perfect for developers who need a streamlined path from initial design to functional prototype, especially in environments where connectivity and sensor integration are key.
The Orion Pattern Projectors are a leading family of compact and high-performance devices designed to enhance 3D depth sensing capabilities. These projectors stand out by offering an ultra-wide illumination field and can generate intricate dot, line, or flood patterns, crucial for applications in smartphones, robotics, AR/VR environments, and the IoT. At the heart of the Orion Projectors is the use of integrated meta-optics, which allows these projectors to efficiently convert light from VCSELs into high-contrast patterns. This technological advancement means the elimination of multiple traditional optical elements, which significantly reduces assembly complexity and cost while improving overall device performance. Such integration makes the Orion projectors notably suitable for structured light and time-of-flight applications. The Orion series includes the advanced Starlight projector, which operates using pseudorandom dot patterns to provide high-resolution output in a compact form factor. This innovation delivers class-leading power per dot and stability across ambient conditions, making it a versatile choice for applications that demand precision and efficiency. Its ability to adapt to varied lighting conditions ensures optimal performance in both indoor and outdoor settings.
The CAN 2.0/CAN FD Controller by Synective Labs is a sophisticated integration option crafted for both FPGA and ASIC applications, enabling a full-featured CAN controller setup. This product adheres to the ISO 11898-1:2015 standard, accommodating traditional CAN and the advanced CAN FD protocols. Significantly, CAN FD enhances data transmission rates up to 10 Mbit/s and expands payload capacities to 64 bytes, surpassing the 8-byte limit of its predecessor. Designed to support a wide variety of FPGA devices from industry giants such as Xilinx, Intel, Lattice, and Microsemi, this controller is equipped with native system bus interfaces like AXI, Avalon, and APB, making it a versatile tool for SOC-type FPGA integration. Its architecture includes multiple advanced features tailored for diagnostics and CAN bus debugging, rendering it indispensable for devices such as data loggers. However, to achieve minimal footprint, all diagnostic features can be disabled at the time of build. In terms of system connectivity, this controller includes functionalities like adaptable transmission rates, DMA support with low-latency interrupt adaptations, and timestamps. It implements a series of operational modes like Listen Only, Auto Acknowledge, and Single Shot, ensuring comprehensive integration options. It’s optimized for systems requiring separate core and system clocks, ensuring compatibility across diverse FPGA architectures.
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