All IPs > Graphic & Peripheral > Receiver/Transmitter
The Receiver/Transmitter semiconductor IP category is a vital component of the Graphics & Peripheral domain, offering crucial connectivity solutions for a wide range of electronic devices. These IPs are designed to support seamless communication between various hardware elements, ensuring efficient data transfer and processing. As the demand for high-speed data exchange continues to rise, the importance of robust Receiver and Transmitter circuits becomes increasingly evident, making this category indispensable for modern electronics.
Semiconductor IPs in this category are engineered to handle diverse applications, such as integrating peripheral devices like monitors, keyboards, and mice with main computing units. These IPs enable the transmission and reception of data signals through various communication protocols, such as HDMI, USB, and Ethernet, among others. Moreover, they facilitate the translation of these signals into formats that different devices can interpret and utilize effectively, thus enhancing device interoperability and performance.
Products in the Receiver/Transmitter category are crafted to meet the stringent demands of modern graphics and peripheral interfaces. They include transceivers and integrated circuits that are capable of managing high-definition audio and video signals, ensuring that media-rich content is delivered with the highest fidelity and efficiency. Furthermore, these semiconductor IPs are critical in reducing latency and improving data throughput, which are essential for applications such as gaming, streaming, and interactive media.
By leveraging the latest advancements in semiconductor technology, the Receiver/Transmitter IPs help manufacturers create devices that offer exceptional connectivity while maintaining power efficiency. This makes them ideal for developing the next generation of smart gadgets, consumer electronics, and computing peripherals, ensuring that they remain competitive in a rapidly evolving technological landscape. As such, these IPs play a pivotal role in shaping the future of connected devices, offering both enhanced performance and greater flexibility in design.
Sunplus’s LVDS IP is designed for efficient data transmission in applications requiring low power consumption and high noise immunity. This Low Voltage Differential Signaling technology is particularly effective for transferring large amounts of data over long distances with minimal signal degradation. Ideal for use in display panels and digital communication systems, LVDS technology offers high-speed data rates while maintaining low electromagnetic interference (EMI). This allows for clearer and more reliable data communication, essential for high-resolution video and complex data streams. The architecture supports scalability and adaptability, making it suitable for various applications including video displays, automotive infotainment systems, and industrial communications. It is engineered to maintain signal integrity even under challenging environmental conditions, a testament to its robustness and reliability.
The AI Camera Module is an innovative solution designed to bring cutting-edge AI capabilities to camera systems. Known for its enhanced image quality and AI-based processing, this module integrates seamlessly with a wide array of systems to deliver superior performance in real-time scenarios. It is equipped to handle complex image processing tasks, making it invaluable for applications ranging from security to AI-driven analytics. By incorporating the latest AI advancements into its operation, this module facilitates heightened awareness and analysis capabilities across various sectors. Altek's AI Camera Module emphasizes high-resolution image capture, ensuring that every detail is accurately recorded and processed for precise analysis. This technology not only supports high-definition imaging but also optimizes power consumption, making it suitable for integration into IoT and edge computing environments. Such adaptations are crucial for systems requiring constant, real-time image processing while retaining high operational efficiency. The module's design also promotes adaptability, allowing for custom configurations that meet specific client requirements. Its capability to integrate AI functionalities directly into the camera hardware enhances its appeal in industries focused on automation, surveillance, and smart analytics. This product affirms Altek's role in pioneering technological advancements that align with current and future demands for intelligent, efficient, and scalable solutions.
xcore.ai stands as a cutting-edge processor that brings sophisticated intelligence, connectivity, and computation capabilities to a broad range of smart products. Designed to deliver optimal performance for applications in consumer electronics, industrial control, and automotive markets, it efficiently handles complex processing tasks with low power consumption and rapid execution speeds. This processor facilitates seamless integration of AI capabilities, enhancing voice processing, audio interfacing, and real-time analytics functions. It supports various interfacing options to accommodate different peripheral and sensor connections, thus providing flexibility in design and deployment across multiple platforms. Moreover, the xcore.ai ensures robust performance in environments requiring precise control and high data throughput. Its compatibility with a wide array of software tools and libraries enables developers to swiftly create and iterate applications, reducing the time-to-market and optimizing the design workflows.
The Aries fgOTN processor family is engineered according to the ITU-T G.709.20 fgOTN standard. This line of processors handles a variety of signals, including E1/T1, FE/GE, and STM1/STM4, effectively monitoring and managing alarms and performance metrics. Aries processors excel at fine-grain traffic aggregation, efficiently channeling fgODUflex traffic across OTN lines to support Ethernet, SDH, PDH client services. Their capacity to map signals to fgODUflex containers, which are then multiplexed into higher order OTN signals, demonstrates their versatility and efficiency. By allowing cascaded configurations with other Aries devices or Apodis processors, Aries products optimize traffic routes through OTN infrastructures, positioning them as essential components in optical networking and next-generation access scenarios.
The KL520 AI SoC introduces edge AI with efficiency in size and power, setting a standard in the market for such technologies. Featuring a dual ARM Cortex M4 CPU, it serves as a versatile AI co-processor, supporting an array of smart devices. It’s designed for compatibility with various sensor technologies, enabling powerful 3D sensing capabilities.
eSi-Connect offers an extensive suite of AMBA-compliant peripheral IPs designed to streamline SoC integration. This suite encompasses versatile memory controllers, standard off-chip interface support, and essential control functions. Its configurability and compatibility with low-level software drivers make it suitable for real-time deployment in complex system architectures, promoting reliable connectivity across various applications.
The PDM-to-PCM Converter from Archband Labs leads in transforming pulse density modulation signals into pulse code modulation signals. This converter is essential in applications where high fidelity of audio signal processing is vital, including digital audio systems and communication devices. Archband’s solution ensures accurate conversion, preserving the integrity and clarity of the original audio. This converter is crafted to seamlessly integrate with a wide array of systems, offering flexibility and ease-of-use in various configurations. Its robust design supports a wide range of input frequencies, making it adaptable to different signal environments. The PDM-to-PCM Converter also excels in minimizing latency and reducing overhead processing times. It’s engineered for environments where precision and sound quality are paramount, ensuring that audio signals remain crisp and undistorted during conversion processes.
Silicon Creations crafts highly reliable LVDS interfaces designed to meet diverse application needs, going from bi-directional I/Os to specialized uni-directional configurations. Spanning process compatibilities from 90nm CMOS to advanced 7nm FinFET, these interfaces are a cornerstone for high-speed data communication systems, thriving particularly in video data transmission and chip-to-chip communications. Supporting robust data rates over multiple channels, the LVDS Interfaces guarantee flexible programmability and protocol compatibility with standards such as FPD-Link and Camera-Link. They capitalize on proven PLL and CDR architectures for superior signal integrity and error-free data transfers. Operating efficiently in various technology nodes, they remain highly effective across collaborative chipset environments. The interfaces are fortified with adaptable features like dynamic phase alignment to stabilize data sequences and on-die termination options for superior signal integrity. Their proven record places them as a critical enabler in applications where consistent high-speed data transfer is paramount, demonstrating Silicon Creations’ prowess in delivering industry-leading communication solutions.
The Apodis family of Optical Transport Network processors adheres to ITU-T standards, offering a comprehensive suite for signal termination, processing, and multiplexing. Designed to handle both SONET/SDH and Ethernet client services, these processors map signals to Optical Transport Network (OTN), empowering versatile any-port, any-service configurations. Apodis processors are notable for their capacity to support up to 16 client ports and four 10G OTN line ports, delivering bandwidth scalability up to 40G, crucial for wireless backhaul and fronthaul deployments. With a robust, non-blocking OTN switching fabric, Apodis facilitates seamless client-to-line and line-to-line connections while optimally managing network bandwidth. This adaptability makes the Apodis processors an ideal choice for next-generation access networks and optical infrastructures.
The Mixed-Signal CODEC offered by Archband Labs integrates advanced analog and digital audio processing to deliver superior sound quality. Designed for a variety of applications such as portable audio devices, automotive systems, and entertainment systems, this CODEC provides efficiency and high performance. With cutting-edge technologies, it handles complex signal conversions with minimal power consumption. This CODEC supports numerous interface standards, making it a versatile component in numerous audio architectures. It's engineered to offer precise sound reproduction and maintains audio fidelity across all use cases. The integrated components within the CODEC streamline design processes and reduce the complexity of audio system implementations. Furthermore, the Mixed-Signal CODEC incorporates features that support high-resolution audio, ensuring compatibility with high-definition sound systems. It's an ideal choice for engineers looking for a reliable and comprehensive audio processing solution.
ISELED is an innovative technology that revolutionizes automotive interior lighting by integrating all necessary hardware functions for fully software-defined lighting. It features smart RGB LEDs which are pre-calibrated by manufacturers, ensuring consistent color temperature and exceptional lighting quality. This technology simplifies the integration process by allowing users to send simple digital commands to control the color output of the LEDs without needing additional complex setups for color mixing and temperature compensation. ISELED is equipped to handle synchronous lighting displays and dynamic effects across vehicle interiors. The connectivity aspect of ISELED is enhanced by its ILaS protocol, allowing direct cable connections between lighting systems and enabling efficient power conversion. This makes it suitable for applications requiring resilience in communication, despite potential power failures on the board. With capabilities for bridging data over Ethernet, ISELED supports centralized control and synchronization from a vehicle's ECU.
The Ultra-Low Latency 10G Ethernet MAC IP core by Chevin Technology exemplifies cutting-edge design for high-speed network communications, catered specifically to deliver the lowest possible latency. It is meticulously constructed to meet the demands of applications that require minimal delay in data exchange, thus maximising data throughput. The IP core is finely tuned for deployment in FPGAs, optimizing the balance between performance and resource utilization. Benefiting from a streamlined logic architecture, this IP core enhances the efficiency of hardware accelerations and simplifies the incorporation of Ethernet connectivity into customer systems. Its fundamental construction is rooted in Chevin’s extensive experience with Ethernet technologies and it has been thoroughly tested to ensure reliable operation across a diverse range of settings. This Ethernet MAC utilises all-logic architecture which removes need for additional CPU or software intervention, providing immense power savings and reduced system complexity. Features like programmable interframe gap control and flexible licensing allow for the tailored installation in both traditional and contemporary systems. The combination of robust performance capabilities alongside expert support creates a compelling choice for integrators focused on high-speed, low-latency Ethernet solutions.
The Chipchain C100 is a pioneering solution in IoT applications, providing a highly integrated single-chip design that focuses on low power consumption without compromising performance. Its design incorporates a powerful 32-bit RISC-V CPU which can reach speeds up to 1.5GHz. This processing power ensures efficient and capable computing for diverse IoT applications. This chip stands out with its comprehensive integrated features including embedded RAM and ROM, making it efficient in both processing and computing tasks. Additionally, the C100 comes with integrated Wi-Fi and multiple interfaces for transmission, broadening its application potential significantly. Other notable features of the C100 include an ADC, LDO, and a temperature sensor, enabling it to handle a wide array of IoT tasks more seamlessly. With considerations for security and stability, the Chipchain C100 facilitates easier and faster development in IoT applications, proving itself as a versatile component in smart devices like security systems, home automation products, and wearable technology.
The Flexibilis Ethernet Switch (FES) is an advanced Layer 2 switch IP core designed to enable gigabit forwarding capabilities across multiple Ethernet ports. Compatible with IEEE 802.1D MAC bridges, FES features triple-speed Ethernet interfaces for efficient handling and prioritization of network traffic. Its integration with IEEE 1588 Precision Time Protocol ensures accurate timekeeping across the network, which is crucial for applications requiring precise timing. The FES supports various configurations and interfaces, making it adaptable to specific application requirements while maintaining robust network performance.
The ADQ35 is a high-throughput digitizer designed for critical signal processing applications. Known for its 12-bit accuracy and high sampling rates, it stands out in delivering up to 10 GSPS, supporting single or dual-channel data streams. This ensures data integrity and speed for applications that demand precision and reliability, such as telecommunications and high-speed imaging. Equipped with enhanced processing capabilities, the ADQ35 ensures superior handling of complex datasets, making it suitable for scientific research and advanced electronics projects. Its robust design caters to the needs of modern digital systems, allowing for a seamless integration into existing infrastructure to facilitate expansive projects. This device also features streaming capabilities that provide a continuous flow of high-quality data, excelling in applications that require constant monitoring and data analysis. The ADQ35 digitizer is an excellent choice for industries that rely on swift and accurate data interpretation, enhancing overall system performance and technical output.
The DisplayPort 1.4 IP core by Parretto is designed for efficient video signal transmission, providing comprehensive solutions for both source (DPTX) and sink (DPRX) configurations. Supporting link rates from 1.62 to 8.1 Gbps, this core offers flexibility for different applications, including embedded DisplayPort (eDP) rates. It can handle 1, 2, and 4 DP lanes, and supports diverse video interfaces such as native video and AXI stream. This IP core accommodates Single Stream Transport (SST) and Multi Stream Transport (MST) modes, adapting to different output requirements. Its dual and quad pixels per clock with rich color managing capabilities—including RGB and various YCbCr formats—enable it to meet high-quality video standards. A secondary data packet interface allows for straightforward audio and metadata transport. Equipped with a Video Toolbox (VTB), it simplifies video processing tasks, including clock recovery and pattern generation. The core is compatible with several FPGA devices like AMD's UltraScale+ and Artix-7, as well as Intel's Cyclone 10 GX and Arria 10 GX.
The PRBS Generator, Checker, and Error Counter is a comprehensive solution within Kamaten's IP portfolio, designed to efficiently monitor and analyze serial data streams. It features an all-in-one generator, a checker for error detection, and an error counter, supporting PRBS orders 7, 15, and 31. This IP is ideal for high-speed data applications, equipped with differential CMOS data and clock inputs and outputs, offering a compact and power-efficient design with a power down mode for energy savings. The PRBS Generator, Checker, and Error Counter is designed for robustness and reliability in various environments, operating effectively at a high data rate of up to 36 Gbps. It's built on the well-established TSMC 28HPC process node, ensuring compatibility with modern semiconductor processes. The design also incorporates a power management feature that consumes 80 mA at a 32 Gbps rate, which scales with different data rates. Given its scalability and compact form factor, the PRBS solution is well-suited for integration into larger systems requiring precise data stream monitoring and error checking. This makes it an attractive choice for engineers looking to implement reliable high-speed serial data analysis in their projects.
RegSpec is a cutting-edge tool that streamlines the generation of control and status register code, catering to the needs of IP designers by overcoming the limitations of traditional CSR generators. It supports complex synchronization and hardware interactions, allowing designers to automate intricate processes like pulse generation and serialization. Furthermore, it enhances verification by producing UVM-compatible code. This tool's flexibility shines as it can import and export in industry-standard formats such as SystemRDL and IP-XACT, interacting seamlessly with other CSR tools. RegSpec not only generates verilog RTL and SystemC header files but also provides comprehensive documentation across multiple formats including HTML, PDF, and Word. By transforming complex designs into streamlined processes, RegSpec plays a vital role in elevating design efficiency and precision. For system design, it creates standard C/C++ headers that facilitate firmware access, accompanied by SystemC models for advanced system modeling. Such comprehensive functionality ensures that RegSpec is invaluable for organizations seeking to optimize register specification, documentation, and CSR generation in a streamlined manner.
Certus Semiconductor's Digital I/O solutions are engineered to meet various GPIO/ODIO standards. These versatile libraries offer support for standards such as I2C, I3C, SPI, JEDEC CMOS, and more. Designed to withstand extreme conditions, these I/Os incorporate features like ultra-low power consumption, multiple drive strengths, and high levels of ESD protection. These attributes make them suitable for applications requiring resilient performance under harsh conditions. Certus Semiconductor’s offerings also include a variety of advanced features like RGMII-compliant IO cells, offering flexibility for different project needs.
The 10G Ethernet MAC and PCS IP core from Chevin Technology is crafted to ensure seamless integration of high-speed Ethernet connectivity within FPGA platforms. This solution underscores Chevin Technology’s commitment to providing adaptable and resource-efficient Ethernet IP cores. Supporting a range of interfaces, it optimizes the synthesis of duplex 10Gbit/s Ethernet, making it ideal for implementation in systems that require high data throughput. The integration process is made effortless through detailed user guides and expert support, making it possible to incorporate this IP into varied FPGA platforms effectively. Its low-latency architecture supports high-performance communications while occupying minimal FPGA resources. Designed in accordance with IEEE 802.3 standards, this MAC/PCS core facilitates transmitting and receiving data at unrivalled speeds. The compact design ensures that broader functionalities and additional IP can comfortably reside on the FPGA, thereby enriching the application possibilities without inflating costs. Streamlining data transfer processes, the core offers flexible licensing to support various project needs, providing an unparalleled level of adaptability. With strategically laid out features that include CRC32 error detection and correction capabilities, the 10G Ethernet MAC and PCS IP core supports rapid data transfers while maintaining reliability. It incorporates advanced fault management and statistics blocks for detailed operational insights and robust performance monitoring. The core is compatible with leading industry boards and comes equipped with all necessary integrations to ensure optimal functionality across various platforms.
D2D® Technology, developed by ParkerVision, is a revolutionary approach to RF conversion that transforms how wireless communication operates. This technology eliminates traditional intermediary stages, directly converting RF signals to digital data. The result is a more streamlined and efficient communication process that reduces complexity and power consumption. By bypassing conventional analog-to-digital conversion steps, D2D® achieves higher data accuracy and reliability. Its direct conversion approach not only enhances data processing speeds but also minimizes energy usage, making it an ideal solution for modern wireless devices that demand both performance and efficiency. ParkerVision's D2D® technology continues to influence a broad spectrum of wireless applications. From improving the connectivity in smartphones and wearable devices to optimizing signal processing in telecommunication networks, D2D® is a cornerstone of ParkerVision's technological offerings, illustrating their commitment to advancing communication technology through innovative RF solutions.
ISPido represents a fully configurable RTL Image Signal Processing Pipeline, adhering to the AMBA AXI4 standards and tailored through the AXI4-LITE protocol for seamless integration with systems such as RISC-V. This advanced pipeline supports a variety of image processing functions like defective pixel correction, color filter interpolation using the Malvar-Cutler algorithm, and auto-white balance, among others. Designed to handle resolutions up to 7680x7680, ISPido provides compatibility for both 4K and 8K video systems, with support for 8, 10, or 12-bit depth inputs. Each module within this pipeline can be fine-tuned to fit specific requirements, making it a versatile choice for adapting to various imaging needs. The architecture's compatibility with flexible standards ensures robust performance and adaptability in diverse applications, from consumer electronics to professional-grade imaging solutions. Through its compact design, ISPido optimizes area and energy efficiency, providing high-quality image processing while keeping hardware demands low. This makes it suitable for battery-operated devices where power efficiency is crucial, without sacrificing the processing power needed for high-resolution outputs.
Dyumnin's RISCV SoC is a versatile platform centered around a 64-bit quad-core server-class RISCV CPU, offering extensive subsystems, including AI/ML, automotive, multimedia, memory, cryptographic, and communication systems. This test chip can be reviewed in an FPGA format, ensuring adaptability and extensive testing possibilities. The AI/ML subsystem is particularly noteworthy due to its custom CPU configuration paired with a tensor flow unit, accelerating AI operations significantly. This adaptability lends itself to innovations in artificial intelligence, setting it apart in the competitive landscape of processors. Additionally, the automotive subsystem caters robustly to the needs of the automotive sector with CAN, CAN-FD, and SafeSPI IPs, all designed to enhance systems connectivity within vehicles. Moreover, the multimedia subsystem boasts a complete range of IPs to support HDMI, Display Port, MIPI, and more, facilitating rich audio and visual experiences across devices.
The RWM6050 Baseband Modem is engineered to facilitate high-data rate applications across wireless communication networks. Designed to serve as a versatile component within various telecommunication systems, it processes signals with precision to enhance data throughput across diverse transmission environments. At its core, the RWM6050 is optimized for operation in complex wireless networks where bandwidth efficiency and robust signal integrity are paramount. It seamlessly integrates into wireless communication frameworks, providing the needed flexibility and scalability to support next-generation network deployments. Through its advanced capabilities, this baseband modem establishes itself as a pivotal element in ensuring reliable, high-speed data transmission. Whether supporting conventional networks or cutting-edge mmWave technology applications, the RWM6050 maintains stellar performance, thereby enhancing the efficiency of communication infrastructures in both commercial and defence sectors.
APIX3 technology represents the pinnacle of data communication solutions for advanced automotive infotainment and cockpit systems. It supports ultra-high definition video resolutions, facilitated by its capacity for multi-channel high-speed data transmission. The technology enables a scalable bandwidth that adapts from entry-level to luxurious, high-end automotive systems, ensuring a broad range of application compatibilities. APIX3 modules are engineered to transmit data at rates of up to 6 Gbps over a shielded twisted pair cable and up to 12 Gbps over a quad twisted pair. This makes them invaluable in systems requiring high levels of data integrity and precision, such as those found in modern, connected vehicle architectures. In addition to supporting complex video channels, APIX3 is compatible with 100 Mbps Ethernet and integrates advanced diagnostic capabilities for cable monitoring, which allows for predictive maintenance by detecting cable degradation. Its backwards compatibility with APIX2 ensures seamless integration and upgradability in existing infrastructures, reinforcing its status as a future-proof solution.
The Orion MFH IP Cores are designed for optimal performance in 4G mobile fronthaul networks, compliant with the ITU-T specifications for CPRI signal multiplexing. They adeptly handle various CPRI options, ranging from 2.4576 Gbps to 12.16512 Gbps, ensuring high compatibility and performance. Featuring both muxponder and transponder configurations, Orion cores facilitate the efficient mapping and transport of CPRI signals via Optical Transport Network infrastructures, ideal for modern telecommunications frameworks. Their advanced capabilities enable telecommunications providers to enhance their network reliability and service delivery, adapting seamlessly to different fronthaul scenarios.
The INAP375R Receiver complements its transmitter counterpart in offering comprehensive high-speed data reception for automotive applications. It supports multiple video and audio channels, facilitating seamless data conversion and transfer for automotive entertainment systems. Designed to work effectively with up to 12 meters of cable, the receiver ensures consistent data fidelity over distance. Incorporating an advanced current mode logic, the INAP375R efficiently handles differential signals, maintaining data integrity even in demanding environments. Its capacity to deliver up to 3Gbps over a single cable ensures compatibility with various automotive applications, be it infotainment or safety-related systems. The versatile interface options of the INAP375R enable it to adapt to varying automotive standards while ensuring reliable performance. With built-in support for AShell protocol for error detection and correction, the receiver guarantees the safe and accurate transmission of critical data across automotive networks, underpinning its suitability for high-reliability applications.
Enclustra's Universal Drive Controller is a versatile IP core designed for controlling a range of motors directly from FPGAs. This robust solution allows simultaneous position and velocity control of up to eight different DC, BLDC, or stepper motors, offering high flexibility for a variety of industrial and robotic applications. The drive controller provides precise and independent motor management features through its customizable architecture, ensuring optimized performance tailored to specific motion control requirements. This capability reduces the need for additional external components, streamlining integration and reducing system complexity. In addition to its primary control features, the Universal Drive Controller supports various communication interfaces, enabling seamless integration into existing systems. This IP core is essential for developers focusing on high-performance motor control systems, thanks to its scalable and adaptable approach to motor management.
aiSim 5 represents a leap forward in automotive simulation technology, underpinning the complex validation processes needed for modern autonomous driving systems. Certified to ISO26262 ASIL-D, this simulator is designed to handle the demanding requirements of advanced driver-assistance systems (ADAS) and autonomous driving technologies. By utilizing AI-driven digital twin creation and sophisticated sensor modeling, aiSim ensures high fidelity in simulations, enabling developers to conduct virtual tests across diverse scenarios that replicate real-world conditions. Featuring a physics-based rendering engine, aiSim allows for the precise simulation of varied environmental conditions like rain, fog, and sunshine, as well as complex sensor configurations. Its open architecture and modular design facilitate easy integration into existing development pipelines, ensuring compatibility with a wide range of testing and development frameworks. The simulator's deterministic simulation capabilities provide reliability and repeatability, which are crucial for validating safety-critical automotive functions. The robust architecture of aiSim extends its utility beyond basic simulations, offering tools such as aiFab for scenario randomization, which helps in exposing edge cases that may not be encountered in typical testing environments. Moreover, its ability to produce synthetic data for training improves the robustness of ADAS systems. With aiSim, the development cycle shortens significantly, allowing automotive manufacturers to bring innovative products to market more efficiently.
The Scorpion family of processors offers support for OSU containers as per the CCSA and IEEE standards, particularly the OSUflex standard. These processors accommodate various client-side signals, including E1/T1, FE/GE, and STM1/STM4, ensuring robust performance monitoring and optional Ethernet rate limitation. Scorpion processors can adeptly map these client signals to OSU or ODU containers, which are subsequently multiplexed to OTU-1 lines. Known for their flexibility and efficiency in handling diverse traffic types, Scorpion processors serve as foundational elements for advancements in access networks and optical service units, ensuring sustained performance in increasingly complex networking environments.
ISPido on VIP Board is a customized runtime solution tailored for Lattice Semiconductors’ Video Interface Platform (VIP) board. This setup enables real-time image processing and provides flexibility for both automated configuration and manual control through a menu interface. Users can adjust settings via histogram readings, select gamma tables, and apply convolutional filters to achieve optimal image quality. Equipped with key components like the CrossLink VIP input bridge board and ECP5 VIP Processor with ECP5-85 FPGA, this solution supports dual image sensors to produce a 1920x1080p HDMI output. The platform enables dynamic runtime calibration, providing users with interface options for active parameter adjustments, ensuring that image settings are fine-tuned for various applications. This system is particularly advantageous for developers and engineers looking to integrate sophisticated image processing capabilities into their devices. Its runtime flexibility and comprehensive set of features make it a valuable tool for prototyping and deploying scalable imaging solutions.
DolphinWare IPs is a versatile portfolio of intellectual property solutions that enable efficient SoC design. This collection includes various control logic components such as FIFO, arbiter, and arithmetic components like math operators and converters. In addition, the logic components span counters, registers, and multiplexers, providing essential functionalities for diverse industrial applications. The IPs in this lineup are meticulously designed to ensure data integrity, supported by robust verification IPs for AXI4, APB, SD4.0, and more. This comprehensive suite meets the stringent demands of modern electronic designs, facilitating seamless integration into existing design paradigms. Beyond their broad functionality, DolphinWare’s offerings are fundamental to applications requiring specific control logic and data integrity solutions, making them indispensable for enterprises looking to modernize or expand their product offerings while ensuring compliance with industry standards.
The Camera ISP Core is designed to optimize image signal processing by integrating sophisticated algorithms that produce sharp, high-resolution images while requiring minimal logic. Compatible with RGB Bayer and monochrome image sensors, this core handles inputs from 8 to 14 bits and supports resolutions from 256x256 up to 8192x8192 pixels. Its multi-pixel processing capabilities per clock cycle allow it to achieve performance metrics like 4Kp60 and 4Kp120 on FPGA devices. It uses AXI4-Lite and AXI4-Stream interfaces to streamline defect correction, lens shading correction, and high-quality demosaicing processes. Advanced noise reduction features, both 2D and 3D, are incorporated to handle different lighting conditions effectively. The core also includes sophisticated color and gamma corrections, with HDR processing for combining multiple exposure images to improve dynamic range. Capabilities such as auto focus and saturation, contrast, and brightness control are further enhanced by automatic white balance and exposure adjustments based on RGB histograms and window analyses. Beyond its core features, the Camera ISP Core is available with several configurations including the HDR, Pro, and AI variations, supporting different performance requirements and FPGA platforms. The versatility of the core makes it suitable for a range of applications where high-quality real-time image processing is essential.
The Advanced Flexibilis Ethernet Controller (AFEC) offers robust Ethernet connectivity through its triple-speed IP block, enhancing network interface capabilities for FPGAs and ASICs. This controller supports both copper and fiber interfaces and is equipped with IEEE 1588 support for precise time synchronization. AFEC reduces CPU load with features like DMA transfer and adjustable interrupt delay, contributing to efficient processor utilization. Its versatility makes it suitable for various high-performance network applications, ensuring flexibility and performance in complex network environments.
ArrayNav is a groundbreaking GNSS solution utilizing patented adaptive antenna technology, crafted to provide automotive Advanced Driver-Assistance Systems (ADAS) with unprecedented precision and capacity. By employing multiple antennas, ArrayNav substantially enhances sensitivity and coverage through increased antenna gain, mitigates multipath fading with antenna diversity, and offers superior interference and jamming rejection capabilities. This advancement leads to greater accuracy in open environments and markedly better functionality within urban settings, often challenging due to signal interference. It is designed to serve both standalone and cloud-dependent use cases, thereby granting broad application flexibility.
Functioning as a comprehensive cross-correlator, the XCM_64X64 facilitates efficient and precise signal processing required in synthetic radar receivers and advanced spectrometers. Designed on IBM's 45nm SOI CMOS technology, it supports ultra-low power operation at about 1.5W for the entire array, with a sampling performance of 1GSps across a bandwidth of 10MHz to 500MHz. The ASIC is engineered to manage high-throughput data channels, a vital component for high-energy physics and space observation instruments.
The XCM_64X64_A is a powerful array designed for cross-correlation operations, integrating 128 ADCs each capable of 1GSps. Targeted at high-precision synthetic radar and radiometer systems, this ASIC delivers ultra-low power consumption around 0.5W, ensuring efficient performance over a wide bandwidth range from 10MHz to 500MHz. Built on IBM's 45nm SOI CMOS technology, it forms a critical component in systems requiring rapid data sampling and intricate signal processing, all executed with high accuracy, making it ideal for airborne and space-based applications.
The MIPITM CSI2MUX-A1F is an innovative video multiplexor designed to manage and aggregate multiple video streams effortlessly. It supports CSI2 rev 1.3 and DPHY rev 1.2 standards, handling inputs from up to four CSI2 cameras and producing a single aggregated video output. With data rates of 4 x 1.5Gbps, it is optimal for applications requiring efficient video stream management and consolidation.
The MIPITM SVRPlus2500 provides an efficient solution for high-speed 4-lane video reception. It's compliant with CSI2 rev 2.0 and DPHY rev 1.2 standards, designed to facilitate easy timing closure with a low clock rating. This receiver supports PRBS, boasts calibration capabilities, and offers a versatile output of 4/8/16 pixels per clock. It features 16 virtual channels and 1:16 input deserializers per lane, handling data rates up to 10Gbps, making it ideal for complex video processing tasks.
The CAN 2.0/CAN FD Controller offered by Synective Labs is a comprehensive CAN controller suitable for integration into both FPGAs and ASICs. This controller is fully compliant with the ISO 11898-1:2015 standard, supporting both traditional CAN and the more advanced CAN FD protocols. The CAN FD protocol enhances the original CAN capabilities by transmitting payloads at increased bitrates up to 10 Mbit/s and accommodating longer payloads of up to 64 bytes compared to the standard 8 bytes. This controller integrates seamlessly with a variety of FPGA devices from leading manufacturers such as Xilinx, Altera, Lattice, and Microsemi. It supports native bus interfaces including AXI, Avalon, and APB, making it versatile and highly compatible with various processing environments. For those deploying System on Chip (SOC) type FPGAs, the controller offers robust processor integration options, making it an ideal choice for complex applications. A standout feature of this IP is its focus on diagnostics and CAN bus debugging, which makes it particularly beneficial for applications like data loggers. These diagnostic features can be selectively disabled during the build process to reduce the controller's footprint for more traditional uses. With its low-latency DMA, interrupt rate adaptation, and configurable hardware buffer size, this CAN controller is engineered for high efficiency and flexibility across different applications.
Designed specifically for high-speed automotive data communication, the INAP590T transmitter handles demanding data loads effectively. This device supports robust video data transmission and is innovatively tailored for automotive environments, ensuring high levels of integration and performance. The INAP590T is built with features that accommodate HDMI and DSI interfaces, ensuring seamless adaptability. Its capacity for managing dual video channels highlights its applicability in complex automotive infotainment systems. The INAP590T also supports AShell channels and Ethernet functionalities, underscoring its versatility in handling comprehensive automotive data transmission requirements. Notably, the transmitter supports dual-port communication, enhancing its utility in modern automotive networking. With its focus on high-fidelity data transfer and the ability to handle diverse formats, it represents a pivotal component in advancing vehicle connectivity and infotainment solutions.
Designed for high-capacity data transfer over fiber optic networks, the SER12G facilitates 32:1 serialization for robust telecommunications. Capable of sustaining data rates from 8.5Gb/s to 11.3Gb/s, this module is essential for SONET/SDH and 10GbE operations, embracing IBM's 65nm CMOS technology. The design boasts low power requirements and integrates CMU and frac N PLL, making it suitable for both line and host side transmission, effectively enhancing data throughput and signal integrity.
As part of the advanced communication toolkit, the DSER12G addresses the need for robust data/clock recovery and deserialization at rates between 8.5Gb/s to 11.3Gb/s. Prominent in 10GbE, OC-192, and equivalent setups, it boasts ultra-low power design principles grounded in IBM's 65nm technology. Supporting high noise immunity and compact integration, it is a cornerstone in systems requiring efficient data management and communications interfaces across various digital infrastructures.
Analog Bits provides advanced I/O solutions tailored for high-speed data transfer and die-to-die communication. Their I/O offerings are designed to minimize power consumption while delivering optimal signaling quality through differential clocking and signaling techniques. These solutions are crafted to ensure effective integration with modern SoC architectures, providing customization options to meet specific technical requirements. The I/O technologies developed by Analog Bits are proven in high-volume production at nodes as small as 5nm, ensuring reliability and performance. Manufactured using state-of-the-art processes, Analog Bits' I/O IP supports a broad range of applications, from consumer electronics to complex server environments. Their expertise in transistor-efficient architecture further boosts signaling capabilities while maintaining compact die areas, making them an ideal choice for next-generation semiconductor development.
Bridging complex data communication requirements, the SERDES12G offers comprehensive serialization/deserialization capabilities, supporting 32:1 and 1:32 operations at speeds of 8.5Gb/s to 11.3Gb/s. With robust low power features, its design leverages IBM's 65nm technology, vital for SONET/SDH and XFI protocols in modern telecommunication systems. By integrating CDR and CMU, it provides high performance and stability, ensuring seamless data handling across a wide array of applications.
Certus Semiconductor's Analog I/O offerings bring ultra-low capacitance and robust ESD protection to the forefront. These solutions are crafted to handle extreme voltage conditions while securing signal integrity by minimizing impedance mismatches. Key features include integrated ESD and power clamps, support for broad RF frequencies, and the ability to handle signal swings below ground. Ideal for high-speed RF applications, these Analog I/Os provide superior protection and performance, aligning with the most demanding circuit requirements.
Silicon Creations' Bi-Directional LVDS Interfaces are engineered to offer high-speed data transmission with exceptional signal integrity. These interfaces are designed to complement FPGA-to-ASIC conversions and include broad compatibility with industry standards like FPD-Link and Camera-Link. Operating efficiently over processes from 90nm to 12nm, the LVDS interfaces achieve data rates exceeding 3Gbps using advanced phase alignment techniques. A standout feature of this IP is its capability to handle independent LVCMOS input and output functions while maintaining high compatibility with TIA/EIA644A standards. The bi-directional nature allows for seamless data flow in chip-to-chip communications, essential for modern integrated circuits requiring high data throughput. The design is further refined with trimmable on-die termination, enhancing signal integrity during operations. The LVDS interfaces are versatile and highly programmable, meeting bespoke application needs with ease. The interfaces ensure robust error rate performance across varying phase selections, making them ideal for video data applications, controllers, and other high-speed data interfaces where reliability and performance are paramount.
The MIPITM V-NLM-01 is a specialized non-local mean image noise reduction product designed to enhance image quality through sophisticated noise reduction techniques. This hardware core features a parameterized search-window size and adjustable bits per pixel, ensuring a high degree of customization and efficiency. Supporting HDMI with resolutions up to 2048×1080 at 30 to 60 fps, it is ideally suited for applications requiring image enhancement and processing.
SystemBIST offers a versatile plug-and-play solution for FPGA configuration and JTAG testing with its unique patented architecture. This product is ideal for creating high-quality, self-testable, and in-the-field reconfigurable equipment, ensuring reliable integration and testing in any IEEE 1532 or 1149.1 compliant devices. SystemBIST efficiently utilizes existing system flash memory to store vital configuration and test data, which can be applied at power-up, enabling cost-effective setup without the need for multiple configuration PROMs. Additionally, SystemBIST enhances PCB testing efficacy by embedding deterministic Built-In Self-Test (BIST) capabilities, using manufacturing-based JTAG/IEEE 1149.1 test patterns to conduct efficient system tests. This platform simplifies the adoption of robust security measures, including 128-bit security identifiers, helping prevent unauthorized cloning and tampering of FPGAs. By doing so, it seamlessly supports the intricate demands of modern electronics and embedded systems. The platform not only reduces the cost associated with in-system configuration but also advances the embedded test methodology by enabling debugging without removing and replacing programmable components. It offers a scalable and reusable test infrastructure, applicable across different product generations and varying applications, thereby extending the operational life and value of the technology involved.
The Universal High-Speed SERDES ranging from 1G to 12.5G is a significant component for enabling rapid serial communication across digital systems. Its architecture is optimized for converting parallel data into serial streams, effectively reducing wiring complexity and simplifying chip design. This IP is essential for systems demanding high bandwidth and fast data rates, such as in data centers, networking equipment, and high-performance computing platforms. The product supports a wide range of data rates, starting from 1Gbps and scaling up to 12.5Gbps, ensuring adaptability across numerous applications. This capability is particularly advantageous in managing the dynamic bandwidth requirements seen in today's electronics landscape. As a result, it serves as a foundational IP for engineers seeking reliable and fast data transmission solutions. Additionally, this SERDES technology is critical for applications where data integrity and speed cannot be compromised. Its sophisticated design ensures efficient power usage, making it suitable for both power-sensitive and high-speed demanding environments. With its broad application scope, the Universal High-Speed SERDES is a go-to solution for implementers aiming to enhance connectivity and performance in advanced digital systems.
Join the world's most advanced semiconductor IP marketplace!
It's free, and you'll get all the tools you need to discover IP, meet vendors and manage your IP workflow!
Join the world's most advanced AI-powered semiconductor IP marketplace!
It's free, and you'll get all the tools you need to advertise and discover semiconductor IP, keep up-to-date with the latest semiconductor news and more!
Plus we'll send you our free weekly report on the semiconductor industry and the latest IP launches!