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All IPs > Wireline Communication > Ethernet > ULL PCIe DMA Controller

ULL PCIe DMA Controller

From Orthogone Technologies Inc.

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Description

Orthogone’s ULL PCIe DMA Controller is engineered for ultra-fast data transfer between FPGA and host CPU via a PCIe interface, crucial for data center applications that demand low latency. This controller features a round-trip latency of less than 585 nanoseconds, optimized for high-speed data streaming applications.

Built on a custom multi-channel Circular Buffer DMA architecture, the controller supports kernel bypass, enhancing performance by reducing latency and jitter. It is designed for seamless integration with standard PCIe endpoints, navigating gen 3 and gen 4 specifications, making it highly adaptable.

Key features of this controller include high timing margins, easy integration with Orthogone’s other networking solutions, and efficient resource utilization within FPGA platforms. It is particularly tailored for environments necessitating top-tier latency metrics, supporting kernel-bypass Linux applications.

Features
  • Kernel bypass implementation
  • Custom multi-channel DMA architecture
  • Supports Gen 3 and Gen 4 PCIe
Tech Specs
Class Value
Categories Wireline Communication > Ethernet
Interface Controller & PHY > PCMCIA
Round-Trip Latency < 585ns
DMA Architecture Custom multi-channel Circular Buffer
PCIe Standards Gen 3, Gen 4
Availability All Countries & Regions
Applications
  • Low-latency network streaming
  • FPGA-based data transfer
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