The Atomic Rules UDP Offload Engine is a leading-edge FPGA IP core enabling dynamic UDP/IP communication across network nodes at varying capacities, including 10, 25, 40, 50, 100, and 400 GbE. Designed to optimize throughput, it supports various operational requirements while future-proofing network applications. Essential UDP tasks, such as checksum verification, segmentation, and reassembly, are offloaded from software onto hardware, enhancing efficiency and reducing processing overhead.
Capable of supporting datagrams of arbitrary size up to IPv4 limits, the UDP Offload Engine features a 16-entry ARP cache and has native support for VLAN configurations, enhancing layer 3 connectivity for non-UDP processes through direct application level interfacing. With robust support for super-jumbo frames up to 16K Bytes, it maintains connectivity integrity and speeds across diverse throughput environments without compromising on packet accuracy.
Its low footprint implementation allows multiple core deployments within single FPGA instances. This component excels in various reference designs, such as maximizing data movement in cloud data centers, and enhancing multimedia streaming efficiency, showcasing its adaptability across different interface standards such as Avalon and AXI4. Its compatibility with a broad range of Ethernet MACs further underlines its suitability for integration in existing network systems.
