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All IPs > Memory Controller & PHY > SDRAM Controller > TwinBit Gen-1

TwinBit Gen-1

From NSCore

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Description

TwinBit Gen-1 is NSCore's pioneering solution in embedded non-volatile memory technology, optimized for seamless integration into CMOS logic processes across nodes ranging from 180nm to 55nm. Known for its robust endurance performance, it supports over 10,000 program/erase cycles, making it highly reliable for repeated usage. This IP is designed without necessitating any additional masks or process steps, which aligns with NSCore’s ethos of simplifying the integration process.

TwinBit Gen-1's flexible memory configuration, spanning 64 bits up to 512K bits, ensures its applicability in a wide array of domains. From enabling secure key storage to supporting analog trimming and system switches on ASICs/ASSPs, it offers a broad spectrum of functional capabilities, making it ideally suited for modern IoT devices and embedded systems.

With built-in test circuits that facilitate stress-free test environments and automotive-grade reliability, TwinBit Gen-1 presents a formidable option for applications that demand low-voltage and low-power operations. Its alignment with standard IPs and lack of additional process overhead also contribute to its attractive development turnaround time and cost-effectiveness.

Features
  • High density and Small area
  • No additional mask required
  • Automotive grade under AEC-Q100
  • Low-voltage and low-power operations
  • Built-in test circuit
Foundries & Process Nodes
Foundry Process Nodes
All Foundries 65nm
180nm
Tech Specs
Applications
  • IoT device
  • MCU
  • FPGA
  • ASIC with embedded NOR FLASH
  • ASSP with field re-writable firmware
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