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All IPs > Processor > Processor Cores > SCR1 Microcontroller Core

SCR1 Microcontroller Core

From Syntacore

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Description

SCR1 is an open-source and silicon-proven microcontroller core, tailored for deeply embedded applications. This 32-bit RISC-V core supports the standard ISA with optional extensions for multiplication, division, and compressed instructions. The design comprises a simple in-order 4-stage pipeline, providing efficient interrupt handling with an IPIC unit. It connects seamlessly with various interfaces, including AXI4, AHB-Lite, and JTAG, enhancing its adaptability across different systems.

The SCR1 core boasts a Tightly-Coupled Memory (TCM) subsystem supporting up to 64KB. It features up to 16 interrupt lines and a range of performance monitoring tools making it ideal for IoT, control systems, and smart card applications. Pre-configured software development tools, including IDEs like Eclipse and Visual Studio Code plugins, complement the core, enabling developers to quickly deploy applications tailored to SCR1’s architecture.

Additionally, SCR1 comes packaged with a rich suite of documentation and pre-configured FPGA-based SDK, ensuring a smooth transition from development to implementation. Its GPL-compliant open-source license ensures flexibility for commercial and educational use, making it a versatile choice for a wide range of projects.

Features
  • Open-source under permissive SHL license
  • Pre-configured software tools
Tech Specs
Class Value
Categories Processor > Processor Cores
Processor > CPU
Processor > Microcontroller
Processor > Building Blocks
Core ISA RV32I/E[MC]
Pipeline 2-4 stages
Memory Subsystem Tightly-Coupled Memory (TCM) Up to 64KB
Interrupt Subsystem IPIC Up to 16 interrupt lines
Debug Subsystem Interface JTAG/cJTAG-compliant interface
Performance Monitoring 2 performance counters
Availability All Countries & Regions
Applications
  • Internet of things
  • Smart cards
  • Control systems
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