SCR1 is an open-source and silicon-proven microcontroller core, tailored for deeply embedded applications. This 32-bit RISC-V core supports the standard ISA with optional extensions for multiplication, division, and compressed instructions. The design comprises a simple in-order 4-stage pipeline, providing efficient interrupt handling with an IPIC unit. It connects seamlessly with various interfaces, including AXI4, AHB-Lite, and JTAG, enhancing its adaptability across different systems.
The SCR1 core boasts a Tightly-Coupled Memory (TCM) subsystem supporting up to 64KB. It features up to 16 interrupt lines and a range of performance monitoring tools making it ideal for IoT, control systems, and smart card applications. Pre-configured software development tools, including IDEs like Eclipse and Visual Studio Code plugins, complement the core, enabling developers to quickly deploy applications tailored to SCR1’s architecture.
Additionally, SCR1 comes packaged with a rich suite of documentation and pre-configured FPGA-based SDK, ensuring a smooth transition from development to implementation. Its GPL-compliant open-source license ensures flexibility for commercial and educational use, making it a versatile choice for a wide range of projects.