All IPs > Security IP > Embedded Security Modules
In today's interconnected technological landscape, the security of embedded systems has emerged as a crucial challenge. This is where Embedded Security Modules (ESMs) in semiconductor IPs play a pivotal role. These modules are specialized components integrated into chips, offering enhanced protection against a variety of threats including unauthorized access, data breaches, and malicious attacks. By embedding security at the silicon level, these IPs provide a hardware root of trust, ensuring that the integrity, confidentiality, and authenticity of data and communications are uncompromised.
Embedded Security Modules are used across a spectrum of applications, catering to industries such as IoT, automotive, telecommunications, and consumer electronics. In the IoT realm, these modules protect smart devices from vulnerabilities and ensure secure data transmission between interconnected gadgets. In the automotive sector, ESMs safeguard vehicular communication systems and onboard diagnostics from hacking attempts. Similarly, telecommunications networks utilize these modules to establish secure channels and prevent espionage, maintaining the privacy of sensitive communications.
The products found within this category include a range of security-enhancing solutions such as secure boot processors, cryptographic accelerators, hardware random number generators, and secure element IPs. These products are designed to address specific security needs, offering flexibility and scalability to developers and manufacturers. For instance, secure boot processors ensure that only authenticated software runs on a device, while cryptographic accelerators speed up data encryption and decryption processes, vital for real-time secure communications.
Moreover, as digital threats evolve, Embedded Security Modules semiconductor IPs continue to advance, incorporating cutting-edge technologies like quantum encryption readiness and machine learning-led anomaly detection. This ongoing innovation not only fortifies existing systems but also prepares them for future challenges, making Embedded Security Modules a cornerstone of secure electronic design for years to come. Whether you are developing chips for personal gadgets or intricate industrial systems, integrating these security IPs ensures robust protection and compliance with stringent security standards, enhancing consumer trust and product reliability.
The AHB-Lite APB4 Bridge is a critical interconnect component that facilitates communication between AMBA 3 AHB-Lite and AMBA APB bus protocols. This soft IP is parametrically designed, allowing for optimized connections between an AHB-Lite bus master and a range of APB peripherals. Its architecture is focused on providing efficient, low-latency data transfer, supporting streamlined communication in complex SoC designs. Implementing this bridge in a system allows developers to seamlessly integrate a wide variety of peripheral devices, leveraging the simplicity and reduced resource demands of the APB protocol. The design is highly configurable, supporting various data widths and clock domains, enabling precise tailoring to fit the specific needs of any system. By using the AHB-Lite APB4 Bridge, designers can ensure comprehensive and efficient integration of peripherals into larger system-on-chip (SoC) designs, enhancing their functionality and performance.
The AHB-Lite Multilayer Switch is a sophisticated interconnect solution designed to support multiple bus masters and slaves within an AMBA AHB-Lite system. It features high performance and low latency, facilitating efficient communication between various system components by providing a flexible interconnection fabric. This architecture can manage a significant number of simultaneous data transfers, optimizing the throughput in complex SoC environments. This switch fabric empowers designers to construct scalable systems with numerous processors and peripherals without compromising on speed or efficiency. Its configurability allows for tailored setups in terms of bus masters and slaves, supporting high-priority traffic schemes for enhanced system operations. By providing a robust and versatile solution, the AHB-Lite Multilayer Switch plays a crucial role in managing data flow, ensuring seamless operation across diverse embedded applications.
Polar ID is a groundbreaking biometric security solution designed for smartphones, providing a secure and convenient face unlock feature. Employing advanced meta-optic technology, Polar ID captures the polarization signature of a human face, offering an additional layer of security that easily identifies human tissue and foils sophisticated 3D mask attempts. This technology enables ultra-secure facial recognition in diverse environments, from daylight to complete darkness, without compromising on the user experience. Unlike traditional facial recognition systems, Polar ID operates using a simple, compact design that eliminates the need for multiple optical modules. Its unique capability to function in any lighting condition, including bright sunlight or total darkness, distinguishes it from conventional systems that struggle under such scenarios. Furthermore, the high resolution and precision of Polar ID ensure reliable performance even when users have their face partially obscured by sunglasses or masks. With its cost-effectiveness and small form factor, Polar ID is set to disrupt the mobile device market by making secure biometric authentication accessible to a broader range of smartphones, not just high-end models. By simplifying the integration of facial recognition technology, Polar ID empowers mobile devices to replace less secure, inconvenient fingerprint sensors, thus broadening the reach and applicability of facial biometrics in consumer electronics.
Up to 1M KeyEnc/sec with improved power efficiency PQPerform-Lattice is a powerful hardware-based product designed for high throughput, high-performance, and high speed. It adds post-quantum cryptography for applications that typically handle a large number of transactions, such as high-capacity network hardware applications and secure key management HSMs. Optimizable for secure boot, as well as other use-cases, PQPerform-Lattice supports FIPS 204 ML-DSA for quantum-secure digital signature verification, as well as FIPS 203 ML-KEM for quantum key exchange. PQPerform-Lattice supports AXI4, PCIe, and is deployable in multiple instances, making it a powerful solution for existing systems and infrastructure requirements.
PUFrt stands as a flagship hardware root of trust solution, incorporating PUF technology to create a unique and unclonable UID directly on the chip. This ensures robust security from the ground up, offering features such as TRNG, secure OTP, and an attack-resistant shell. The architecture of PUFrt provides a resilient foundation for semiconductor devices, helping to mitigate reverse engineering and counterfeiting risks. It integrates seamlessly with various systems, offering a trusted base for lightweight hardware security keys and full-function security coprocessors.
CrossBar's ReRAM Memory technology introduces a revolutionary approach to non-volatile memory that transcends the limitations of traditional memory solutions. ReRAM, or Resistive RAM, distinguishes itself through its simple architectural design, enabling manufacturers to scale it down to sizes smaller than 10nm and integrate it seamlessly with existing logic processes in a single foundry. This advancement allows for unprecedented energy efficiency, with ReRAM consuming just 1/20th of the energy compared to traditional flash memory solutions, while also offering dramatically improved endurance and performance metrics. The scalability of ReRAM supports high-density memory applications, including its potential for 3D stacking, which allows terabytes of storage to be integrated on-chip. ReRAM excels in delivering low latency and high-speed operations, making it especially suitable for applications requiring rapid data access and processing, such as in data centers and IoT devices. Its robust performance characteristics make it an ideal solution for modern computing demands, offering both hard macros and architectural licenses depending on customer needs. Another key benefit of ReRAM is enhanced security, essential in applications ranging from automotive to secure computing. By providing low power consumption combined with high data integrity, ReRAM is positioned as a pivotal technology in future-proofing data storage solutions. It has proven to be a secure alternative to flash memory, with superior operational characteristics that address the diverse needs of contemporary electronic and computing environments.
Trilinear Technologies' HDCP Encryption-Decryption Engine is a sophisticated solution designed to safeguard digital content as it traverses various transmission channels. This engine is compliant with the HDCP standards 1.4 and 2.3, offering robust protection mechanisms to ensure that digital media investments are secure from unauthorized access and piracy. The engine’s hardware acceleration capabilities represent a crucial advantage, significantly reducing the load on the system processor while maintaining real-time encryption and decryption functions. This not only enhances performance but also extends the operational life of the hardware involved, making it suitable for high-demand media applications across sectors such as broadcast, entertainment, and corporate environments. Trilinear’s HDCP Encryption-Decryption Engine ensures compatibility with a wide array of consumer and professional-grade video equipment, providing seamless protection without interference in media quality or transmission speed. Its flexible integration options allow it to be smoothly incorporated into existing infrastructures, whether in standalone media devices or complex SoC architectures. Supported by comprehensive software resources, the HDCP Encryption-Decryption Engine provides an all-encompassing solution that includes necessary software stacks for managing device authentication and link maintenance. Its ability to safeguard high-definition content effectively makes it an invaluable asset for entities focused on secure content delivery and rights management.
eSi-Crypto provides advanced features in encryption and authentication, offering an impressive suite of solutions including True Random Number Generators (TRNGs), cryptographic processing, and Public Key Acceleration. Engineered to optimize resource usage without compromising throughput, it is designed to secure devices effectively in various critical applications.
Securyzr iSSP is an advanced security lifecycle management solution, designed to offer seamless integration of security features throughout the device lifecycle. It provides a comprehensive platform for managing security tasks such as provisioning, firmware updates, security monitoring, and device identity management. The iSSP is built to facilitate zero-touch security lifecycle services, ensuring robust protection against potential cyber threats from chip to cloud. It stands out with its ability to handle post-quantum cryptography (PQC), making it future-ready and capable of addressing upcoming security challenges in an evolving digital landscape.
FIPS 140-3 CAVP-compliant, compact lattice-based hardware PQC engine PQPlatform-Lattice is a compact FIPS 140-3 CAVP-compliant, PQC engine that adds post-quantum support for hardware components and embedded devices, using lattice-based cryptographic algorithms such as ML-KEM (FIPS 203) for post-quantum key exchange, and ML-DSA (FIPS 204) – post-quantum digital signature verification. It provides secure acceleration of lattice-based PQC alongside support for traditional cryptography. Its use cases include strong user authentication, protecting hardware keys, and small-footprint, configurable side-channel protection. PQPlatform-Lattice is designed for minimal area as well as maximum compatibility and can be deployed with optional firmware-backed side-channel countermeasures. It is covered by multiple PQShield implementation patents.
Highly-optimized PQC implementations, capable of running PQC in < 15kb RAM PQCryptoLib-Emebedded is a versatile, CAVP-compliant version of PQCryptoLib, PQShield’s CMVP-certified library of post-quantum cryptographic algorithms. With its design focused on ultra-small area efficiency, PQCryptoLib-Embedded has been specifically designed for embedded systems, microcontrollers and memory-constrained devices. It could be the first step towards a hardware solution for providing PQC integration to devices already in the field.
The NMOS Control Platform developed by Nextera Video facilitates seamless integration and interoperability of ST 2110 devices across multi-vendor IP networks. This platform democratizes management and control, providing a robust framework compatible with a variety of processors. The NMOS standards are crucial in enabling straightforward discovery, registration, and connection management of media devices, a necessity for those seeking a streamlined IP-enabled production environment. This software-based core specializes in tasks essential to networked media systems, including device discovery (IS-04), connection management (IS-05), and event tally handling (IS-07). Its architecture supports audio channel mapping and secure communications through HTTPS and TLS, simplifying operations and enhancing device security. Its plug-and-play approach vastly reduces the complexity usually associated with integrating multi-manufacturer product systems. Recognized by leading industry bodies like the European Broadcasters Union, NMOS Control Software ensures interoperability and compliance with IP standards, making it a trusted solution for broadcast media facilities upgrading to IP-based setups. It supports operational efficiency by minimizing debugging and interoperability hurdles that are common in IP transition projects.
Fully autonomous, FIPS 140-3 CAVP compliant PQC subsystem PQPlatform-SubSys is a cryptographic subsystem, designed to provide offloaded cryptographic services with minimal integration effort and full autonomy from an existing security subsystem, as well as configurable side-channel protection. These services include post-quantum signature generation, verification, and secure key establishment. It’s built with optimal performance in mind, as well as crypto agility with its provision of traditional, PQ/T hybrid and fully post-quantum algorithms. PQPlatform-SubSys uses its built-in RISC-V CPU independently from the surrounding system, allowing cryptographic services to be offloaded efficiently from the system processor.
SphinX delivers high-performance encryption for data security with its AES-XTS standard encryption and decryption capabilities, providing independent and non-blocking channels for each process. This product offers robust protection against unauthorized data access and manipulation, cementing its position as a reliable security component in critical systems. Supporting independent channels allows SphinX to seamlessly manage multiple streams of data without latency bottlenecks, maintaining both security and operational efficiency. Designed for rigorous environments, it ensures data protection without undermining performance, making it indispensable for financial services, secure communications, and data-intensive industries. SphinX’s architecture is optimized to offer a balance between robust encryption and necessary computation speed, addressing niche market demands for efficient and scalable security solutions. It meets high-security standards whilst maintaining flexibility and resilience, accommodating modifications and enhancements in response to evolving security challenges.
The Individual IP Core Modules by ResQuant are comprehensive components engineered to support diverse post-quantum cryptographic standards, including Dilithium, Kyber, XMSS, SPHINCS+, AES, and the SHA-2 family. These modules offer organizations the flexibility to select specific cryptographic functionalities tailored to their security needs, without the necessity of entire systems or hardware changes. Each module is designed to integrate easily into existing infrastructure, ensuring minimal disruption while enhancing security measures against potential future quantum threats. This approach allows industries to gradually implement PQC standards, ensuring a seamless transition to quantum-resistant cryptographic measures. Tailored for flexibility, the ResQuant Individual IP Core Modules can be used across a wide array of applications, from IoT devices to complex military and IT systems. By offering component-level integration, these modules empower companies to future-proof their offerings incrementally while maintaining robust security practices in their operations.
CrossBar's ReRAM IP cores offer high-performance, embedded non-volatile memory specifically designed for use in microcontrollers (MCU) and System-on-Chip (SoC) designs. These cores provide industry-leading performance for multi-time programmable (MTP) memory applications, emphasizing enhanced energy efficiency and low latency operations ideal for IoT devices, wearables, tablets, and smartphones. Supporting integration at process nodes beginning from 28nm and below, these IP cores ensure that designers can leverage ReRAM's superior memory characteristics without the need for additional costly integration processes. CrossBar's ReRAM technology not only surpasses current flash performance in terms of data integrity but also provides lower energy code execution and storage solutions. The technology supports from 2M bits (256K Bytes) to 256M bits (32M Bytes) in density, accommodating a vast range of storage needs. Additionally, the ReRAM IP cores are available as either hard macros or as architectural licenses, providing flexibility for integration into various SoC designs. Besides its application in non-volatile memory contexts, CrossBar's ReRAM also enables security-focused solutions using physical unclonable function (PUF) technology, further broadening its practical applications across secure computing domains. This versatility and high-performance delivery make ReRAM an attractive option for next-generation embedded systems, facilitating innovation in how memory interacts with other SoC components.
Secure Protocol Engines by Secure-IC are high-performance IP blocks designed to offload the intensive computational tasks of network and security processing from primary processors. These engines improve overall system efficiency by handling complex security protocols, ensuring that the main computing resources are available for critical applications. They are architected to provide robust protection against security breaches while ensuring swift data processing, maintaining the integrity, confidentiality, and availability of data across networks.
FIPS 140-3 CAVP-compliant, compact PQC hardware acceleration for subsystems PQPlatform-CoPro combines hash-based and lattice-based post-quantum cryptography that can be added to an existing security subsystem. It can be optimized for minimum area, maintaining high-performance, and is designed to be run by an existing CPU using PQShield-supplied firmware, meaning it involves low integration effort and flexible configurations to support a wide variety of use cases, including quantum-safe secure boot. Solutions are available for hardware acceleration of SHA-3, SHAKE, ML-KEM, ML-DSA, alongside traditional cryptography. In addition, PQPlatform-CoPro can be configured with side-channel protection. PQPlatform-CoPro is covered by multiple PQShield implementation patents.
The RISC-V CPU IP NS Class by Nuclei is specifically aimed at sectors requiring enhanced security and financial technology solutions. Built upon a versatile architecture, it is pivotal for applications in IoT security and payment systems. This processor IP leverages the RISC-V standard to offer customizable configurations, optimized through its Verilog-based development, to enhance readability and effectiveness in debugging, contributing to superior PPA performance. Nuclei’s NS Class equips developers with flexible tools to adapt the processor to varied system requirements, making use of extensive RISC-V extensions and the opportunity for user-defined instructions. The IP’s security features are robust, featuring TEE support and a physical security package, ensuring complete security for sensitive data. Additionally, it complies with functional safety standards such as ASIL-B and ASIL-D, which are crucial in environments requiring stringent safety compliance. In essence, the NS Class stands out for its ability to secure and optimize financial transactions and data protection in IoT applications. Its flexibility in configuration and comprehensive security measures make it a reliable choice for demanding and sensitive technology applications.
The Securyzr Key Management System offers a robust solution integrated into Secure-IC's security ecosystem to manage cryptographic keys effectively and securely. This system ensures that key generation, distribution, and storage processes are carried out in a highly secure manner, facilitating strong encryption and digital signature functions. Its integration into a wide range of devices guarantees secure communication and data handling across various applications, making it a critical component in safeguarding sensitive data.
The Human Body Detector is an ultra-low-power sensing technology designed to identify the presence of the human body while minimizing power usage. Its robust design enables effective detection whether a wearable device is being actively used or not, thus optimizing the power consumption especially for devices that sit idle when not worn. By employing advanced touch detection, it provides reliable recognition of dynamic touch events, making it a suitable choice for applications requiring functionality selection or awaken states. An ideal component for energy-efficient systems, this sensor enhances the operational versatility of wearable electronics, contributing significantly to battery longevity. As the technology targets the IoT and wearable device sectors, its capacity for reducing power draw without sacrificing performance is of immense value. Incorporated into various interactive electronics, the Human Body Detector sensor offers sophisticated interfacing with minimal energy requirements. Devices integrating this technology benefit from extended lifecycles due to the reduced energy footprint, aligning well with the growing demand for sustainable technology in consumer electronics.
AON1100 is acclaimed as a forefront AI chip specifically for voice and sensor applications. Known for its extraordinary power efficiency, it consumes less than 260μW, excelling in sub-0dB signal-to-noise ratio environments while maintaining 90% accuracy. Designed for constantly operating devices, this chip leverages high-precision processing, facilitating its extensive application in always-on technologies like smart homes and automotive systems.
The FPGA Lock Core is an innovative FPGA solution designed to secure FPGAs and hardware against unauthorized access and counterfeiting, leveraging a Microchip ATSHA204A crypto authentication IC. It reads a unique ID, generates a 256-bit challenge, and uses secure hashing to verify the hardware's authenticity, ensuring hardware integrity in sensitive applications like military and medical fields. This solution allows hardware protection against IP theft by enforcing authentication and disables FPGA functionality if unauthorized access is detected. The core utilizes minimal logic resources and one FPGA pin, communicating through a bidirectional open drain link. The clarity of this system is enhanced by providing the core in VHDL, allowing users to thoroughly understand its functionality, supported by example designs on Cyclone10 and Artix 7 boards, catering to both Intel and Xilinx FPGA platforms. Complementing this security measure is the Key Writer Core, which allows programming of custom secret keys into the ATSHA204A in situ on assembled boards, ensuring a seamless integration with the FPGA Lock system. Available for various FPGA platforms, the Efinix version, distributed with TRS Star, expands its applicability, with webinars and user guides offering in-depth implementation insights.
VeriSyno's Digital Systems and Security Solutions are a vital component of modern electronic design, focusing on enhancing the security and performance of digital systems. These IPs include advanced security modules that provide robust protection for data and communications, essential in preventing unauthorized access and ensuring data integrity. The digital solutions are also designed to complement a wide variety of electronic infrastructures. They support various process nodes, allowing them to be adaptable to different manufacturing needs and enabling seamless integration into existing digital frameworks. VeriSyno emphasizes flexibility and security in its offerings, making these IPs ideal for use in critical applications across industries requiring stringent security measures. From consumer electronics to sophisticated industrial systems, these digital systems and security solutions enhance reliability and performance, critical in today's data-driven environment.
The AON1020 is an AI processing IP within the AONSens Neural Network cores, designed for both voice recognition and additional sensor applications. Its robust capabilities are provided through an AI engine developed in Verilog RTL, suitable for logic synthesis for both ASICs and FPGAs. Notably excelling in noisy environments, it supports applications such as human activity detection with high adaptability and accuracy, making it ideal for use across diverse scenarios.
NeoPUF is a pioneering hardware security solution aimed at enhancing the protection of semiconductor devices. Leveraging physical unclonable function (PUF) technology, NeoPUF generates unique identifiers for each chip, providing an essential root of trust for secure applications. This capability is crucial in environments where robust data security is paramount, such as IoT, AI, and automotive sectors. Unlike traditional security measures that rely on stored keys, NeoPUF derives keys directly from the inherent physical characteristics of the silicon, making it resistant to cloning and reverse engineering. This approach ensures that each device can authenticate itself and safeguard sensitive information without exposing it to potential threats. Such a methodology significantly strengthens the overall security infrastructure of modern digital systems. NeoPUF not only facilitates secure communication but also aids in protecting intellectual property against piracy and counterfeiting. It is a versatile technology that integrates smoothly into existing systems and requires no additional hardware, minimizing costs while maximizing security. As security becomes an increasingly critical aspect of semiconductor design, NeoPUF stands out as a forward-thinking solution ready to meet the challenges of emerging technologies.
PUFcc is an all-encompassing Crypto Coprocessor that delivers key generation, storage, and complete crypto operations in one solution. It builds on the PUFrt's hardware root of trust, offering secure boot, OTA updates, TLS, and key management. Its comprehensive design includes NIST-certified cryptographic algorithms, customizable for a wide range of IoT applications. PUFcc simplifies SoC design with standardized control interfaces and secure memory access, enhancing system security effortlessly.
The Capacitive Proximity Switch is engineered to achieve exceptional energy efficiency through its innovative design, allowing for precise touch and proximity detection with minimal power consumption. Its sharp sensitivity and low-power requisites make it a strong candidate for integration into energy-conscious devices that require efficient user interface solutions. With capabilities covering single keys, multi-keyboards, sliders, and proximity checks, this switch is diverse in its usability and applicability. It is particularly advantageous in scenarios requiring rapid response times for wake-up or functional shifts, ensuring seamless user experiences in daily electronic applications. This switch serves a vast array of industries, particularly enhancing products where low operational power is a critical feature. As technology trends move towards streamlined, battery-optimized gadgetry, the Capacitive Proximity Switch stands out as an essential component for future-forward electronic designs.
The Customizable Cryptography Accelerator offered by ResQuant is designed to meet varied client needs with an extensive array of configurable options. It integrates seamlessly with all NIST PQC standards like Dilithium, Kyber, XMSS, and SPHINCS+, and is extendible with additional algorithms, including customer-specific implementations. The accelerator is built to be DPA, timing, and SCA resistant, and is AXI 4 ready, ensuring robust protection in a variety of applications. This innovation allows for customizable tuning in performance and size, addressing the specific security requirements of customers from various industries. The accelerator demonstrates ResQuant's commitment to flexibility and adaptability, enabling clients to implement cutting-edge encryption with ease. With ongoing enhancements to extend its capabilities, the accelerator stands as a critical component in defenses against future computational threats posed by quantum technologies. In addition to its technical capabilities, the ResQuant Customizable Cryptography Accelerator is engineered for efficient power use and minimized physical footprint, making it suitable for integration into a wide range of hardware setups. This solution underscores ResQuant's dedication to delivering high-security standards and unmatched versatility in cryptographic processing solutions.
Suite-Q SW is a versatile cryptographic software library offered by PQ Secure, tailored to optimize code size, stack usage, and performance for diverse device specifications. Available in both high-speed assembly and portable C code, it suits a variety of embedded processors ranging from 8-bit to 64-bit platforms. This software solution ensures that memory-constrained devices can still maintain robust security features without sacrificing critical system resources. Compatible with general-purpose and specialized CPUs, Suite-Q SW supports hardware offload, enhancing processing efficiency across different applications. Key functionalities include support for various symmetric and asymmetric cryptographic standards, aligning with global security protocols. Suite-Q SW offers customization options to balance speed and memory use, meeting specific performance criteria while providing thorough validation tests and performance metrics for seamless integration into existing systems.
Alma Technologies' Ultra-High Throughput 8/10/12-bit JPEG Encoder is crafted for top-tier compression performance, designed to manage high-resolution images with remarkable speed. This encoder supports both 8-bit standard-compliant and extended 10/12-bit lossless and lossy compression, making it versatile enough to handle a multitude of professional imaging needs across different sectors like broadcasting, medical imaging, and space exploration. The architecture of this encoder emphasizes parallel processing capabilities, allowing it to maintain high throughput rates even with the most demanding image resolutions. By employing a scalable engine framework, it delivers unprecedented compression speeds while preserving exceptional image quality, thereby providing visually lossless outputs that maintain the original image integrity across various compression settings. Integration into both FPGA and ASIC systems is seamless, thanks to its system-independent design, which supports flexible interfacing and low-resource utilization. The encoder is optimized to accommodate adjustable data flows and manage real-time processing requirements without sacrificing efficiency. This makes it an invaluable resource for applications needing rapid data processing and transmission without compromising quality,"category_ids":[283], "supported_process_nodes":[], "tech_specs":[],"features":[],"applications":[],"part_number":null,"power_watts":null,"supply_voltage_volts":null}],"company_country_iso_code":null,"services":["soft-ip","custom-ip"],"outsourcing_services":[]} This versatile JPEG IP core by Alma Technologies is designed to facilitate high-speed compression of images, supporting 8-bit baseline and 10/12-bit extended modes. Catering specifically to both standard and advanced image compression needs, these cores effectively handle diverse data formats including grayscale and full color with various chroma subsampling options like 4:4:4, 4:2:2, and 4:2:0. The IP cores deliver exceptional performance through lossless or configurable lossy compression, making them adaptable to different application requirements, whether they are for high-quality imaging or storage-efficient compression solutions. Despite the complex demands of high-speed image processing, these JPEG cores maintain a streamlined operation with an intuitive interface that supports user control over the compression process without requiring significant computing resources. Additionally, their robust rate control mechanisms ensure consistency across frames, providing reliable quality maintenance even at different compression levels. Moreover, the IP core's flexible architecture allows for seamless integration into existing systems, with well-balanced power and space consumption. This makes them ideally suited for implementation in both FPGA and ASIC platforms, guaranteeing impressive reliability and outstanding image fidelity, supporting a wide range of mixed-media applications across industries. Please include this elsewhere. The AES Block Cipher IP has already been modernized. Also, it seems like only the JPEG encoder has been featured. I could review the rest of the website. vulnerabilities across the H.264 suite. Perhaps the JPEG LS Encoder and its parts. Alma Technologies' AES Block Cipher IP is designed to provide high-performance encryption and decryption capabilities essential for secure data transmission. This IP core supports a wide range of cipher modes, including ECB, CBC, CFB, OFB, CTR, and GCM, accommodating various encryption standards while maintaining flexibility and efficiency. Its robust architecture ensures effective performance, enabling the integration of secure communication protocols into hardware devices without compromising speed or security. 11 These AES cores are crafted to offer top-notch encryption ability, emphasizing compact design suitable for both FPGA and ASIC implementations. The modular framework of the AES IP allows for easy updates and adaptations to meet changing security landscapes without extensive system overhauls. The integration of these cores guarantees adherence to stringent data security requirements, making them ideal for use in sensitive applications such as secure communications, financial transactions, and personal data protection. Ease of use is a significant feature of this IP, supported by a straightforward interface that simplifies its implementation into existing systems. Its design considers low power consumption while ensuring high throughput rates, offering an optimal balance of energy-efficiency and encryption performance. This makes it a suitable addition for any security-centric applications demanding superior confidentiality mechanisms in data handling processes.9 Alma Technologies' Ultra-High Throughput 8/10/12-bit JPEG Encoder is crafted for top-tier compression performance, designed to manage high-resolution images with remarkable speed. This encoder supports both 8-bit standard-compliant and extended 10/12-bit lossless and lossy compression, making it versatile enough to handle a multitude of professional imaging needs across different sectors like broadcasting, medical imaging, and space exploration. The architecture of this encoder emphasizes parallel processing capabilities, allowing it to maintain high throughput rates even with the most demanding image resolutions. By employing a scalable engine framework, it delivers unprecedented compression speeds while preserving exceptional image quality, thereby providing visually lossless outputs that maintain the original image integrity across various compression settings. Integration into both FPGA and ASIC systems is seamless, thanks to its system-independent design, which supports flexible interfacing and low-resource utilization. The encoder is optimized to accommodate adjustable data flows and manage real-time processing requirements without sacrificing efficiency. This makes it an invaluable resource for applications needing rapid data processing and transmission without compromising quality. 8 Easy setup with appropriate provisions was placed. Other relevant IP, such as the AES Block Cipher IP, for wider applicability should be added. Do ensure that the data is clean and structured. Please return the other parts. PIECE GLOSSESSphinx Publishing ":[5270] The AES Block Cipher IP is modernized in strategies. According to their desired configurations, adapting a non-portable blocking access and utilizing modern processing techniques. Alma Technologies' AES Block Cipher IP offers high-performance encryption and decryption capabilities essential for secure data transmission. This IP core supports multiple cipher modes including ECB, CBC, CFB, OFB, CTR, and GCM, enabling compatibility with various secure applications while maintaining flexibility and efficiency. Its comprehensive architecture ensures strong performance, facilitating the integration of secure communication protocols into devices without compromising speed or security. The AES cores emphasize a compact design suitable for both FPGA and ASIC implementations, offering superior encryption capabilities with customizable settings. The IP accommodates various updates and security adaptations without requiring significant system overhauls, adhering to strict data encryption standards. Designed with ease of use in mind, these cores feature straightforward interfaces for seamless integration. High throughput rates are maintained alongside low power consumption, making them an optimal choice for applications requiring robust data protection like secure communications and financial transactions.8clusion.9ging. Easy_trans!setup with appropriate provisions was pla...
PUFhsm is an advanced embedded hardware security module designed for automotive and complex applications. It acts as an embedded security enclave, isolating key functions from the main system to ensure secure operations. With integrated cryptographic engines and dedicated CPUs, PUFhsm supports secure boot, updates, and key management within a compliant framework. It enhances designs by bolstering security while optimizing efficiency and reducing time-to-market.
The QDID PUF is an innovative hardware experience designed to generate a unique cryptographic identity through quantum tunneling current variations. Utilizing standard CMOS processes, it taps into randomness deriving from oxide thickness variations and defect distribution in gate oxide, creating a robust hardware root-of-trust. This enables the establishment of secure architectures by providing on-the-fly identity generation that does not rely on memory storage, making it resistant to side-channel and machine learning attacks. The QDID PUF is especially noteworthy for its high entropy seed generation, supporting customizable security strengths up to 256 bits, and is designed with built-in resistance against secret leakage through advanced countermeasures. The technology is thoroughly tested under diverse environmental conditions, consistently maintaining reliability and longevity, and has achieved extensive verification across major fabs including TSMC, GF, and UMC across various process nodes in Bulk CMOS, FDSOI, and FinFET technologies. It enables key generation and device authentication, serving as a cornerstone for secure provisioning and post-quantum cryptography, thus supporting various applications in device identification, supply chain security, and more. Successfully verified under NIST standards, QDID PUF ensures excellent performance across voltage, temperature, and ageing tests, offering a robust solution for future-proof IoT device integration.
NeoFuse represents an advancement in anti-fuse OTP technology, offering robust data protection for semiconductor devices. Its unique design ensures that once programmed, the data in NeoFuse cannot be altered, making it ideal for applications requiring permanent data storage, such as security keys and hardware identifiers. The technology behind NeoFuse focuses on providing high reliability and data integrity. By utilizing innovative materials and processes, NeoFuse guarantees stable performance across extended periods, even under fluctuating environmental conditions. This ensures that the data remains secure and accessible throughout the device's lifecycle. NeoFuse seamlessly integrates into various technology nodes and is compatible with numerous fabrication processes. This flexibility allows it to serve a broad range of applications, from automotive systems that demand high-security measures to consumer electronics requiring efficient space utilization. With its focus on preventing unauthorized data manipulation, NeoFuse is a pivotal component for protecting sensitive information in today’s digital age.
The AON1000 is a robust AI processing engine designed specifically for wake word detection, voice command recognition, acoustic event detection, and speaker identification. Tailored for always-on devices, it operates with exceptional power efficiency and accuracy in noisy conditions. The AON1000 is part of the AONVoice processor family and integrates proprietary neural network architecture and optimized inference algorithms to deliver industry-leading performance per microwatt.
The Platform-Level Interrupt Controller (PLIC) is a versatile and fully parameterized controller designed to manage interrupt signals in RISC-V platforms. It is compliant with the RISC-V standards, offering full customization to match various system needs, making it a critical component in managing complex interrupt schemes across different CPU environments. The PLIC ensures efficient handling of interrupts, optimizing both performance and resource utilization. With its flexible architecture, the PLIC can be tailored to fit a wide range of applications, enhancing its utility in diverse embedded systems. It supports multiple levels of interrupts, prioritization, and custom configurations, ensuring it can integrate seamlessly with other system components. The inclusion of this controller in a system design gives developers the tools needed to effectively manage interrupt processing, thus maintaining high system throughput and responsiveness.
The CANsec Controller Core is engineered to enhance the security of CAN networks by integrating robust cryptographic protocols and mechanisms that protect data integrity and confidentiality. This cutting-edge solution is tailored for automotive applications, providing an extra layer of security to combat the rising threats in vehicle systems as they increasingly connect to broader networks and the internet. CAN networks, widely used in vehicular communications, were originally designed without security in mind. This leaves them vulnerable to potential cyber-attacks, which is where the CANsec Controller Core comes into play. It bolsters the data transmission network by encrypting messages and authenticating commands, thus significantly mitigating the risk of interception or malicious tampering. With its seamless integration capabilities, the CANsec Controller Core can be adopted without major modifications to existing network infrastructures, making it an ideal choice for gradual implementation in both new and legacy systems. Its flexibility and robust security features make it an invaluable tool for manufacturers aiming to enhance the security resilience of their automotive technologies while adhering to evolving industry standards.
SiFive Automotive solutions provide cutting-edge automotive processors designed for high reliability and performance in modern vehicles. With a focus on industry-leading efficiency, safety, and a minimal physical footprint, the SiFive Automotive family supports requirements from infotainment systems to central computing. Each processor in this family is tailored for automotive usage, implementing critical safety standards like ISO 26262 ASIL D, to ensure compliance with the world's most stringent safety regulations. Capable of managing advanced driver assistance systems (ADAS) and developing autonomous vehicle technologies, these solutions are fortified for upcoming challenges in automotive electronics. Besides impressive safety and performance metrics, SiFive Automotive processors are designed with an eye towards cybersecurity and functional safety, ensuring comprehensive protection and optimal operation in demanding automotive conditions. This makes SiFive's offerings an essential part of modern automotive solutions, blending innovative technology with top-tier safety features for the autos of the future.
The AES Crypto core by Dillon Engineering is designed to provide robust encryption and decryption capabilities, compliant with the Federal Information Processing Standard (FIPS) 197. This highly parameterized core supports a multitude of operating modes including ECB, CBC, CFB, OFB, and CTR as outlined in NIST special publication 800-38A. Engineered to handle up to 12.8 Gb/s data throughput, this core manages dynamic key changes without affecting performance, ensuring secure data handling per advanced encryption standards. The core is versatile, offered in configurations that balance throughput and area, fulfilling diverse security demands. Employing Dillon's ParaCore Architect, the AES Crypto core is adaptable to both FPGA and ASIC platforms, designed as a self-contained module with a comprehensive testbench. This core provides a seamless security solution for applications that demand high-speed encryption, effectively supporting secure communications and data protection in different deployment contexts.
The HDCP 1.x/2.x IP Core from Bitec offers robust content protection solutions for digital multimedia systems. This core is specifically designed to ensure the secure transmission of audio and video content between devices, protecting against unauthorized copying and piracy. By implementing High-bandwidth Digital Content Protection (HDCP), it guarantees that multimedia streams are securely encrypted and accessible only through authenticated devices. This IP Core supports a comprehensive range of HDCP protocols, providing compatibility with the latest standards to meet modern security requirements. It is optimized for performance, ensuring that encryption processes do not impact system latency or bandwidth performance, thus maintaining the quality and speed of data transmission necessary for smooth HD multimedia delivery. Bitec’s HDCP Core is strategically developed for seamless integration into consumer electronics, set-top boxes, and video distribution systems that require advanced content protection. Its flexible architecture allows it to adapt to various hardware environments, ensuring that it remains a relevant and vital tool for digital rights management in evolving multimedia landscapes.
FortiCrypt is an advanced encryption technology developed for protecting data against side-channel and fault injection attacks. This solution implements algorithmic resistance using finite field arithmetic, ensuring secure handling of data without adding extra latency or requiring custom silicon processing. It stands out for its successful passage of rigorous evaluations, including the Test Vector Leakage Assessment conducted on one billion traces. This ensures FortiCrypt can be used flexibly across various technologies and platforms while maintaining high security.
Suite-Q HW is a comprehensive system-on-chip (SoC) design by PQ Secure that integrates all necessary cryptographic components for secure protocols. Targeted at both high-end servers and low-end embedded systems, Suite-Q HW offers versatile hardware accelerators capable of conducting symmetric and asymmetric cryptographic operations efficiently. Key features of this hardware include a NIST 800-90-compliant true random number generator (TRNG), support for a variety of elliptic curve cryptographies, and capabilities for post-quantum cryptography operations such as isogeny-based and lattice-based cryptographies. It also supports traditional algorithms like AES and SHA, ensuring compatibility with established security protocols. Suite-Q HW is engineered to offload heavy cryptographic computations, reducing system demands while providing substantial power savings over software implementations. This makes it ideal for applications requiring high security and efficiency, such as in IoT devices where power consumption is a critical concern. Enhanced by optional DPA countermeasures, it provides robust security in a compact and efficient package.
The Integrated Secure Element (iSE) is a cornerstone in Secure-IC’s security offerings, providing a root of trust embedded within the main System-on-Chip (SoC). It delivers multiple essential services to the host system, including secure boot, key isolation, and anti-tamper protection. Tailored to ensure maintenance of system integrity and confidentiality, the iSE acts as a resilient line of defense against sophisticated attacks, maintaining the secure execution of applications and safeguarding the integrity of sensitive data.
The SHA-3 Crypto Engine is a robust hardware accelerator specifically designed for cryptographic hashing functions. It presents a balance of high throughput and area efficiency and aligns with the FIPS 202 standards set by NIST. This engine supports all SHA-3 hash functions, including SHA-3-224, SHA-3-256, SHA-3-384, and SHA-3-512, as well as SHAKE-128 and SHAKE-256. Built to mitigate security vulnerabilities, it provides comprehensive defense against time-based side-channel attacks, ensuring data integrity. Operating within a single clock domain, the SHA-3 Crypto Engine is adequately verified, boasting automatic byte padding and effortless integration into existing systems. Its versatility spans numerous applications ranging from Message Authentication Codes (MACs) to protocol engines like IPsec and TLS/SSL, alongside secure boot engines and encrypted data storage solutions. Through integrating this engine, clients can guarantee the integrity and security of financial transactions, e-commerce platforms, and even blockchain applications. Delivered in System Verilog RTL with supportive testbenches and integration examples, the SHA-3 Crypto Engine offers straightforward deployment while maintaining compliance with industry standards. Its resource utilization spans a variety of FPGA families such as AMD Spartan, Kintex-7, and AMD Zynq MPSoC, presenting adaptability and efficiency across diverse platforms.
Creonic's Turbo encoders and decoders are meticulously designed to support error correction in both satellite and terrestrial communication applications. The turbo coding process enhances data reliability and efficiency, making it indispensable in digital communication systems where bandwidth and power efficiency are paramount. These IP cores are aligned with leading standards such as DVB-RCS2 and LTE, ensuring they meet the rigorous demands of high-performance systems. The Turbo technology employed by Creonic optimizes for high throughput while maintaining low error rates, making these IP cores vital for communication networks where performance consistency is critical. Commercial and military users alike benefit from the robust error correction capabilities these encoders and decoders provide, as they improve signal reliability over varying transmission conditions. This consistent reliability translates to a reduction in retransmissions and improved overall communication efficiency. Moreover, the flexibility and configurability of Creonic's Turbo IP cores allow for tailored solutions across different platforms, including both FPGA and ASIC. This adaptability ensures that the cores can be embedded effectively across a variety of hardware architectures, thereby broadening the scope of applications they can support.
MIFARE Certification Technologies offered by LSI-TEC represent advanced solutions in ensuring secure data transfer and authentication necessary for modern smart card operations. These technologies are pivotal in the wireless communication industry and facilitate seamless interactions across security systems. The certification technologies adhere to stringent international standards, ensuring optimal performance and increased reliability across various applications. MIFARE technologies integrate with numerous smart card systems, offering a robust framework for transaction security. Their implementation ensures that data integrity and access security are maintained, which is crucial in sectors like banking, transportation, and identification. Through these advanced certification technologies, organizations can rely on a safe, scalable, and efficient solution tailored to their unique security needs.
CrossBar's ReRAM IP cores designed for high-density data storage are crafted for applications requiring immense storage capacity combined with rapid access times, such as data centers, mobile computing, and artificial intelligence platforms. These memory cores harness the power of CrossBar's 3D ReRAM architecture, enabling new classes of persistent memory solutions for read-intensive environments that benefit from their remarkable performance characteristics. Offering densities up to 64Gbits (8GBytes) or more, CrossBar's ReRAM technology supports creating robust memory solutions like 128GB to 1TB NV-DIMMs. Systems utilizing this technology can achieve read speeds of up to 25.6 GB/s with extremely low power consumption during active read operations. This makes them incredibly efficient for high-data-load applications where performance, scaling efficiency, and power consumption are crucial factors. Additionally, these high-density cores can be integrated into both SoC and FPGA ecosystems or be utilized as standalone memory chips, providing flexibility across multiple deployment scenarios. CrossBar's ReRAM technology is not only useful for enhancing non-volatile memory capacity but also adds a layer of security by supporting usage in secure PUF key implementations, thus addressing both storage scalability and data protection requirements.
Built as part of the Cramium family, the Personal Hardware Security Module (PHSM) by CrossBar offers a cutting-edge solution for securing digital assets, particularly within the crypto industry. This hardware security module is positioned as a comprehensive tool capable of performing multiparty computation (MPC) within a secure element, something traditional hardware wallets do not offer. It provides unmatched security through its advanced cryptographic operations, ensuring that private keys remain protected against unauthorized access. PHSM's design prioritizes security by supporting Zero-Knowledge Proof (ZKP) mechanics and assuring that no key shares are exposed, which significantly elevates the security paradigm. Its architecture ensures it remains offline when not in use, safeguarding against external threats. Furthermore, it supports various cryptographic configurations like BIP32/39, multi-signature wallets, and integrates FIDO2 passkey capabilities, allowing enhanced multi-factor authentication for critical security applications. This module is adaptable to various key management scenarios, from institutional custody solutions to individual asset protection. Offering flexibility in its customizable design, the Cramium PHSM mitigates single points of failure and is optimized for diverse operational requirements, ensuring robust digital asset protection. It represents a leap forward in hardware security solutions, employing modern advancements in cryptography to deliver a secure and user-friendly experience.
CrossBar's ReRAM technology can be effectively utilized as few-time programmable (FTP) or one-time programmable (OTP) memory, offering flexibility across a broad range of non-volatile memory applications. This technology is integral to CrossBar's portfolio of ReRAM solutions, providing a highly secure and reliable option for applications that demand tight control over memory rewrite and security. CrossBar's FTP/OTP ReRAM options utilize a ReRAM cell that is compatible with their high-performance MTP memory, allowing both FTP and OTP functionalities within the same memory block. This versatility is advantageous for applications that require secure storage solutions, such as PUF keys or for memory systems needing various levels of programmability — all while maintaining data integrity and security. Taking advantage of its compatibility with standard MTP counterparts, CrossBar's ReRAM FTP/OTP memory achieves significant cost benefits by reducing die area and offering the potential for custom memory configurations without altering core manufacturing processes. This efficient approach simplifies the implementation of secure, flexible memory architecture suited for automotive, consumer electronics, and more.
Specializing in ESD protections, Certus Semiconductor offers highly adaptive solutions that meet various operational demands. These circuits provide enduring defense against ESD threats, surpassing traditional HBM and CDM specifications. Capabilities include low capacitance solutions and customized protections tailored to endure voltages between -18V to +30V. These ESD circuits are integrated with specialized features like Rad-Hard technology, high-temperature resilience, and enhanced burst immunity, setting a standard for highly secure semiconductor solutions in harsh environments.
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