Akeana offers a suite of Processor System IPs to accelerate the creation of complete processor systems, meeting various performance and scalability requirements. These consist of essential components like the Compute Coherence Block (CCB), which supports coherent multi-core cluster configurations. This block is crucial for connecting up to eight cores with a shared cache via a directory-based protocol, enabling efficient data processing.
Akeana's offerings include a versatile Input-Output Memory Management Unit (IOMMU) conforming to RISC-V standards, facilitating the translation between device and system physical addresses to optimize and secure SOC memory operations. By managing DMA access effectively, it enhances the system’s tolerance and reliability during high throughput operations.
The system IP portfolio also features the AkeanaMesh, a CHI-compatible coherent interconnect fabric. This component is designed to support large compute configurations by coherently linking multiple CCBs, making it compatible with both AMBA AXI (non-coherent) and AMBA CHI (coherent) protocols. It provides an architecture capable of handling extensive data movement and ensures effective control over interrupt mechanisms.
