The PRBS Generator, Checker, and Error Counter is a robust tool designed to handle high-speed data processing tasks with precision. It supports multiple PRBS orders, namely 7, 15, and 31, to facilitate versatile data error checking and generation capabilities. This IP is engineered to ensure a high degree of accuracy in error detection, providing reliable performance in various applications. With differential CMOS data and clock inputs and outputs, it offers flexibility and compatibility with a range of systems, and includes a power-down mode to optimize energy usage.
Built on TSMC's 28HPC process, this IP achieves typical data rates of 36 Gbps, with a minimum threshold of 32 Gbps, all while maintaining a typical consumption of 80 mA. It occupies an area ranging from 67×142 µm to 67×71 µm. With power scaling relative to the data rate, this IP ensures efficient operation, making it suitable for high-performance applications in telecommunications and data transmission.
This IP provides multiple customization options to fit specific client needs, thanks to its scalable footprint that varies with its PRBS configurations. Its versatility and robust design make it an excellent choice for clients seeking high-speed error checking solutions that seamlessly integrate into existing infrastructures.
