The pPLL02F family is a suite of versatile, all-digital Fractional-N PLLs designed for a variety of general-purpose clocking applications. Tailored for moderate-speed digital systems, it offers low jitter of under 18 picoseconds RMS and a compact footprint of less than 0.01 square millimeters. Ideal for microprocessors, pPLL02F supports multi-PLL systems, facilitating easy integration in complex system-on-chip designs.
Built on Perceptia's second-generation all-digital PLL technology, the pPLL02F family offers robust performance across various manufacturing processes. It is available for a wide range of technologies, ensuring compatibility and ease of integration into diverse projects. The PLL allows flexibility to operate as either an integer-N or fractional-N PLL, enabling optimal configuration of input and output clock frequencies for system-level precision.
The pPLL02F integrates and can operate across frequencies up to 2GHz, with a reference clock range between 5MHz and 500MHz. It includes several outputs via programmable postscalers and features a lock-detect output, enhancing its versatility for different applications. This PLL family is particularly valued in projects requiring a combination of low power consumption, high performance, and small area footprint.
