PowerMiser represents sureCore's effort to deliver an advanced low power SRAM solution that is particularly suitable for devices needing extended battery life. This SRAM IP is developed across several cutting-edge manufacturing processes such as 28nm FDSOI and 22nm ULL BULK CMOS. It boasts dynamic power savings of more than 50% and significant leakage power reductions. PowerMiser's architecture incorporates innovative techniques such as Bit Line Voltage Control, enhancing its ability to deliver optimal performance even at low voltages.
In addition to achieving superior power efficiency, PowerMiser accommodates up to 576Kbit memory capacity with flexible word lengths thanks to its versatile compilers. These compilers facilitate design flexibility, automatically generating data sheets and facilitating integration with standard Electronic Design Automation (EDA) tools. Notably, PowerMiser also offers retentive sleep modes like light sleep for swift wake-up and deep-sleep for maximum power conservation.
This SRAM solution is particularly valuable in markets responding to demands for longer battery lifecycles, such as in edge-AI applications that utilize extensive SRAM for pattern matching. PowerMiser sets a benchmark in ultra-low voltage operations, enabling significant power savings necessary to meet the stringent power targets required by such innovative applications.
