All IPs > Analog & Mixed Signal > PLL > PLL
The Phase-Locked Loop (PLL) provided by ASIC North is crafted to manage frequency synthesis and clock generation, essential for timing applications in complex electronics. Its versatile architecture can be used across various platforms, facilitating synchronization in communication systems. This PLL features low jitter and power consumption, contributing to its efficiency in modern semiconductor applications.
| Foundry | Process Nodes |
|---|---|
| HHGrace |
65nm |
| TSMC |
16nm FFC/FF+ |
| Class | Value |
|---|---|
| Categories |
Analog & Mixed Signal > PLL Graphic & Peripheral > Clock Generator Analog & Mixed Signal > Clock Synthesizer |
| Availability | All Countries & Regions |
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