PCIE is a layered protocol high speed interconnect interface supporting speeds up to 128Gbps and multi lanes and links. The layers speci_ied in PCIE speci_ication Transport, Datalink, Physical layers (digital packet) are implemented in PRIMEXPRESS IP along with PIPE interface logic connecting to PHY and AXI Bridging logic to connect to applications.
Features:
• Supports PCIE Gen 7 draft Spec.
• Supports Pipe 6.X Spec.
• PCIE Gen 7.0 Core supports Flit and non – Flit Mode.
• Supports X16, X8, X4, X2, X1 Lane Configuration.
• AXI MM and Streaming supported.
• Supports Gen 1, Gen 2, Gen 3, Gen 4, Gen 5, Gen 6, Gen 7 modes.
• Data rate support of 2.5 Gbps, 5 Gbps, 8 Gbps, 16 Gbps, 32 Gbps, 64 Gbps, 128 Gbps.
• PAM support when operating at 64Gbps/ 128Gbps.
• 8b/10b,128b/130b,1b/1b encoding , decoding support.
• Supports EP & RC.
• Supports serdes and non – serdes architecture.
• Optional DMA support as plugin module.
• Support for alternate negotiation protocol.
• Lane polarity thru register control.
• Lane deskew supported.
• Support for L1 states.
• L0P Supported.
• SKP OS add/removal.
• SRIS mode supported.
• No equalization support thru configuration.
• Deemphasis negotiation support at 5GT/s.
• EI inferences in all modes.
• PTM, OBFF, MSI, MSIX, Power management and all message format supports.
