All IPs > Memory & Logic Library > Standard cell
The "Standard Cell" category within our Memory & Logic Library is foundational for designing efficient and scalable integrated circuits. Standard cells form the basic building blocks of digital logic circuits, enabling designers to create complex and customized chip designs with ease and precision. These cells include a variety of digital components like logic gates, multiplexers, flip-flops, and other functional elements that are crucial for building sophisticated semiconductor devices.
One of the primary uses of standard cell semiconductor IPs is in the development of application-specific integrated circuits (ASICs). By utilizing a library of pre-defined, verified cells, designers can optimize the performance, power consumption, and silicon area of chips, leading to more cost-effective and energy-efficient solutions. This approach not only accelerates the design process but also enhances the reliability and scalability of the final product.
Additionally, standard cell libraries are integral to the process of digital design automation (DDA). These libraries allow for the automation of various aspects of chip design, including layout generation and optimization. The consistent use of standardized cells ensures that designs can be easily adapted or modified to meet specific project requirements without re-inventing the wheel for each component.
Within the category of standard cell semiconductor IPs, you'll find a diverse range of products tailored to different performance and density needs. Whether you're working on high-speed processor cores or low-power consumer electronics, our collection offers the flexibility to cater to various design constraints and objectives. By integrating these standard cells into your design flow, you can achieve superior functionality while maintaining efficiency and reliability in your semiconductor products.
The A25 processor model is a versatile CPU suitable for a variety of embedded applications. With its 5-stage pipeline and 32/64-bit architecture, it delivers high performance even with a low gate count, which translates to efficiency in power-sensitive environments. The A25 is equipped with Andes Custom Extensions that enable tailored instruction sets for specific application accelerations. Supporting robust high-frequency operations, this model shines in its ability to manage data prefetching and cache coherence in multicore setups, making it adept at handling complex processing tasks within constrained spaces.
xcore.ai is XMOS Semiconductor's innovative programmable chip designed for advanced AI, DSP, and I/O applications. It enables developers to create highly efficient systems without the complexity typical of multi-chip solutions, offering capabilities that integrate AI inference, DSP tasks, and I/O control seamlessly. The chip architecture boasts parallel processing and ultra-low latency, making it ideal for demanding tasks in robotics, automotive systems, and smart consumer devices. It provides the toolset to deploy complex algorithms efficiently while maintaining robust real-time performance. With xcore.ai, system designers can leverage a flexible platform that supports the rapid prototyping and development of intelligent applications. Its performance allows for seamless execution of tasks such as voice recognition and processing, industrial automation, and sensor data integration. The adaptable nature of xcore.ai makes it a versatile solution for managing various inputs and outputs simultaneously, while maintaining high levels of precision and reliability. In automotive and industrial applications, xcore.ai supports real-time control and monitoring tasks, contributing to smarter, safer systems. For consumer electronics, it enhances user experience by enabling responsive voice interfaces and high-definition audio processing. The chip's architecture reduces the need for exterior components, thus simplifying design and reducing overall costs, paving the way for innovative solutions where technology meets efficiency and scalability.
Dolphin Technology provides an extensive range of standard cell libraries that are critical for any SoC design project. These libraries include over 5,000 fully customizable cells, each precisely crafted to optimize speed, power, density, and routability. The standard cells are verified in silicon and designed for use across various process technologies, making them an ideal choice for a wide range of applications. The standard cell libraries support various process nodes such as 6-track, 7-track, and up to 14-track configurations, suitable for everything from high-performance to ultra-high density applications. Dolphin Technology’s standard cell IP offerings include Multi-VT (SVT, HVT, LVT) and multi-channel options, enabling flexibility in design to accommodate the specific needs of semiconductor projects. These cell libraries are tailored to support high-performance computing, provide efficiency in wafer yield, and ensure optimal SoC pricing. This high degree of customization, coupled with a focus on power and density, offers excellent options for semiconductor professionals aiming to create high-performance designs efficiently and cost-effectively.
CrossBar's ReRAM Memory is designed to redefine data storage with its high-density and energy-efficient characteristics. The memory solution can achieve terabyte-scale storage on-chip, significantly surpassing traditional flash memory solutions in both speed and power consumption. Offered in a 3D cross-point architecture, it is capable of providing high performance with minimal layout overhead. Engineered for next-generation applications, this ReRAM technology boasts a performance edge with 20ns read times and 12µs write capabilities, eliminating the usual erase latency. It is significantly faster than traditional NAND flash with its lightning-fast read and write speeds, making it suitable for real-time processing required by cutting-edge applications such as AI and IoT. Security is a key feature, offering tamper-resistant provisions for cryptographic key storage ensuring robust protection against data breaches. The memory solution leverages advanced technology to deliver energy savings of up to 5x compared to eFlash, and up to 40x when compared to BLE, positioning it as an ideal choice for mobile and low-power applications.
The Ncore Cache Coherent Interconnect is designed to tackle the complexities inherent in multicore SoC environments. By maintaining coherence across heterogeneous cores, it enables efficient data sharing and optimizes cache use. This in turn enhances the throughput of the system, ensuring reliable performance with reduced latency. The architecture supports a wide range of cores, making it a versatile option for many applications in high-performance computing. With Ncore, designers can address the challenges of maintaining data consistency across different processor cores without incurring significant power or performance penalties. The interconnect's capability to handle multicore scenarios means it is perfectly suited for advanced computing solutions where data integrity and speed are paramount. Additionally, its configuration options allow customization to meet specific project needs, maintaining flexibility in design applications. Its efficiency in multi-threading environments, coupled with robust data handling, marks it as a crucial component in designing state-of-the-art SoCs. By supporting high data throughput, Ncore keeps pace with the demands of modern processing needs, ensuring seamless integration and operation across a variety of sectors.
The ReRAM IP Cores for Embedded Non-Volatile Memory are crafted to seamlessly integrate into microcontrollers (MCUs) and systems on chips (SOCs), addressing the enduring need for efficient and scalable storage. These IP cores leverage CrossBar's signature 3D ReRAM technology to provide unparalleled performance in both speed and density, tailored specifically for embedded systems. Designed to offer superior integration capabilities, this ReRAM technology reduces traditional bottlenecks witnessed with embedded flash memory solutions. It allows for rapid data access and storage, making it a superior choice for applications requiring frequent read/write operations. By offering robust tamper-resistance for secure key storage, these IP cores also add an additional layer of security critical for modern embedded systems. They enable cost-effective scalability and flexibility for manufacturers looking to enhance their products with cutting-edge memory technology.
The Spiking Neural Processor T1 is an ultra-low power processor developed specifically for enhancing sensor capabilities at the edge. By leveraging advanced Spiking Neural Networks (SNNs), the T1 efficiently deciphers patterns in sensor data with minimal latency and power usage. This processor is especially beneficial in real-time applications, such as audio recognition, where it can discern speech from audio inputs with sub-millisecond latency and within a strict power budget, typically under 1mW. Its mixed-signal neuromorphic architecture ensures that pattern recognition functions can be continually executed without draining resources. In terms of processing capabilities, the T1 resembles a dedicated engine for sensor tasks, offering functionalities like signal conditioning, filtering, and classification independent of the main application processor. This means tasks traditionally handled by general-purpose processors can now be offloaded to the T1, conserving energy and enhancing performance in always-on scenarios. Such functionality is crucial for pervasive sensing tasks across a range of industries. With an architecture that balances power and performance impeccably, the T1 is prepared for diverse applications spanning from audio interfaces to the rapid deployment of radar-based touch-free interactions. Moreover, it supports presence detection systems, activity recognition in wearables, and on-device ECG processing, showcasing its versatility across various technological landscapes.
The General Purpose Accelerator (Aptos) from Ascenium stands out as a redefining force in the realm of CPU technology. It seeks to overcome the limitations of traditional CPUs by providing a solution that tackles both performance inefficiencies and high energy demands. Leveraging compiler-driven architecture, this accelerator introduces a novel approach by simplifying CPU operations, making it exceptionally suited for handling generic code. Notably, it offers compatibility with the LLVM compiler, ensuring a wide range of applications can be adapted seamlessly without rewrites. The Aptos excels in performance by embracing a highly parallel yet simplified CPU framework that significantly boosts efficiency, reportedly achieving up to four times the performance of cutting-edge CPUs. Such advancements cater not only to performance-oriented tasks but also substantially mitigate energy consumption, providing a dual benefit of cost efficiency and reduced environmental impact. This makes Aptos a valuable asset for data centers seeking to optimize their energy footprint while enhancing computational capabilities. Additionally, the Aptos architecture supports efficient code execution by resolving tasks predominantly at compile-time, allowing the processor to handle workloads more effectively. This allows standard high-level language software to run with improved efficiency across diverse computing environments, aligning with an overarching goal of greener computing. By maximizing operational efficiency and reducing carbon emissions, Aptos propels Ascenium into a leading position in the sustainable and high-performance computing sector.
EverOn is sureCore's revolutionary Single Port Ultra Low Voltage (ULV) SRAM, offering significant power reductions. Proven on the 40ULP BULK CMOS process, it provides up to 80% dynamic power savings and 75% static power reduction. This memory operates across an impressive voltage range, from 0.6V to 1.21V, allowing it to support applications demanding extreme energy efficiency. The ULV compiler accommodates memory capacities from 8Kbytes to 576Kbytes and sustains a wide operational voltage spectrum. Architecturally, EverOn supports dynamic voltage and frequency scaling, using a single supply rail to simplify integration. SMART-Assist technology ensures reliable operation even at retention voltages, with architectural innovations that enhance system flexibility. By supporting various power-down states and bank control options, EverOn allows designs to be tailored specifically to varying operational conditions, making it ideal for wearable technology and IoT products. With its groundbreaking power-saving features and robust operational profile, EverOn stands as an ideal choice for developers aiming to extend battery life without compromising SRAM performance.
The AndeShape Platforms are designed to streamline system development by providing a diverse suite of IP solutions for SoC architecture. These platforms encompass a variety of product categories, including the AE210P for microcontroller applications, AE300 and AE350 AXI fabric packages for scalable SoCs, and AE250 AHB platform IP. These solutions facilitate efficient system integration with Andes processors. Furthermore, AndeShape offers a sophisticated range of development platforms and debugging tools, such as ADP-XC7K160/410, which reinforce the system design and verification processes, providing a comprehensive environment for the innovative realization of IoT and other embedded applications.
The Bipolar-CMOS-DMOS (BCD) technology is purpose-built for power management applications requiring superior efficiency and control. By merging bipolar, CMOS, and DMOS transistors, this technology supports the development of integrated circuits capable of handling high voltages and currents. Its integrated nature enables compact design and high performance, particularly ideal for use in consumer electronics where space and heat dissipation are critical considerations. The BCD process excels in providing reliable performance in power switching and regulation tasks, vital for extending battery life in portable devices. This technology perfectly suits applications in the automotive and industrial sectors where robust power management is critical. Its ability to withstand high current loads and environmental stresses contributes to its selection in designing durable and efficient power systems.
The iCan PicoPop® is a highly compact System on Module (SOM) based on the Zynq UltraScale+ MPSoC from Xilinx, suited for high-performance embedded applications in aerospace. Known for its advanced signal processing capabilities, it is particularly effective in video processing contexts, offering efficient data handling and throughput. Its compact size and performance make it ideal for integration into sophisticated systems where space and performance are critical.
YouDDR is a comprehensive technology encompassing not only the DDR controller, PHY, and I/O but also features specially developed tuning and testing software. It provides a complete subsystem solution to address the complex needs of DDR memory interfaces. The integrated approach allows for cohesive synchronization between the controller and PHY, optimizing performance and reliability. The YouDDR technology ensures seamless integration into a variety of platforms, supporting a broad range of applications from simple consumer electronics to advanced computing systems. By offering enhanced tuning capabilities, it allows developers to fine-tune performance metrics, ensuring that systems can operate within their optimal performance windows. Developers utilizing YouDDR benefit from a thoroughly tested and verified subsystem that significantly simplifies the design cycle. This not only reduces development time but also enhances the likelihood of first-pass success, providing a competitive edge in manufacturing efficiency and product launch speed.
The IP Platform for Low-Power IoT is engineered to accelerate product development with highly integrated, customizable solutions specifically tailored for IoT applications. It consists of pre-validated IP platforms that serve as comprehensive building blocks for IoT devices, featuring ARM and RISC-V processor compatibility. Built for ultra-low power consumption, these platforms support smart and secure application needs, offering a scalable approach for different market requirements. Whether it's for beacons, active RFID, or connected audio devices, these platforms are ideal for various IoT applications demanding rapid development and integration. The solutions provided within this platform are not only power-efficient but also ready for AI implementation, enabling smart, AI-ready IoT systems. With FPGA evaluation mechanisms and comprehensive integration support, the IP Platform for Low-Power IoT ensures a seamless transition from concept to market-ready product.
The xcore-200 chip from XMOS is a pivotal component for audio processing, delivering unrivaled performance for real-time, multichannel streaming applications. Tailored for professional and high-resolution consumer audio markets, xcore-200 facilitates complex audio processing with unparalleled precision and flexibility. This chip hosts XMOS's adept capabilities in deterministic and parallel processing, crucial for achieving zero-latency outputs in applications such as voice amplification systems, high-definition audio playback, and multipoint conferencing. Its architecture supports complex I/O operations, ensuring that all audio inputs and outputs are managed efficiently without sacrificing audio quality. The xcore-200 is crafted to handle large volumes of data effortlessly while maintaining the highest levels of integrity and clarity in audio outputs. It provides superior processing power to execute intensive tasks such as audio mixing, effects processing, and real-time equalization, crucial for both consumer electronics and professional audio gear. Moreover, xcore-200 supports a flexible integration into various systems, enhancing the functionality of audio interfaces, smart soundbars, and personalized audio solutions. It also sustains the robust performance demands needed in embedded AI implementations, thereby extending its utility beyond traditional audio systems. The xcore-200 is a testament to XMOS's dedication to pushing the boundaries of what's possible in audio engineering, blending high-end audio performance with cutting-edge processing power.
Spectral CustomIP features silicon-proven specialty memory architectures perfect for diverse IC applications. Renowned for its wide range of memory architectures, CustomIP provides designers with options that include Binary and Ternary CAMs, multi-port memories, and cache, among others. These architectures are built on high-density, low-power designs, emphasizing performance while minimizing power usage. CustomIP, part of Spectral's Memory Development Platform, comes in source code format, enabling users to modify and extend design capabilities as necessary. CustomIP integrates SpectralTrak technology, offering PVT monitoring that dynamically adjusts memory timing in response to environmental factors. This ensures stability and high performance across various conditions. CustomIP's flexibility sees it employed in networking via SpectralTCAMs, graphics through SpectralMPorts, and low voltage applications like consumer electronics and healthcare devices with unique options like SpectralLVSRAM and SpectralHRAM. Broad configurations are available, facilitating integration into complex systems. With options for depth reaching 16K Words and data widths extending to 288 bits, the CustomIP suite supports myriad application requirements. Architectures include multiple bank setups and read/write port options, providing versatility for advanced chip designs. The platform's support of BIST, ECC, and test modes, alongside optional rights to modify, offers users a comprehensive set of tools to achieve their desired outcomes.
The SiFive Essential family is designed to deliver high customization for processors across varying applications, from standalone MCUs to deeply embedded systems. This family of processor cores provides a versatile solution, meeting diverse market needs with an optimal combination of power, area, and performance. Within this lineup, users can tailor processors for specific market requirements, ranging from simple MCUs to fully-featured, Linux-capable designs. With features such as high configurability, SiFive Essential processors offer flexible design points, allowing scaling from basic 2-stage pipelines to advanced dual-issue superscalar configurations. This adaptability makes SiFive Essential suitable for a wide variety of use cases in microcontrollers, IoT devices, and control plane processing. Additionally, their innovation is proven by billions of units shipped worldwide, highlighting their reliability and versatility. The Essential cores also provide advanced integration options within SoCs, enabling smooth interface and optimized performance. This includes pre-integrated trace and debug features, ensuring efficient development and deployment in diverse applications.
Dolphin Semiconductor's Foundation IPs are crafted to enhance the efficiency and cost-effectiveness of System-on-Chip (SoC) designs through robust offerings of embedded memories and standard-cell libraries. Specially designed for energy-efficient applications, these components help optimize space and power usage while ensuring the cutting-edge performance of modern electronic devices. Incorporated within Dolphin's Foundation IP portfolio are standard cells that allow chip designers to achieve up to 30% density gains at the cell level, compared to conventional libraries. Further, these components are engineered to support always-on applications with exceptionally low leakage rates. The Foundation IP suite optimizes SoC designs by delivering dramatically reduced leakage and area consumption, avoiding the additional cost and complexity of using a regulator. The memory compilers within Foundation IPs offer ultra-low power and high-density memory solutions, including SRAM and via-programmable ROMs. These are formulated to deliver up to 50% energy savings, providing flexibility with multi-power modes and adaptable to varied instances. With optimization for TSMC processes, Dolphin's Foundation IPs provide an essential backbone for creating innovative, efficient, and sustainable SoC products.
The SEMIFIVE SoC Platform is a bespoke development environment designed to expedite the creation of custom silicon solutions by leveraging domain-specific architectures. It integrates a pre-verified IP pool, providing a robust foundation for applications requiring tailored performance and cost efficiencies. This platform significantly reduces development time and associated risks by offering a ready-to-use environment that includes silicon-proven design components. With its comprehensive set of features, the platform facilitates rapid prototyping and market deployment, employing a high degree of reusability in design and verification components. By decreasing non-recurring engineering (NRE) costs and enhancing design reliability, the SoC Platform ensures faster time-to-market, making it ideal for industries aiming for quick product turnarounds. The SoC Platform supports scalable integration with third-party IPs, allowing flexibility to meet diverse application needs. Its architecture includes support for multiple processors, memory interfaces, and connectivity solutions, providing a one-stop solution for industries across AI, IoT, and HPC domains, ensuring performance optimization and minimal risk.
Attopsemi's I-fuse is a revolutionary one-time programmable memory solution that breaks from traditional designs by eliminating the need for explosive anti-fuse technology. Instead, this innovation thrives on a patented design that utilizes fully standard logic processes, making it both scalable and highly robust. Unlike other OTPs which require redundancy and charge-pump integration, I-fuse offers a compact, efficient alternative with proven reliability across diverse applications, including automotive and medical sectors. The I-fuse platform is remarkable for its adaptability, having been silicon-proven across a wide spectrum of process nodes from 0.7μm to 22nm. This flexibility ensures it fits seamlessly into various manufacturing scenarios, benefiting customers with its exceptional performance metrics such as low power consumption and high testability. Furthermore, I-fuse is engineered with a wide temperature range of operation, enhancing its reliability even in harsh conditions. Attopsemi's commitment to quality and innovation is evidenced by the technology's compliance with AEC-Q100 Grade 0 standards, which guarantees robust functioning in the most challenging environments. The company's extensive IP portfolio, bolstered by over 90 patents, continues to propel I-fuse forward as a trusted solution in the ever-evolving field of semiconductor technologies.
Spectral's MemoryIP offers a wide array of silicon-proven, high-density, and low-power static random-access memories (SRAMs). This library includes six fundamental architectures: Single Port & Dual Port SRAMs, ROM, and Register Files (1 Port, 2 Port, and Pseudo-2 Port). Employing uniquely tailored bit cells, Spectral's compilers ensure robust functionality and optimal performance with minimal power usage. This customization is part of the broader Memory Development Platform, which allows users to tailor designs and extend capabilities easily. The MemoryIP is meticulously architected for high efficiency and supports advanced process nodes, compatibility with any standard CMOS technology, and even offers source code options for greater flexibility. Spectral MemoryIP distinguishes itself with its inclusion of proprietary SpectralTrak technology, a specialized PVT (Process, Voltage, Temperature) monitoring system that enhances reliability by adjusting internal memory timing to environmental variations. Its compilers, such as SpectralSPSRAM, SpectralPS2PSRAM, and SpectralDPSRAM, cater to high-capacity instances, while options like Spectral1PRF and Spectral2PRF are suited for tasks like scratchpad memories and FIFO applications. With expandable configurations ranging from 8 Words to 16K Words in depth and data widths from 4 to 144 bits, MemoryIP can meet diverse implementation needs. These features, alongside multi-bank architecture and low dynamic power, make MemoryIP a flexible choice for both foundries and fabless semiconductor companies pursuing effective memory solutions. Enhanced by Sleep and Power options, it supports BIST and ECC, safeguarding data integrity while promoting energy efficiency.
The Blazar Bandwidth Accelerator Engine brings in-memory computing directly to FPGA configurations. It provides a blend of high-capacity, low-latency memory aligned with extensive compute power to tackle bandwidth-intensive applications. With a throughput capacity of up to 640 Gbps and the potential for integration of up to 32 RISC cores, it supports high-performance applications such as SmartNIC and SmartSwitches. The device reduces data transport delays by implementing operations within the memory environment, significantly enhancing system responsiveness.
The PB8051 Microcontroller Core offers a robust implementation of the classic 8051 microcontroller, specifically for integration with Xilinx FPGAs. This core mimics the 8031 series microcontroller, including its serial port and two timers, maintaining software compatibility with the 8031. Its design harbors flexibility, able to execute existing 8051 object code, which ensures backward compatibility for legacy systems. The PB8051 leverages the Xilinx PicoBlaze softcore microcontroller to provide a small footprint core design, making it approximately 28% the size of competing 8051 core implementations. This space-efficient design translates to a more cost-effective use of FPGA resources without hampering the core's capabilities. The PB8051 operates at increased speeds, achieving performance parity with traditional 8051s by functioning four times faster in clock frequency, translating into higher throughput for embedded operations. A sophisticated architectural design supports use within all Xilinx FPGAs from the Spartan II series onwards. In addition, comprehensive documentation and reference designs are provided to support both novices and experienced engineers, ensuring ease of integration and rapid deployment. This microcontroller solution underscores Roman-Jones’ ability to blend heritage microcontroller functionality with contemporary FPGA technology, delivering a versatile and cost-effective product.
Chuangfeixin Technologies' OTP (One-Time Programmable) solutions provide a unique approach to secure data storage. Once programmed, the data within these OTP devices is immutable, providing a robust layer of security ideal for protecting intellectual property and sensitive information within integrated circuits or logic gates. These solutions are particularly advantageous in embedded applications, where they can safeguard firmware and configuration data against unauthorized access or alteration. The company offers versatile OTP products compatible with various CMOS processes, ensuring easy integration without additional processing steps, thus reducing development costs. The long data retention of over 100 years under extreme conditions further underscores the reliability of these OTP modules in demanding applications.
Silvaco's Standard Cell Libraries offer a vast selection of optimized cells designed for power, area, speed, routing, and flow efficiency. These libraries are engineered to support advanced nodes with enhanced power management features, providing low-power and high-performance options for SoC designs. The libraries are customizable to fit specific application requirements, thus offering flexibility in engineering design strategies.
The GDDR7 PHY and Controller from Innosilicon is designed to meet the high-performance needs of modern graphics and computing environments. It offers impressive bandwidth efficiency and speed, providing an ideal solution for high-end graphics cards and systems requiring vast data throughput. Innosilicon’s GDDR7 solution is a testament to their commitment to innovation, incorporating advanced technical features for optimized performance. Built to be compatible with various technological interfaces, this GDDR7 solution ensures seamless integration into existing systems. It has been engineered for enhanced signal integrity and lower power consumption, helping to reduce the operational cost while providing peak performance consistency. The forward-thinking design anticipates future industry trends, providing scalable capabilities to handle increased data demands. As one of Innosilicon's flagship products, the GDDR7 PHY and Controller represents a fusion of technological excellence and practical functionality. This solution operates within rigorous quality standards, guaranteeing reliability and efficiency in real-world applications. It supports numerous process nodes catering to a wide array of industrial needs while maintaining stringent compliance with industry protocols.
NOR Flash technology, provided by Chuangfeixin Technologies, is designed to meet the needs of applications requiring high reliability and performance. Utilizing the SPI interface, it supports both serial and parallel modes with Dual and Quad I/O options, achieving frequencies up to 108MHz for efficient execution and data storage. Its robust architecture ensures data retention with excellent thermal stability, making it ideal for applications in automotive and industrial sectors. The flash offers high-speed access, ensuring rapid random access to memory arrays from any location, facilitated through its XIP (Execute-In-Place) capabilities. This enhances its suitability for environments requiring dependable and fast data processing, positioning it as an integral component in high-demand computing systems.
KeyASIC's Fundamental IP offering is comprised of an array of versatile and essential components that serve as the backbone for various electronic designs. These include a Standard Cell Library and General Purpose I/O Libraries, indispensable tools for chip designers looking to streamline product development and enhance design flexibility. Additionally, a variety of memory compilers such as SRAM, Register File, and ROM compilers, support the creation of efficient storage solutions. KeyASIC also provides robust LVCMOS I/O options with multiple voltage levels, catering to diverse interfacing needs. To ensure synchronization and precision in electronic devices, KeyASIC offers a PLL that operates up to 500MHz, alongside a DLL of the same frequency. These components are crucial for applications requiring stable clock generation and data alignment. The company's dedication to high-performance and flexible solutions is evident in their DC-DC Converter options, capable of managing voltage inputs and delivering multiple output voltages. The Voltage Regulator options complement these converters, offering further power management solutions for complex electronic designs. For power-sensitive applications, KeyASIC includes Power On Reset circuits and an Analog Mux, enhancing the reliability and integration capabilities of their Fundamental IP suite. These elements are designed to meet the stringent requirements of modern electronics, ensuring seamless operation across various platforms. By offering such a comprehensive and silicon-proven IP suite, KeyASIC empowers their clients to achieve unparalleled efficiency and innovation in their electronic design projects.
sureCore's PowerMiser is a cutting-edge low power SRAM solution designed for devices that demand exceptional battery life with minimal operational and standby power consumption. PowerMiser is available in 28nm FDSOI, 28nm HDC+, and 22nm ULL BULK CMOS processes, providing a flexible voltage range from 0.7V to 1.2V. This IP achieves dynamic power savings exceeding 50% compared to conventional SRAM solutions, while also reducing leakage power by 21% to 38% depending on conditions. The PowerMiser compiler handles capacities up to 576Kbit and offers word lengths of up to 144 bits with three multiplexing configurations. It facilitates automatic generation of vital design documentation and models, streamlining integration into standard EDA workflows. The implementation of Bit Line Voltage Control techniques helps the IP maintain high performance even at lower voltage operations, without compromising on retention capabilities, thanks to versatile sleep modes. Retentive sleep modes enable rapid wake-up and maximal leakage current savings, ensuring the SRAM can adjust to the needs of dynamic applications without sacrificing power efficiency. This makes PowerMiser a substantial ally for modern, high-demand applications that prioritize power savings.
The Foundation IP suite by InPsytech consists of essential components crucial for building sophisticated semiconductor designs. It includes standard cells, memory compilers, and I/O interfaces that form the foundational elements of integrated circuits. Each component is meticulously designed to ensure high performance, low power consumption, and robust reliability. Standard cells within the Foundation IP are designed to optimize space and performance in IC layouts, while memory compilers offer scalable and efficient solutions for memory integration. I/O interfaces within the suite are made to ensure seamless communication across different chip components, supporting wide-ranging application needs. The Foundation IP solutions are tailored for maximal compatibility across various manufacturing processes and technologies, ensuring that semiconductor designers can achieve the highest levels of efficiency and innovation in their products. These fundamental building blocks lay the groundwork for more advanced functionality and performance in semiconductor devices.
The hypr_risc is an advanced, highly customizable DSP accelerator based on a RISC-V core designed for ultra-high-speed radar signal processing. This solution is optimized for automotive applications where rapid response times are critical. It supports high throughput processing and is adaptable across various sizes and power consumption needs, engaging high-performance multi-core processors. This powerful capability is particularly beneficial for developing sophisticated ADAS technology, ensuring safety and precision through highly efficient processing.
The DDR solutions from KNiulink include advanced architecture and technology designed to deliver high performance and low power consumption solutions in the DDR3/4/5 and LPDDR2/3/4/4x/5 families. These IP cores are tailored to cope with the increasing demands of modern applications that require high bandwidth and strong data integrity. The DDR IP offerings encompass a wide range of possibilities for embedded systems and other demanding applications, ensuring efficiency and performance across various industries.
The Metis M.2 AI Inference Acceleration Card by Axelera AI is a compact yet powerful module specifically designed for high-throughput AI applications in edge computing environments. Engineered to fit seamlessly into the M.2 form factor, this card delivers the performance of much larger systems while maintaining a low power footprint, making it ideal for deploying AI-driven solutions in constrained settings. Built around the Metis AI Processing Unit (AIPU), this card is particularly adept at handling deep learning tasks and complex neural network models. It enables real-time inference capabilities that are critical for applications like video surveillance, smart home devices, and industrial IoT solutions, where rapid data processing and decision-making are integral. The AIPU's scalability and efficiency provide an edge over traditional processing units, resulting in superior performance metrics for AI workloads. Complementing its hardware specifications, the Metis M.2 AI Inference Acceleration Card leverages the Voyager SDK to simplify AI model integration and deployment. The SDK offers compatibility with leading AI frameworks, enabling seamless transitions from development to live production. This capability ensures faster deployment times and empowers developers to create innovative applications with reduced complexity and enhanced effectiveness.
The Racyics ABX Platform is an innovative solution designed to enhance ultra-low voltage operations using Adaptive Body Biasing (ABB) technology. By enabling operation at voltages as low as 0.4V, the platform helps compensate for variations in process, supply voltage, and temperature, ensuring efficient performance and energy usage. This platform is particularly suited for automotive applications, where it can achieve up to a 75% reduction in leakage power at high temperatures. Engineered to maximize performance, the ABX Platform leverages features such as standard cells and SRAM IP to deliver up to nine times the performance under ultra-low voltage operations. These technologies are underpinned by a robust implementation process that improves Power-Performance-Area (PPA) and guarantees reliable output. Moreover, the ABX Platform is silicon-proven and provides a straightforward turnkey solution that fits seamlessly into existing design flows. Its capabilities are backed by a user-friendly evaluation kit, enabling designers to achieve their required outcomes with minimal effort and high yield.
The logiMEM provides a size-optimized, flexible memory controller solution for DDR3 SDRAMs compatible with AMD Series 7 FPGAs/SoCs. Its parametric and synthesizable design supports industry-standard DDR3 memory modules, enabling efficient memory management in high-performance computing environments.
The QDR IV XP PHY + Memory Controller leverages high-performance capabilities for advanced networking and communication systems. Designed to optimize data flow at high frequencies, this controller interfaces effectively with Stratix V FPGAs, achieving superior memory speeds. Its advanced calibration and de-skew features ensure precise interaction between user and memory interfaces, enhancing performance for high-speed applications such as network processing. Configured for two bidirectional ports and featuring on-die termination, this controller enables robust and reliable data transactions critical for maintaining system efficiency in demanding environments.
Aimed at microcontroller applications, the 12-bit 2MS/s Successive Approximation Register (SAR) ADC offers effective analog-to-digital conversion with a focus on precision and power economy. It is tailored for systems where microcontrollers serve as the core, often in embedded and IoT platforms. The ADC's ability to perform rapid signal conversion ensures that microcontrollers can process inputs accurately and efficiently, a necessity for real-time applications. This is especially critical in systems where space and energy efficiency are as important as processing power. Integrating real-time auto-calibration features, this ADC maintains high accuracy even under fluctuating environmental conditions and component variances. Its efficient design supports prolonged operation in embedded systems, minimizing the overhead and enhancing overall system reliability.
The GDDR6X/6 PHY and Controller by Innosilicon represents a leap forward in data processing for demanding applications like gaming and AI. Built to handle the rigors of high-performance graphics and computing, this solution delivers exceptional throughput capabilities combined with precise control functions. The GDDR6X/6 solution is engineered to support a variety of interfaces, ensuring flexibility and ease of integration within different technological ecosystems. Its dynamic handling of large data sets is further enabled by Innosilicon's sophisticated error correction algorithms and enhanced signal integrity protocols, which guarantee efficient operation across diverse environments. The controller is enhanced by its low power profile, supporting energy efficiency without compromising on performance. As industries increasingly move towards more sustainable solutions, Innosilicon’s forward-thinking design makes the GDDR6X/6 PHY and Controller a valuable asset for technology developers seeking reliable and resilient high-speed memory solutions.
The Metis Compute Board is a single-board computing platform that integrates an artificial intelligence processing unit (AIPU) and a robust ARM-based processor to deliver outstanding AI performance in compact form. Ideal for developing and deploying AI-driven applications, this board is designed to provide powerful computations for multimodal processing, making it exceptionally versatile for numerous AI scenarios. Developers can leverage this board for edge deployments requiring efficient processing across various sensor inputs. Equipped with various connectivity options, such as multiple USB ports, HDMI, and dual LAN, the board facilitates easy integration into existing systems or new setups. The quad-core AIPU at its heart is specifically optimized for executing complex AI algorithms, thereby enabling high-speed processing that maintains power efficiency. This makes the board suitable for distributed AI deployments in settings like smart cities, autonomous drones, and real-time monitoring systems. Integrated with the Voyager SDK, the Metis Compute Board empowers developers with a comprehensive environment for AI model deployment and optimization, ensuring swift prototyping and scalability. The SDK's flexibility enables compatibility with various machine learning frameworks, delivering tailor-made solutions that meet specific application needs. As a result, organizations can rapidly move from concept to deployment, effectively transforming AI innovation into reality.
Aragio Solutions offers a comprehensive range of general-purpose I/Os designed to meet the stringent performance, power, and reliability requirements for integrated circuit designs. These circuits, characterized by high ESD and latch-up tolerance, include a full suite of power pads, corner pad cells, breakers, and spacers. They incorporate advanced design features for power supply sequencing and utilize Distributed Power-on-Control (POC) technology for efficient power management. The GPIO designs are available for a variety of voltage levels, ensuring compatibility with different systems. These levels include combinations such as 1.2V, 1.5V, 1.8V, up to 3.3V, supporting both digital and analog I/O requirements. The library's flexibility allows designers to isolate power domains within the same padring, making it an ideal choice for complex applications. Aragio's GPIO solutions come equipped with programmable options and fault-tolerant designs, offering robustness for various use cases. Specifically tailored to facilitate ease of integration, Aragio’s I/O library encompasses everything needed for isolating analog and digital I/Os while maintaining minimal noise interference. This modularity allows for seamless adaptation to customer-specific needs, with power supply compatibility across multiple nodes, from 7nm to 130nm. The comprehensive support of different I/O designs ensures high compatibility and wider application reach.
This DDR memory controller core offers a high-performance solution for interfacing with various generations of DDR SDRAM, making it ideal for both FPGA and ASIC platforms. With comprehensive support for DDR-I, DDR-II, and DDR-III, it facilitates seamless integration into complex SoC designs. By providing programmable capabilities for CAS latencies, refresh intervals, and address mapping, this controller maximizes data throughput and minimizes latency. The design additionally supports power-saving features like self-refresh and power-down modes, aligning with JEDEC standards to ensure efficient and reliable memory management.
M31 Technology Corporation's STD-Cell Library provides a variety of standard cell libraries designed to maximize parameters such as performance, power, and area. These libraries are integral to optimizing foundational circuit designs across various applications, ensuring efficient use of resources. They support easy integration into complex systems, catering to both general-purpose designs and specific, demanding applications through customizable options.
The EM-30 e.MMC 5.1 by Swissbit is engineered to offer robust and reliable memory solutions for industrial applications. Featuring NAND TLC storage, it supports capacities up to 256 GB, making it suitable for applications that require high data retention and reliability. The e.MMC 5.1 standard ensures high performance and efficiency, particularly in environments where consistent data writing and access are critical. This storage solution is tailored for use in conditions characterized by extreme temperatures and harsh environmental factors, providing dependable storage even under challenging circumstances. Its sustained performance and durability make it a prime choice for sectors such as automotive, industrial automation, and more. Incorporating state-of-the-art technology, the EM-30 offers data integrity and reliability, plus extended lifecycle support, reflecting Swissbit's commitment to quality and innovation. Enterprises looking for a resilient data storage option that balances performance with stability often gravitate towards this product.
The logiMEM_arb combines memory control and arbitration features, designed specifically for AMD Spartan 6 FPGA interfaces. It supports simultaneous accesses from multiple sources, integrating well with various bus standards to efficiently manage memory resources in sophisticated digital environments.
M31's Standard Cell Library is an essential backbone for developing customized integrated circuit designs. It offers a diverse range of cell libraries tailored to meet specific performance, power, and area requirements, facilitating optimized semiconductor manufacturing. These libraries are highly adaptable, allowing detailed design adjustments for specialized applications.
The AXI4 Memory Controller by LeWiz is engineered to maximize on-chip memory performance, supporting various burst types including FIXED, INCR, and WRAP. It facilitates simultaneous read and write operations, optimizing throughput for program execution and data storage tasks. This controller is integral for applications demanding high-performance memory mapping and is especially effective in systems requiring robust data handling capabilities like high-speed computing and intensive processing environments.
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