All IPs > Memory Controller & PHY > DDR > LPDDR4X PHY
The LPDDR4X PHY aims to facilitate high-speed data transmission for memory devices. It’s optimized for efficiency in terms of power usage while maintaining a high throughput. The design is compliant with JEDEC standards and supports various memory architectures, including DRAM and non-volatile memory types, making it versatile for different applications.
| Foundry | Process Nodes |
|---|---|
| TSMC |
7nm |
| Class | Value |
|---|---|
| Categories |
Memory Controller & PHY > DDR Interface Controller & PHY > AMBA AHB / APB/ AXI Memory Controller & PHY > eMMC Memory Controller & PHY > Mobile DDR Controller Memory Controller & PHY > NAND Flash |
| Availability | All Countries & Regions |
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