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All IPs > Processor > CPU > HES-DVM

HES-DVM

From Aldec, Inc.

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Description

HES-DVM is a fully automated, scripted hybrid verification and validation system ideal for comprehensive SoC and ASIC designs. This environment facilitates bit-level simulation acceleration and incorporates SCE-MI 2.1 transaction emulation as well as hardware prototyping features. With its scalability in emulation and prototyping, HES-DVM enables designers to partition designs efficiently for emulation and prototyping, allowing real-time validation against both virtual and real-world inputs, a crucial feature for handling complex systems.

Features
  • Automated hybrid verification
  • Hardware prototyping
  • Scalable emulation capabilities
Tech Specs
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