ADICSYS offers a highly advanced embedded FPGA (eFPGA) solution designed to be seamlessly integrated into ASICs and SOCs. This IP is based on a standard cell architecture, ensuring it is technology-independent and easily adaptable across various platforms. The eFPGA is a versatile solution, allowing for customization based on specific design constraints such as area, power, and performance.
The eFPGA is delivered as a synthesizable RTL, equipped with associated constraint files and supported by ADICSYS's compilation software, Acompile. Furthermore, it includes a bitstream loader and built-in self-test program (BIST) to enhance the testing and functionality of the design. This programmable IP allows users to implement custom logic and is particularly useful for applications requiring flexibility and adaptability in logic design.
Additionally, ADICSYS offers the capability to deliver the eFPGA as a hard block in different formats including GDSII, OpenAccess, and Milkyway for further customization. This adaptability makes the eFPGA a suitable choice for a wide range of applications, ensuring a perfect fit for any project requiring programmable logic.
