The CVC Verilog Simulator by Tachyon Design Automation is a robust tool designed to adhere to the IEEE 1364 2005 Verilog HDL standard. It offers both compiled and interpreted simulation modes, allowing users to choose between quick elaboration and high-speed execution. Benefiting from its native x86_64 machine instruction execution, the simulator ensures optimum performance and capability to handle extensive gate and RTL designs.
Available in both open-source and commercial versions, CVC enables users to download and evaluate its powerful features without financial commitment, while enterprises can opt for additional support with the Enterprise version. With its advanced simulation capabilities, CVC supports a variety of features including toggle coverage, full PLI support, and efficient dump formats like VCD/EVCD/FST. These features, combined with parallel processing options, make it a go-to simulator for complex electronic hardware modeling.
The tool’s architecture allows for the efficient simulation of very large gate and RTL designs, leveraging 64-bit simulation speeds. Additionally, its compatibility with Linux X86 systems ensures broad accessibility and usability within various design environments. CVC’s advanced features set, including novel x-propagation algorithms and machine code optimization, positions it as a market leader in the domain of HDL simulation.
