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All IPs > Processor > Vision Processor > Ceva-SensPro2 - Vision AI DSP

Ceva-SensPro2 - Vision AI DSP

From Ceva, Inc.

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Description

The Ceva-SensPro DSP family unites scalar processing units and vector processing units under an 8-way VLIW architecture. The family incorporates advanced control features such as a branch target buffer and a loop buffer to speed up execution and reduce power. There are six family members, each with a different array of MACs, targeted at different application areas and performance points. These range from the Ceva-SP100, providing 128 8-bit integer or 32 16-bit integer MACs at 0.2 TOPS performance for compact applications such as vision processing in wearables and mobile devices; to the Ceva-SP1000, with 1024 8-bit or 256 16-bit MACs reaching 2 TOPS for demanding applications such as automotive, robotics, and surveillance.

Two of the family members, the Ceva-SPF2 and Ceva-SPF4, employ 32 or 64 32-bit floating-point MACs, respectively, for applications in electric-vehicle power-train control and battery management. These two members are supported by libraries for Eigen Linear Algebra, MATLAB vector operations, and the TVM graph compiler. Highly configurable, the vector processing units in all family members can add domain-specific instructions for such areas as vision processing, Radar, or simultaneous localization and mapping (SLAM) for robotics.

Integer family members can also add optional floating-point capabilities. All family members have independent instruction and data memory subsystems and a Ceva-Connect queue manager for AXI-attached accelerators or coprocessors. The Ceva-SensPro2 family is programmable in C/C++ as well as in Halide and Open MP, and supported by an Eclipse-based development environment, extensive libraries spanning a wide range of applications, and the Ceva-NeuPro Studio AI development environment.

Learn more about Ceva-SensPro2 solution>

Deliverables
Soft IP
  • Synthesizable RTL
  • Verilog integration testbench
  • Sample synthesis script and constraints
  • Sample simulation script
  • Datasheet
  • Hardware user guide
  • Hardware implementation guide
  • Standard EDA tool flow scripts and support files
  • Verification test bench and test vectors
Features
  • Designed to integrate vision processing and inference in a single architecture
  • 8-way VLIW architecture managing both scalar and vector processing
  • Huge performance range, from 128 8-bit integer MACs and 0.2 TOPS to 1024 8-bit integer MACs and 2 TOPS
  • Optional 32-bit floating point scalable to 64 single-precision or 128 half-precision floating point MACs
  • Optional instruction-set extensions for specific application domains including Radar, LiDAR, vision, and simultaneous localization and mapping for robotics
  • Development tools include LLVM C/C++ compiler, support for higher programing languages of Halide and Open MP, an Eclipse-based development environment, and support in Ceva-NeuPro Studio AI SDK
  • Domain-specific libraries for Computer Vision, DSP, AI, SLAM, Image Signal Processing, and Radar
  • ASIL-B compliant, with ASIL-D support for mission-critical automotive applications
Tech Specs
Class Value
Categories Processor > Vision Processor
Processor > DSP Core
Processor > Processor Cores
Platform Level IP > Multiprocessor / DSP
Maturity In Production
Availability All Countries & Regions
Image Gallery
Ceva-SensPro2 - Vision AI DSP
Applications
  • Automotive
  • Consumer IoT
  • Industrial
  • Infrastructure
  • Mobile
  • PC
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