Ceva-BX1 audio digital signal controller IP handles both modest signal-processing and control workloads with up to 8 GMACs per second performance and high-level-language programming. Yet it is power-efficient enough for always-on applications and use in wearables and TWS earbuds. The Ceva-BX1 supports a range of integer and floating-point data types for a wide range of applications, from audio signal processing to light AI workloads, with remarkably compact code size. Optimized high-speed interfaces expedite Ceva-BX1 connection to coprocessors or accelerators, and a rich software partners ecosystem provide ready-to-use application-level solutions
The Ceva-BX1 combines the capabilities of signal processing and control-code execution into a single compact, low-power DSP core. Computational speed comes from dual-32×32 and quad-16×16 MACs with added support for 16×8 and 8×8 MAC operations, implemented in an 11-stage pipeline. A floating-point unit supporting half, single, and double-precision IEEE floating-point is optional. These resources are directed by a four-way VLIW instruction set architecture with optimizations for single-instruction-multiple-data (SIMD) operation. A hardware loop buffer speeds kernel code execution, while efficient execution of control code is aided by dynamic branch prediction and a branch target buffer. Trusted execution modes enable secure operation. On signal-processing tasks the Ceva-BX1 can reach up to 8 GMACs per second, and on control workloads it can achieve up to 4.41 CoreMark/MHz. The hardware design is optimized for speed, achieving 2 GHz operation when implemented in a TSMC 7nm process node using only common standard cells and memory compilers.
